112f961f4SSam Leffler /*- 210ad9a77SSam Leffler * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting 312f961f4SSam Leffler * All rights reserved. 412f961f4SSam Leffler * 512f961f4SSam Leffler * Redistribution and use in source and binary forms, with or without 612f961f4SSam Leffler * modification, are permitted provided that the following conditions 712f961f4SSam Leffler * are met: 812f961f4SSam Leffler * 1. Redistributions of source code must retain the above copyright 912f961f4SSam Leffler * notice, this list of conditions and the following disclaimer, 1012f961f4SSam Leffler * without modification. 1112f961f4SSam Leffler * 2. Redistributions in binary form must reproduce at minimum a disclaimer 1212f961f4SSam Leffler * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any 1312f961f4SSam Leffler * redistribution must be conditioned upon including a substantially 1412f961f4SSam Leffler * similar Disclaimer requirement for further binary redistribution. 1512f961f4SSam Leffler * 1612f961f4SSam Leffler * NO WARRANTY 1712f961f4SSam Leffler * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 1812f961f4SSam Leffler * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 1912f961f4SSam Leffler * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY 2012f961f4SSam Leffler * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL 2112f961f4SSam Leffler * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY, 2212f961f4SSam Leffler * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 2312f961f4SSam Leffler * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 2412f961f4SSam Leffler * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER 2512f961f4SSam Leffler * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 2612f961f4SSam Leffler * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF 2712f961f4SSam Leffler * THE POSSIBILITY OF SUCH DAMAGES. 2812f961f4SSam Leffler * 2912f961f4SSam Leffler * $FreeBSD$ 3012f961f4SSam Leffler */ 3112f961f4SSam Leffler 328363d9c4SAdrian Chadd #include "opt_ah.h" 338363d9c4SAdrian Chadd 3412f961f4SSam Leffler /* 352f549d72SSam Leffler * ath statistics class. 3612f961f4SSam Leffler */ 3760caf0c9SCraig Rodrigues 3860caf0c9SCraig Rodrigues #include <sys/param.h> 3912f961f4SSam Leffler #include <sys/file.h> 4012f961f4SSam Leffler #include <sys/sockio.h> 4112f961f4SSam Leffler #include <sys/socket.h> 4260caf0c9SCraig Rodrigues 4312f961f4SSam Leffler #include <net/if.h> 4412f961f4SSam Leffler #include <net/if_media.h> 4512f961f4SSam Leffler #include <net/if_var.h> 4612f961f4SSam Leffler 4760caf0c9SCraig Rodrigues #include <err.h> 4860caf0c9SCraig Rodrigues #include <signal.h> 4912f961f4SSam Leffler #include <stdio.h> 50207ae002SSam Leffler #include <stdlib.h> 512f549d72SSam Leffler #include <string.h> 522f549d72SSam Leffler #include <unistd.h> 5312f961f4SSam Leffler 54207ae002SSam Leffler #include "ah.h" 55207ae002SSam Leffler #include "ah_desc.h" 56582aab3bSAdrian Chadd #include "ah_diagcodes.h" 57b1b75b3bSAdrian Chadd #include "net80211/ieee80211_ioctl.h" 58b1b75b3bSAdrian Chadd #include "net80211/ieee80211_radiotap.h" 59207ae002SSam Leffler #include "if_athioctl.h" 6012f961f4SSam Leffler 612f549d72SSam Leffler #include "athstats.h" 622f549d72SSam Leffler 634f0edd39SAdrian Chadd #include "ctrl.h" 644f0edd39SAdrian Chadd 654d490647SSam Leffler #ifdef ATH_SUPPORT_ANI 664d490647SSam Leffler #define HAL_EP_RND(x,mul) \ 674d490647SSam Leffler ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul)) 684d490647SSam Leffler #define HAL_RSSI(x) HAL_EP_RND(x, HAL_RSSI_EP_MULTIPLIER) 694d490647SSam Leffler #endif 704d490647SSam Leffler 712f549d72SSam Leffler #define NOTPRESENT { 0, "", "" } 722f549d72SSam Leffler 73207ae002SSam Leffler #define AFTER(prev) ((prev)+1) 74207ae002SSam Leffler 752f549d72SSam Leffler static const struct fmt athstats[] = { 762f549d72SSam Leffler #define S_INPUT 0 7795d7bf0fSSam Leffler { 8, "input", "input", "data frames received" }, 78207ae002SSam Leffler #define S_OUTPUT AFTER(S_INPUT) 7995d7bf0fSSam Leffler { 8, "output", "output", "data frames transmit" }, 80207ae002SSam Leffler #define S_TX_ALTRATE AFTER(S_OUTPUT) 812f549d72SSam Leffler { 7, "altrate", "altrate", "tx frames with an alternate rate" }, 82207ae002SSam Leffler #define S_TX_SHORTRETRY AFTER(S_TX_ALTRATE) 8395d7bf0fSSam Leffler { 7, "short", "short", "short on-chip tx retries" }, 84207ae002SSam Leffler #define S_TX_LONGRETRY AFTER(S_TX_SHORTRETRY) 8595d7bf0fSSam Leffler { 7, "long", "long", "long on-chip tx retries" }, 86207ae002SSam Leffler #define S_TX_XRETRIES AFTER(S_TX_LONGRETRY) 872f549d72SSam Leffler { 6, "xretry", "xretry", "tx failed 'cuz too many retries" }, 88207ae002SSam Leffler #define S_MIB AFTER(S_TX_XRETRIES) 892f549d72SSam Leffler { 5, "mib", "mib", "mib overflow interrupts" }, 902f549d72SSam Leffler #ifndef __linux__ 91207ae002SSam Leffler #define S_TX_LINEAR AFTER(S_MIB) 922f549d72SSam Leffler { 5, "txlinear", "txlinear", "tx linearized to cluster" }, 93207ae002SSam Leffler #define S_BSTUCK AFTER(S_TX_LINEAR) 948e787d67SAdrian Chadd { 6, "bstuck", "bstuck", "stuck beacon conditions" }, 95207ae002SSam Leffler #define S_INTRCOAL AFTER(S_BSTUCK) 962f549d72SSam Leffler { 5, "intrcoal", "intrcoal", "interrupts coalesced" }, 97207ae002SSam Leffler #define S_RATE AFTER(S_INTRCOAL) 982f549d72SSam Leffler #else 99207ae002SSam Leffler #define S_RATE AFTER(S_MIB) 1002f549d72SSam Leffler #endif 1014d490647SSam Leffler { 5, "rate", "rate", "current transmit rate" }, 102207ae002SSam Leffler #define S_WATCHDOG AFTER(S_RATE) 1032f549d72SSam Leffler { 5, "wdog", "wdog", "watchdog timeouts" }, 104207ae002SSam Leffler #define S_FATAL AFTER(S_WATCHDOG) 1052f549d72SSam Leffler { 5, "fatal", "fatal", "hardware error interrupts" }, 106207ae002SSam Leffler #define S_BMISS AFTER(S_FATAL) 1072f549d72SSam Leffler { 5, "bmiss", "bmiss", "beacon miss interrupts" }, 108207ae002SSam Leffler #define S_RXORN AFTER(S_BMISS) 1092f549d72SSam Leffler { 5, "rxorn", "rxorn", "recv overrun interrupts" }, 110207ae002SSam Leffler #define S_RXEOL AFTER(S_RXORN) 1112f549d72SSam Leffler { 5, "rxeol", "rxeol", "recv eol interrupts" }, 112207ae002SSam Leffler #define S_TXURN AFTER(S_RXEOL) 1132f549d72SSam Leffler { 5, "txurn", "txurn", "txmit underrun interrupts" }, 114207ae002SSam Leffler #define S_TX_MGMT AFTER(S_TXURN) 1152f549d72SSam Leffler { 5, "txmgt", "txmgt", "tx management frames" }, 116207ae002SSam Leffler #define S_TX_DISCARD AFTER(S_TX_MGMT) 1172f549d72SSam Leffler { 5, "txdisc", "txdisc", "tx frames discarded prior to association" }, 118207ae002SSam Leffler #define S_TX_INVALID AFTER(S_TX_DISCARD) 1192f549d72SSam Leffler { 5, "txinv", "txinv", "tx invalid (19)" }, 120207ae002SSam Leffler #define S_TX_QSTOP AFTER(S_TX_INVALID) 1212f549d72SSam Leffler { 5, "qstop", "qstop", "tx stopped 'cuz no xmit buffer" }, 122207ae002SSam Leffler #define S_TX_ENCAP AFTER(S_TX_QSTOP) 1232f549d72SSam Leffler { 5, "txencode", "txencode", "tx encapsulation failed" }, 124207ae002SSam Leffler #define S_TX_NONODE AFTER(S_TX_ENCAP) 1252f549d72SSam Leffler { 5, "txnonode", "txnonode", "tx failed 'cuz no node" }, 12641e449dbSSam Leffler #define S_TX_NOBUF AFTER(S_TX_NONODE) 12741e449dbSSam Leffler { 5, "txnobuf", "txnobuf", "tx failed 'cuz dma buffer allocation failed" }, 12841e449dbSSam Leffler #define S_TX_NOFRAG AFTER(S_TX_NOBUF) 12941e449dbSSam Leffler { 5, "txnofrag", "txnofrag", "tx failed 'cuz frag buffer allocation(s) failed" }, 13041e449dbSSam Leffler #define S_TX_NOMBUF AFTER(S_TX_NOFRAG) 1312f549d72SSam Leffler { 5, "txnombuf", "txnombuf", "tx failed 'cuz mbuf allocation failed" }, 1322f549d72SSam Leffler #ifndef __linux__ 133207ae002SSam Leffler #define S_TX_NOMCL AFTER(S_TX_NOMBUF) 1342f549d72SSam Leffler { 5, "txnomcl", "txnomcl", "tx failed 'cuz cluster allocation failed" }, 135207ae002SSam Leffler #define S_TX_FIFOERR AFTER(S_TX_NOMCL) 1362f549d72SSam Leffler #else 137207ae002SSam Leffler #define S_TX_FIFOERR AFTER(S_TX_NOMBUF) 1382f549d72SSam Leffler #endif 1392f549d72SSam Leffler { 5, "efifo", "efifo", "tx failed 'cuz FIFO underrun" }, 140207ae002SSam Leffler #define S_TX_FILTERED AFTER(S_TX_FIFOERR) 1412f549d72SSam Leffler { 5, "efilt", "efilt", "tx failed 'cuz destination filtered" }, 142207ae002SSam Leffler #define S_TX_BADRATE AFTER(S_TX_FILTERED) 1432f549d72SSam Leffler { 5, "txbadrate", "txbadrate", "tx failed 'cuz bogus xmit rate" }, 144207ae002SSam Leffler #define S_TX_NOACK AFTER(S_TX_BADRATE) 1452f549d72SSam Leffler { 5, "noack", "noack", "tx frames with no ack marked" }, 146207ae002SSam Leffler #define S_TX_RTS AFTER(S_TX_NOACK) 1472f549d72SSam Leffler { 5, "rts", "rts", "tx frames with rts enabled" }, 148207ae002SSam Leffler #define S_TX_CTS AFTER(S_TX_RTS) 1492f549d72SSam Leffler { 5, "cts", "cts", "tx frames with cts enabled" }, 150207ae002SSam Leffler #define S_TX_SHORTPRE AFTER(S_TX_CTS) 1512f549d72SSam Leffler { 5, "shpre", "shpre", "tx frames with short preamble" }, 152207ae002SSam Leffler #define S_TX_PROTECT AFTER(S_TX_SHORTPRE) 1532f549d72SSam Leffler { 5, "protect", "protect", "tx frames with 11g protection" }, 154207ae002SSam Leffler #define S_RX_ORN AFTER(S_TX_PROTECT) 1552f549d72SSam Leffler { 5, "rxorn", "rxorn", "rx failed 'cuz of desc overrun" }, 156207ae002SSam Leffler #define S_RX_CRC_ERR AFTER(S_RX_ORN) 1572f549d72SSam Leffler { 6, "crcerr", "crcerr", "rx failed 'cuz of bad CRC" }, 158207ae002SSam Leffler #define S_RX_FIFO_ERR AFTER(S_RX_CRC_ERR) 1592f549d72SSam Leffler { 5, "rxfifo", "rxfifo", "rx failed 'cuz of FIFO overrun" }, 160207ae002SSam Leffler #define S_RX_CRYPTO_ERR AFTER(S_RX_FIFO_ERR) 1612f549d72SSam Leffler { 5, "crypt", "crypt", "rx failed 'cuz decryption" }, 162207ae002SSam Leffler #define S_RX_MIC_ERR AFTER(S_RX_CRYPTO_ERR) 1632f549d72SSam Leffler { 4, "mic", "mic", "rx failed 'cuz MIC failure" }, 164207ae002SSam Leffler #define S_RX_TOOSHORT AFTER(S_RX_MIC_ERR) 1652f549d72SSam Leffler { 5, "rxshort", "rxshort", "rx failed 'cuz frame too short" }, 166207ae002SSam Leffler #define S_RX_NOMBUF AFTER(S_RX_TOOSHORT) 1672f549d72SSam Leffler { 5, "rxnombuf", "rxnombuf", "rx setup failed 'cuz no mbuf" }, 168207ae002SSam Leffler #define S_RX_MGT AFTER(S_RX_NOMBUF) 1692f549d72SSam Leffler { 5, "rxmgt", "rxmgt", "rx management frames" }, 170207ae002SSam Leffler #define S_RX_CTL AFTER(S_RX_MGT) 1712f549d72SSam Leffler { 5, "rxctl", "rxctl", "rx control frames" }, 172207ae002SSam Leffler #define S_RX_PHY_ERR AFTER(S_RX_CTL) 1732f549d72SSam Leffler { 7, "phyerr", "phyerr", "rx failed 'cuz of PHY err" }, 174207ae002SSam Leffler #define S_RX_PHY_UNDERRUN AFTER(S_RX_PHY_ERR) 1754d490647SSam Leffler { 4, "phyund", "TUnd", "transmit underrun" }, 176207ae002SSam Leffler #define S_RX_PHY_TIMING AFTER(S_RX_PHY_UNDERRUN) 1774d490647SSam Leffler { 4, "phytim", "Tim", "timing error" }, 178207ae002SSam Leffler #define S_RX_PHY_PARITY AFTER(S_RX_PHY_TIMING) 1794d490647SSam Leffler { 4, "phypar", "IPar", "illegal parity" }, 180207ae002SSam Leffler #define S_RX_PHY_RATE AFTER(S_RX_PHY_PARITY) 1814d490647SSam Leffler { 4, "phyrate", "IRate", "illegal rate" }, 182207ae002SSam Leffler #define S_RX_PHY_LENGTH AFTER(S_RX_PHY_RATE) 1834d490647SSam Leffler { 4, "phylen", "ILen", "illegal length" }, 184207ae002SSam Leffler #define S_RX_PHY_RADAR AFTER(S_RX_PHY_LENGTH) 1854d490647SSam Leffler { 4, "phyradar", "Radar", "radar detect" }, 186207ae002SSam Leffler #define S_RX_PHY_SERVICE AFTER(S_RX_PHY_RADAR) 1874d490647SSam Leffler { 4, "physervice", "Service", "illegal service" }, 188207ae002SSam Leffler #define S_RX_PHY_TOR AFTER(S_RX_PHY_SERVICE) 1894d490647SSam Leffler { 4, "phytor", "TOR", "transmit override receive" }, 190207ae002SSam Leffler #define S_RX_PHY_OFDM_TIMING AFTER(S_RX_PHY_TOR) 1912f549d72SSam Leffler { 6, "ofdmtim", "ofdmtim", "OFDM timing" }, 192207ae002SSam Leffler #define S_RX_PHY_OFDM_SIGNAL_PARITY AFTER(S_RX_PHY_OFDM_TIMING) 1932f549d72SSam Leffler { 6, "ofdmsig", "ofdmsig", "OFDM illegal parity" }, 194207ae002SSam Leffler #define S_RX_PHY_OFDM_RATE_ILLEGAL AFTER(S_RX_PHY_OFDM_SIGNAL_PARITY) 1952f549d72SSam Leffler { 6, "ofdmrate", "ofdmrate", "OFDM illegal rate" }, 196207ae002SSam Leffler #define S_RX_PHY_OFDM_POWER_DROP AFTER(S_RX_PHY_OFDM_RATE_ILLEGAL) 1972f549d72SSam Leffler { 6, "ofdmpow", "ofdmpow", "OFDM power drop" }, 198207ae002SSam Leffler #define S_RX_PHY_OFDM_SERVICE AFTER(S_RX_PHY_OFDM_POWER_DROP) 1992f549d72SSam Leffler { 6, "ofdmservice", "ofdmservice", "OFDM illegal service" }, 200207ae002SSam Leffler #define S_RX_PHY_OFDM_RESTART AFTER(S_RX_PHY_OFDM_SERVICE) 2012f549d72SSam Leffler { 6, "ofdmrestart", "ofdmrestart", "OFDM restart" }, 202207ae002SSam Leffler #define S_RX_PHY_CCK_TIMING AFTER(S_RX_PHY_OFDM_RESTART) 2032f549d72SSam Leffler { 6, "ccktim", "ccktim", "CCK timing" }, 204207ae002SSam Leffler #define S_RX_PHY_CCK_HEADER_CRC AFTER(S_RX_PHY_CCK_TIMING) 2052f549d72SSam Leffler { 6, "cckhead", "cckhead", "CCK header crc" }, 206207ae002SSam Leffler #define S_RX_PHY_CCK_RATE_ILLEGAL AFTER(S_RX_PHY_CCK_HEADER_CRC) 2072f549d72SSam Leffler { 6, "cckrate", "cckrate", "CCK illegal rate" }, 208207ae002SSam Leffler #define S_RX_PHY_CCK_SERVICE AFTER(S_RX_PHY_CCK_RATE_ILLEGAL) 2092f549d72SSam Leffler { 6, "cckservice", "cckservice", "CCK illegal service" }, 210207ae002SSam Leffler #define S_RX_PHY_CCK_RESTART AFTER(S_RX_PHY_CCK_SERVICE) 2112f549d72SSam Leffler { 6, "cckrestar", "cckrestar", "CCK restart" }, 212207ae002SSam Leffler #define S_BE_NOMBUF AFTER(S_RX_PHY_CCK_RESTART) 2132f549d72SSam Leffler { 4, "benombuf", "benombuf", "beacon setup failed 'cuz no mbuf" }, 214207ae002SSam Leffler #define S_BE_XMIT AFTER(S_BE_NOMBUF) 21595d7bf0fSSam Leffler { 7, "bexmit", "bexmit", "beacons transmitted" }, 216207ae002SSam Leffler #define S_PER_CAL AFTER(S_BE_XMIT) 2172f549d72SSam Leffler { 4, "pcal", "pcal", "periodic calibrations" }, 218207ae002SSam Leffler #define S_PER_CALFAIL AFTER(S_PER_CAL) 2192f549d72SSam Leffler { 4, "pcalf", "pcalf", "periodic calibration failures" }, 220207ae002SSam Leffler #define S_PER_RFGAIN AFTER(S_PER_CALFAIL) 2212f549d72SSam Leffler { 4, "prfga", "prfga", "rfgain value change" }, 222207ae002SSam Leffler #if ATH_SUPPORT_TDMA 223207ae002SSam Leffler #define S_TDMA_UPDATE AFTER(S_PER_RFGAIN) 22495d7bf0fSSam Leffler { 5, "tdmau", "tdmau", "TDMA slot timing updates" }, 225207ae002SSam Leffler #define S_TDMA_TIMERS AFTER(S_TDMA_UPDATE) 22695d7bf0fSSam Leffler { 5, "tdmab", "tdmab", "TDMA slot update set beacon timers" }, 227207ae002SSam Leffler #define S_TDMA_TSF AFTER(S_TDMA_TIMERS) 22895d7bf0fSSam Leffler { 5, "tdmat", "tdmat", "TDMA slot update set TSF" }, 22910ad9a77SSam Leffler #define S_TDMA_TSFADJ AFTER(S_TDMA_TSF) 23095d7bf0fSSam Leffler { 8, "tdmadj", "tdmadj", "TDMA slot adjust (usecs, smoothed)" }, 231cc5912f8SSam Leffler #define S_TDMA_ACK AFTER(S_TDMA_TSFADJ) 232cc5912f8SSam Leffler { 5, "tdmack", "tdmack", "TDMA tx failed 'cuz ACK required" }, 233cc5912f8SSam Leffler #define S_RATE_CALLS AFTER(S_TDMA_ACK) 2342f549d72SSam Leffler #else 235207ae002SSam Leffler #define S_RATE_CALLS AFTER(S_PER_RFGAIN) 2362f549d72SSam Leffler #endif 2372f549d72SSam Leffler { 5, "ratec", "ratec", "rate control checks" }, 238207ae002SSam Leffler #define S_RATE_RAISE AFTER(S_RATE_CALLS) 2392f549d72SSam Leffler { 5, "rate+", "rate+", "rate control raised xmit rate" }, 240207ae002SSam Leffler #define S_RATE_DROP AFTER(S_RATE_RAISE) 2412f549d72SSam Leffler { 5, "rate-", "rate-", "rate control dropped xmit rate" }, 242207ae002SSam Leffler #define S_TX_RSSI AFTER(S_RATE_DROP) 2432f549d72SSam Leffler { 4, "arssi", "arssi", "rssi of last ack" }, 244207ae002SSam Leffler #define S_RX_RSSI AFTER(S_TX_RSSI) 2452f549d72SSam Leffler { 4, "rssi", "rssi", "avg recv rssi" }, 246207ae002SSam Leffler #define S_RX_NOISE AFTER(S_RX_RSSI) 2472f549d72SSam Leffler { 5, "noise", "noise", "rx noise floor" }, 248207ae002SSam Leffler #define S_BMISS_PHANTOM AFTER(S_RX_NOISE) 2492f549d72SSam Leffler { 5, "bmissphantom", "bmissphantom", "phantom beacon misses" }, 250207ae002SSam Leffler #define S_TX_RAW AFTER(S_BMISS_PHANTOM) 2512f549d72SSam Leffler { 5, "txraw", "txraw", "tx frames through raw api" }, 252cc5912f8SSam Leffler #define S_TX_RAW_FAIL AFTER(S_TX_RAW) 253cc5912f8SSam Leffler { 5, "txrawfail", "txrawfail", "raw tx failed 'cuz interface/hw down" }, 254cc5912f8SSam Leffler #define S_RX_TOOBIG AFTER(S_TX_RAW_FAIL) 2552f549d72SSam Leffler { 5, "rx2big", "rx2big", "rx failed 'cuz frame too large" }, 256b1b75b3bSAdrian Chadd #define S_RX_AGG AFTER(S_RX_TOOBIG) 257b1b75b3bSAdrian Chadd { 5, "rxagg", "rxagg", "A-MPDU sub-frames received" }, 258b1b75b3bSAdrian Chadd #define S_RX_HALFGI AFTER(S_RX_AGG) 259b1b75b3bSAdrian Chadd { 5, "rxhalfgi", "rxhgi", "Half-GI frames received" }, 260b1b75b3bSAdrian Chadd #define S_RX_2040 AFTER(S_RX_HALFGI) 261b1b75b3bSAdrian Chadd { 6, "rx2040", "rx2040", "40MHz frames received" }, 262b1b75b3bSAdrian Chadd #define S_RX_PRE_CRC_ERR AFTER(S_RX_2040) 263b1b75b3bSAdrian Chadd { 11, "rxprecrcerr", "rxprecrcerr", "CRC errors for non-last A-MPDU subframes" }, 264b1b75b3bSAdrian Chadd #define S_RX_POST_CRC_ERR AFTER(S_RX_PRE_CRC_ERR) 265b1b75b3bSAdrian Chadd { 12, "rxpostcrcerr", "rxpostcrcerr", "CRC errors for last subframe in an A-MPDU" }, 266b1b75b3bSAdrian Chadd #define S_RX_DECRYPT_BUSY_ERR AFTER(S_RX_POST_CRC_ERR) 267b1b75b3bSAdrian Chadd { 10, "rxdescbusy", "rxdescbusy", "Decryption engine busy" }, 268b1b75b3bSAdrian Chadd #define S_RX_HI_CHAIN AFTER(S_RX_DECRYPT_BUSY_ERR) 269b1b75b3bSAdrian Chadd { 4, "rxhi", "rxhi", "Frames received with RX chain in high power mode" }, 2702cdc5a48SAdrian Chadd #define S_RX_STBC AFTER(S_RX_HI_CHAIN) 2712cdc5a48SAdrian Chadd { 6, "rxstbc", "rxstbc", "Frames received w/ STBC encoding" }, 2722cdc5a48SAdrian Chadd #define S_TX_HTPROTECT AFTER(S_RX_STBC) 273b1b75b3bSAdrian Chadd { 7, "txhtprot", "txhtprot", "Frames transmitted with HT Protection" }, 274b1b75b3bSAdrian Chadd #define S_RX_QEND AFTER(S_TX_HTPROTECT) 275b1b75b3bSAdrian Chadd { 7, "rxquend", "rxquend", "Hit end of RX descriptor queue" }, 276b1b75b3bSAdrian Chadd #define S_TX_TIMEOUT AFTER(S_RX_QEND) 277b1b75b3bSAdrian Chadd { 4, "txtimeout", "TXTX", "TX Timeout" }, 278b1b75b3bSAdrian Chadd #define S_TX_CSTIMEOUT AFTER(S_TX_TIMEOUT) 279b1b75b3bSAdrian Chadd { 4, "csttimeout", "CSTX", "Carrier Sense Timeout" }, 280b1b75b3bSAdrian Chadd #define S_TX_XTXOP_ERR AFTER(S_TX_CSTIMEOUT) 281b1b75b3bSAdrian Chadd { 5, "xtxoperr", "TXOPX", "TXOP exceed" }, 282b1b75b3bSAdrian Chadd #define S_TX_TIMEREXPIRED_ERR AFTER(S_TX_XTXOP_ERR) 283b1b75b3bSAdrian Chadd { 7, "texperr", "texperr", "TX Timer expired" }, 284b1b75b3bSAdrian Chadd #define S_TX_DESCCFG_ERR AFTER(S_TX_TIMEREXPIRED_ERR) 285b1b75b3bSAdrian Chadd { 10, "desccfgerr", "desccfgerr", "TX descriptor error" }, 286b1b75b3bSAdrian Chadd #define S_TX_SWRETRIES AFTER(S_TX_DESCCFG_ERR) 287b1b75b3bSAdrian Chadd { 9, "txswretry", "txswretry", "Number of frames retransmitted in software" }, 288b1b75b3bSAdrian Chadd #define S_TX_SWRETRIES_MAX AFTER(S_TX_SWRETRIES) 289b1b75b3bSAdrian Chadd { 7, "txswmax", "txswmax", "Number of frames exceeding software retry" }, 290b1b75b3bSAdrian Chadd #define S_TX_DATA_UNDERRUN AFTER(S_TX_SWRETRIES_MAX) 291b1b75b3bSAdrian Chadd { 5, "txdataunderrun", "TXDAU", "A-MPDU TX FIFO data underrun" }, 292b1b75b3bSAdrian Chadd #define S_TX_DELIM_UNDERRUN AFTER(S_TX_DATA_UNDERRUN) 293b1b75b3bSAdrian Chadd { 5, "txdelimunderrun", "TXDEU", "A-MPDU TX Delimiter underrun" }, 2941df8da4cSAdrian Chadd #define S_TX_AGGR_OK AFTER(S_TX_DELIM_UNDERRUN) 2951df8da4cSAdrian Chadd { 5, "txaggrok", "TXAOK", "A-MPDU sub-frame TX attempt success" }, 2961df8da4cSAdrian Chadd #define S_TX_AGGR_FAIL AFTER(S_TX_AGGR_OK) 297317d14cfSAdrian Chadd { 4, "txaggrfail", "TXAF", "A-MPDU sub-frame TX attempt failures" }, 2981df8da4cSAdrian Chadd #define S_TX_AGGR_FAILALL AFTER(S_TX_AGGR_FAIL) 299317d14cfSAdrian Chadd { 7, "txaggrfailall", "TXAFALL", "A-MPDU TX frame failures" }, 300*079bd2e7SAdrian Chadd #define S_TX_MCASTQ_OVERFLOW AFTER(S_TX_AGGR_FAILALL) 301*079bd2e7SAdrian Chadd { 8, "txmcastqovf", "TXMCQOVF", "TX multicast queue overflow" }, 302*079bd2e7SAdrian Chadd #define S_RX_KEYMISS AFTER(S_TX_MCASTQ_OVERFLOW) 303*079bd2e7SAdrian Chadd { 4, "rxkeymiss", "RXKM", "RX crypto key miss" }, 304*079bd2e7SAdrian Chadd #define S_TX_SWFILTERED AFTER(S_RX_KEYMISS) 305*079bd2e7SAdrian Chadd { 7, "txswfilt", "TXSWFLT", "TX frames filtered by hw and retried" }, 306*079bd2e7SAdrian Chadd #define S_TX_NODE_PSQ_OVERFLOW AFTER(S_TX_SWFILTERED) 307*079bd2e7SAdrian Chadd { 8, "txpsqovf", "TXPSQOVF", "TX frames overflowed the power save queue" }, 308*079bd2e7SAdrian Chadd #define S_TX_NODEQ_OVERFLOW AFTER(S_TX_NODE_PSQ_OVERFLOW) 309*079bd2e7SAdrian Chadd { 8, "txnqovf", "TXNQOVF", "TX frames overflowed the node queue" }, 310*079bd2e7SAdrian Chadd #define S_TX_LDPC AFTER(S_TX_NODEQ_OVERFLOW) 311*079bd2e7SAdrian Chadd { 6, "txldpc", "TXLDPC", "TX frames transmitted with LDPC" }, 312*079bd2e7SAdrian Chadd #define S_TX_STBC AFTER(S_TX_LDPC) 313*079bd2e7SAdrian Chadd { 6, "txstbc", "TXSTBC", "TX frames transmitted with STBC" }, 314*079bd2e7SAdrian Chadd #define S_TSFOOR AFTER(S_TX_STBC) 315*079bd2e7SAdrian Chadd { 6, "tsfoor", "TSFOOR", "TSF overflow interrupt/restarts" }, 316*079bd2e7SAdrian Chadd #define S_CABQ_XMIT AFTER(S_TSFOOR) 3178e787d67SAdrian Chadd { 7, "cabxmit", "cabxmit", "cabq frames transmitted" }, 318207ae002SSam Leffler #define S_CABQ_BUSY AFTER(S_CABQ_XMIT) 3198e787d67SAdrian Chadd { 8, "cabqbusy", "cabqbusy", "cabq xmit overflowed beacon interval" }, 320207ae002SSam Leffler #define S_TX_NODATA AFTER(S_CABQ_BUSY) 3218e787d67SAdrian Chadd { 8, "txnodata", "txnodata", "tx discarded empty frame" }, 322207ae002SSam Leffler #define S_TX_BUSDMA AFTER(S_TX_NODATA) 3238e787d67SAdrian Chadd { 8, "txbusdma", "txbusdma", "tx failed for dma resrcs" }, 324207ae002SSam Leffler #define S_RX_BUSDMA AFTER(S_TX_BUSDMA) 3258e787d67SAdrian Chadd { 8, "rxbusdma", "rxbusdma", "rx setup failed for dma resrcs" }, 326207ae002SSam Leffler #define S_FF_TXOK AFTER(S_RX_BUSDMA) 3272f549d72SSam Leffler { 5, "fftxok", "fftxok", "fast frames xmit successfully" }, 328207ae002SSam Leffler #define S_FF_TXERR AFTER(S_FF_TXOK) 3292f549d72SSam Leffler { 5, "fftxerr", "fftxerr", "fast frames not xmit due to error" }, 330207ae002SSam Leffler #define S_FF_RX AFTER(S_FF_TXERR) 3312f549d72SSam Leffler { 5, "ffrx", "ffrx", "fast frames received" }, 332207ae002SSam Leffler #define S_FF_FLUSH AFTER(S_FF_RX) 3332f549d72SSam Leffler { 5, "ffflush", "ffflush", "fast frames flushed from staging q" }, 334207ae002SSam Leffler #define S_TX_QFULL AFTER(S_FF_FLUSH) 335207ae002SSam Leffler { 5, "txqfull", "txqfull", "tx discarded 'cuz queue is full" }, 336207ae002SSam Leffler #define S_ANT_DEFSWITCH AFTER(S_TX_QFULL) 3372f549d72SSam Leffler { 5, "defsw", "defsw", "switched default/rx antenna" }, 338207ae002SSam Leffler #define S_ANT_TXSWITCH AFTER(S_ANT_DEFSWITCH) 3392f549d72SSam Leffler { 5, "txsw", "txsw", "tx used alternate antenna" }, 3404d490647SSam Leffler #ifdef ATH_SUPPORT_ANI 3414d490647SSam Leffler #define S_ANI_NOISE AFTER(S_ANT_TXSWITCH) 3424d490647SSam Leffler { 2, "ni", "NI", "noise immunity level" }, 3434d490647SSam Leffler #define S_ANI_SPUR AFTER(S_ANI_NOISE) 3444d490647SSam Leffler { 2, "si", "SI", "spur immunity level" }, 3454d490647SSam Leffler #define S_ANI_STEP AFTER(S_ANI_SPUR) 3464d490647SSam Leffler { 2, "step", "ST", "first step level" }, 3474d490647SSam Leffler #define S_ANI_OFDM AFTER(S_ANI_STEP) 3484d490647SSam Leffler { 4, "owsd", "OWSD", "OFDM weak signal detect" }, 3494d490647SSam Leffler #define S_ANI_CCK AFTER(S_ANI_OFDM) 3504d490647SSam Leffler { 4, "cwst", "CWST", "CCK weak signal threshold" }, 3514d490647SSam Leffler #define S_ANI_MAXSPUR AFTER(S_ANI_CCK) 3524d490647SSam Leffler { 3, "maxsi","MSI", "max spur immunity level" }, 3534d490647SSam Leffler #define S_ANI_LISTEN AFTER(S_ANI_MAXSPUR) 3544d490647SSam Leffler { 6, "listen","LISTEN", "listen time" }, 3554d490647SSam Leffler #define S_ANI_NIUP AFTER(S_ANI_LISTEN) 356582aab3bSAdrian Chadd { 4, "ni+", "NI+", "ANI increased noise immunity" }, 3574d490647SSam Leffler #define S_ANI_NIDOWN AFTER(S_ANI_NIUP) 3584d490647SSam Leffler { 4, "ni-", "NI-", "ANI decrease noise immunity" }, 3594d490647SSam Leffler #define S_ANI_SIUP AFTER(S_ANI_NIDOWN) 3604d490647SSam Leffler { 4, "si+", "SI+", "ANI increased spur immunity" }, 3614d490647SSam Leffler #define S_ANI_SIDOWN AFTER(S_ANI_SIUP) 3624d490647SSam Leffler { 4, "si-", "SI-", "ANI decrease spur immunity" }, 3634d490647SSam Leffler #define S_ANI_OFDMON AFTER(S_ANI_SIDOWN) 3644d490647SSam Leffler { 5, "ofdm+","OFDM+", "ANI enabled OFDM weak signal detect" }, 3654d490647SSam Leffler #define S_ANI_OFDMOFF AFTER(S_ANI_OFDMON) 3664d490647SSam Leffler { 5, "ofdm-","OFDM-", "ANI disabled OFDM weak signal detect" }, 3674d490647SSam Leffler #define S_ANI_CCKHI AFTER(S_ANI_OFDMOFF) 3684d490647SSam Leffler { 5, "cck+", "CCK+", "ANI enabled CCK weak signal threshold" }, 3694d490647SSam Leffler #define S_ANI_CCKLO AFTER(S_ANI_CCKHI) 3704d490647SSam Leffler { 5, "cck-", "CCK-", "ANI disabled CCK weak signal threshold" }, 3714d490647SSam Leffler #define S_ANI_STEPUP AFTER(S_ANI_CCKLO) 3724d490647SSam Leffler { 5, "step+","STEP+", "ANI increased first step level" }, 3734d490647SSam Leffler #define S_ANI_STEPDOWN AFTER(S_ANI_STEPUP) 3744d490647SSam Leffler { 5, "step-","STEP-", "ANI decreased first step level" }, 3754d490647SSam Leffler #define S_ANI_OFDMERRS AFTER(S_ANI_STEPDOWN) 37695d7bf0fSSam Leffler { 8, "ofdm", "OFDM", "cumulative OFDM phy error count" }, 3774d490647SSam Leffler #define S_ANI_CCKERRS AFTER(S_ANI_OFDMERRS) 37895d7bf0fSSam Leffler { 8, "cck", "CCK", "cumulative CCK phy error count" }, 3794d490647SSam Leffler #define S_ANI_RESET AFTER(S_ANI_CCKERRS) 3804d490647SSam Leffler { 5, "reset","RESET", "ANI parameters zero'd for non-STA operation" }, 3814d490647SSam Leffler #define S_ANI_LZERO AFTER(S_ANI_RESET) 3824d490647SSam Leffler { 5, "lzero","LZERO", "ANI forced listen time to zero" }, 3834d490647SSam Leffler #define S_ANI_LNEG AFTER(S_ANI_LZERO) 3844d490647SSam Leffler { 5, "lneg", "LNEG", "ANI calculated listen time < 0" }, 3854d490647SSam Leffler #define S_MIB_ACKBAD AFTER(S_ANI_LNEG) 38695d7bf0fSSam Leffler { 5, "ackbad","ACKBAD", "missing ACK's" }, 3874d490647SSam Leffler #define S_MIB_RTSBAD AFTER(S_MIB_ACKBAD) 38895d7bf0fSSam Leffler { 5, "rtsbad","RTSBAD", "RTS without CTS" }, 3894d490647SSam Leffler #define S_MIB_RTSGOOD AFTER(S_MIB_RTSBAD) 39095d7bf0fSSam Leffler { 5, "rtsgood","RTSGOOD", "successful RTS" }, 3914d490647SSam Leffler #define S_MIB_FCSBAD AFTER(S_MIB_RTSGOOD) 39295d7bf0fSSam Leffler { 5, "fcsbad","FCSBAD", "bad FCS" }, 3934d490647SSam Leffler #define S_MIB_BEACONS AFTER(S_MIB_FCSBAD) 39495d7bf0fSSam Leffler { 5, "beacons","beacons", "beacons received" }, 3954d490647SSam Leffler #define S_NODE_AVGBRSSI AFTER(S_MIB_BEACONS) 3964d490647SSam Leffler { 3, "avgbrssi","BSI", "average rssi (beacons only)" }, 3974d490647SSam Leffler #define S_NODE_AVGRSSI AFTER(S_NODE_AVGBRSSI) 3984d490647SSam Leffler { 3, "avgrssi","DSI", "average rssi (all rx'd frames)" }, 3994d490647SSam Leffler #define S_NODE_AVGARSSI AFTER(S_NODE_AVGRSSI) 4004d490647SSam Leffler { 3, "avgtxrssi","TSI", "average rssi (ACKs only)" }, 4014d490647SSam Leffler #define S_ANT_TX0 AFTER(S_NODE_AVGARSSI) 4024d490647SSam Leffler #else 403207ae002SSam Leffler #define S_ANT_TX0 AFTER(S_ANT_TXSWITCH) 4044d490647SSam Leffler #endif /* ATH_SUPPORT_ANI */ 40595d7bf0fSSam Leffler { 8, "tx0", "ant0(tx)", "frames tx on antenna 0" }, 406207ae002SSam Leffler #define S_ANT_TX1 AFTER(S_ANT_TX0) 40795d7bf0fSSam Leffler { 8, "tx1", "ant1(tx)", "frames tx on antenna 1" }, 408207ae002SSam Leffler #define S_ANT_TX2 AFTER(S_ANT_TX1) 40995d7bf0fSSam Leffler { 8, "tx2", "ant2(tx)", "frames tx on antenna 2" }, 410207ae002SSam Leffler #define S_ANT_TX3 AFTER(S_ANT_TX2) 41195d7bf0fSSam Leffler { 8, "tx3", "ant3(tx)", "frames tx on antenna 3" }, 412207ae002SSam Leffler #define S_ANT_TX4 AFTER(S_ANT_TX3) 41395d7bf0fSSam Leffler { 8, "tx4", "ant4(tx)", "frames tx on antenna 4" }, 414207ae002SSam Leffler #define S_ANT_TX5 AFTER(S_ANT_TX4) 41595d7bf0fSSam Leffler { 8, "tx5", "ant5(tx)", "frames tx on antenna 5" }, 416207ae002SSam Leffler #define S_ANT_TX6 AFTER(S_ANT_TX5) 41795d7bf0fSSam Leffler { 8, "tx6", "ant6(tx)", "frames tx on antenna 6" }, 418207ae002SSam Leffler #define S_ANT_TX7 AFTER(S_ANT_TX6) 41995d7bf0fSSam Leffler { 8, "tx7", "ant7(tx)", "frames tx on antenna 7" }, 420207ae002SSam Leffler #define S_ANT_RX0 AFTER(S_ANT_TX7) 42195d7bf0fSSam Leffler { 8, "rx0", "ant0(rx)", "frames rx on antenna 0" }, 422207ae002SSam Leffler #define S_ANT_RX1 AFTER(S_ANT_RX0) 42395d7bf0fSSam Leffler { 8, "rx1", "ant1(rx)", "frames rx on antenna 1" }, 424207ae002SSam Leffler #define S_ANT_RX2 AFTER(S_ANT_RX1) 42595d7bf0fSSam Leffler { 8, "rx2", "ant2(rx)", "frames rx on antenna 2" }, 426207ae002SSam Leffler #define S_ANT_RX3 AFTER(S_ANT_RX2) 42795d7bf0fSSam Leffler { 8, "rx3", "ant3(rx)", "frames rx on antenna 3" }, 428207ae002SSam Leffler #define S_ANT_RX4 AFTER(S_ANT_RX3) 42995d7bf0fSSam Leffler { 8, "rx4", "ant4(rx)", "frames rx on antenna 4" }, 430207ae002SSam Leffler #define S_ANT_RX5 AFTER(S_ANT_RX4) 43195d7bf0fSSam Leffler { 8, "rx5", "ant5(rx)", "frames rx on antenna 5" }, 432207ae002SSam Leffler #define S_ANT_RX6 AFTER(S_ANT_RX5) 43395d7bf0fSSam Leffler { 8, "rx6", "ant6(rx)", "frames rx on antenna 6" }, 434207ae002SSam Leffler #define S_ANT_RX7 AFTER(S_ANT_RX6) 43595d7bf0fSSam Leffler { 8, "rx7", "ant7(rx)", "frames rx on antenna 7" }, 436207ae002SSam Leffler #define S_TX_SIGNAL AFTER(S_ANT_RX7) 4372f549d72SSam Leffler { 4, "asignal", "asig", "signal of last ack (dBm)" }, 438207ae002SSam Leffler #define S_RX_SIGNAL AFTER(S_TX_SIGNAL) 4392f549d72SSam Leffler { 4, "signal", "sig", "avg recv signal (dBm)" }, 440d90b001eSAdrian Chadd #define S_BMISSCOUNT AFTER(S_RX_SIGNAL) 441d90b001eSAdrian Chadd { 8, "bmisscount", "bmisscnt", "beacon miss count" }, 44212f961f4SSam Leffler }; 4432f549d72SSam Leffler #define S_PHY_MIN S_RX_PHY_UNDERRUN 4442f549d72SSam Leffler #define S_PHY_MAX S_RX_PHY_CCK_RESTART 4452f549d72SSam Leffler #define S_LAST S_ANT_TX0 446d90b001eSAdrian Chadd #define S_MAX S_BMISSCOUNT+1 44712f961f4SSam Leffler 448207ae002SSam Leffler struct _athstats { 449207ae002SSam Leffler struct ath_stats ath; 4504d490647SSam Leffler #ifdef ATH_SUPPORT_ANI 451582aab3bSAdrian Chadd HAL_ANI_STATS ani_stats; 452582aab3bSAdrian Chadd HAL_ANI_STATE ani_state; 4534d490647SSam Leffler #endif 454207ae002SSam Leffler }; 455207ae002SSam Leffler 4562f549d72SSam Leffler struct athstatfoo_p { 4572f549d72SSam Leffler struct athstatfoo base; 458207ae002SSam Leffler int optstats; 4594f0edd39SAdrian Chadd struct ath_driver_req req; 4604d490647SSam Leffler #define ATHSTATS_ANI 0x0001 461207ae002SSam Leffler struct ath_diag atd; 462207ae002SSam Leffler struct _athstats cur; 463207ae002SSam Leffler struct _athstats total; 4642f549d72SSam Leffler }; 46512f961f4SSam Leffler 4662f549d72SSam Leffler static void 4672f549d72SSam Leffler ath_setifname(struct athstatfoo *wf0, const char *ifname) 4682f549d72SSam Leffler { 4692f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) wf0; 47012f961f4SSam Leffler 4714f0edd39SAdrian Chadd ath_driver_req_close(&wf->req); 4724f0edd39SAdrian Chadd (void) ath_driver_req_open(&wf->req, ifname); 4734d490647SSam Leffler #ifdef ATH_SUPPORT_ANI 4744d490647SSam Leffler strncpy(wf->atd.ad_name, ifname, sizeof (wf->atd.ad_name)); 4754d490647SSam Leffler wf->optstats |= ATHSTATS_ANI; 4764d490647SSam Leffler #endif 47712f961f4SSam Leffler } 47812f961f4SSam Leffler 4792f549d72SSam Leffler static void 480dd8d00f5SSam Leffler ath_zerostats(struct athstatfoo *wf0) 481dd8d00f5SSam Leffler { 482dd8d00f5SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) wf0; 483dd8d00f5SSam Leffler 4844f0edd39SAdrian Chadd if (ath_driver_req_zero_stats(&wf->req) < 0) 4854f0edd39SAdrian Chadd exit(-1); 486dd8d00f5SSam Leffler } 487dd8d00f5SSam Leffler 488dd8d00f5SSam Leffler static void 489207ae002SSam Leffler ath_collect(struct athstatfoo_p *wf, struct _athstats *stats) 4902f549d72SSam Leffler { 4914f0edd39SAdrian Chadd 4924f0edd39SAdrian Chadd if (ath_driver_req_fetch_stats(&wf->req, &stats->ath) < 0) 4934f0edd39SAdrian Chadd exit(1); 4944d490647SSam Leffler #ifdef ATH_SUPPORT_ANI 4954d490647SSam Leffler if (wf->optstats & ATHSTATS_ANI) { 4964f0edd39SAdrian Chadd 4974f0edd39SAdrian Chadd /* XXX TODO: convert */ 498582aab3bSAdrian Chadd wf->atd.ad_id = HAL_DIAG_ANI_CURRENT; /* HAL_DIAG_ANI_CURRENT */ 4994d490647SSam Leffler wf->atd.ad_out_data = (caddr_t) &stats->ani_state; 5004d490647SSam Leffler wf->atd.ad_out_size = sizeof(stats->ani_state); 5014f0edd39SAdrian Chadd if (ath_driver_req_fetch_diag(&wf->req, SIOCGATHDIAG, 5024f0edd39SAdrian Chadd &wf->atd) < 0) { 5034d490647SSam Leffler wf->optstats &= ~ATHSTATS_ANI; 5044d490647SSam Leffler } 5054f0edd39SAdrian Chadd 5064f0edd39SAdrian Chadd /* XXX TODO: convert */ 507582aab3bSAdrian Chadd wf->atd.ad_id = HAL_DIAG_ANI_STATS; /* HAL_DIAG_ANI_STATS */ 5084d490647SSam Leffler wf->atd.ad_out_data = (caddr_t) &stats->ani_stats; 5094d490647SSam Leffler wf->atd.ad_out_size = sizeof(stats->ani_stats); 5104f0edd39SAdrian Chadd (void) ath_driver_req_fetch_diag(&wf->req, SIOCGATHDIAG, 5114f0edd39SAdrian Chadd &wf->atd); 5124d490647SSam Leffler } 5134d490647SSam Leffler #endif /* ATH_SUPPORT_ANI */ 51412f961f4SSam Leffler } 5152f549d72SSam Leffler 5162f549d72SSam Leffler static void 51715abc53aSAdrian Chadd ath_collect_cur(struct bsdstat *sf) 5182f549d72SSam Leffler { 5192f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf; 5202f549d72SSam Leffler 5212f549d72SSam Leffler ath_collect(wf, &wf->cur); 5222f549d72SSam Leffler } 5232f549d72SSam Leffler 5242f549d72SSam Leffler static void 52515abc53aSAdrian Chadd ath_collect_tot(struct bsdstat *sf) 5262f549d72SSam Leffler { 5272f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf; 5282f549d72SSam Leffler 5292f549d72SSam Leffler ath_collect(wf, &wf->total); 5302f549d72SSam Leffler } 5312f549d72SSam Leffler 5322f549d72SSam Leffler static void 53315abc53aSAdrian Chadd ath_update_tot(struct bsdstat *sf) 5342f549d72SSam Leffler { 5352f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf; 5362f549d72SSam Leffler 5372f549d72SSam Leffler wf->total = wf->cur; 5382f549d72SSam Leffler } 5392f549d72SSam Leffler 5404d490647SSam Leffler static void 5414d490647SSam Leffler snprintrate(char b[], size_t bs, int rate) 5424d490647SSam Leffler { 5434d490647SSam Leffler if (rate & IEEE80211_RATE_MCS) 5444d490647SSam Leffler snprintf(b, bs, "MCS%u", rate &~ IEEE80211_RATE_MCS); 5454d490647SSam Leffler else if (rate & 1) 5464d490647SSam Leffler snprintf(b, bs, "%u.5M", rate / 2); 5474d490647SSam Leffler else 5484d490647SSam Leffler snprintf(b, bs, "%uM", rate / 2); 5494d490647SSam Leffler } 5504d490647SSam Leffler 5512f549d72SSam Leffler static int 55215abc53aSAdrian Chadd ath_get_curstat(struct bsdstat *sf, int s, char b[], size_t bs) 5532f549d72SSam Leffler { 5542f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf; 5552f549d72SSam Leffler #define STAT(x) \ 556207ae002SSam Leffler snprintf(b, bs, "%u", wf->cur.ath.ast_##x - wf->total.ath.ast_##x); return 1 5572f549d72SSam Leffler #define PHY(x) \ 558207ae002SSam Leffler snprintf(b, bs, "%u", wf->cur.ath.ast_rx_phy[x] - wf->total.ath.ast_rx_phy[x]); return 1 5594d490647SSam Leffler #define ANI(x) \ 5604d490647SSam Leffler snprintf(b, bs, "%u", wf->cur.ani_state.x); return 1 5614d490647SSam Leffler #define ANISTAT(x) \ 5624d490647SSam Leffler snprintf(b, bs, "%u", wf->cur.ani_stats.ast_ani_##x - wf->total.ani_stats.ast_ani_##x); return 1 5634d490647SSam Leffler #define MIBSTAT(x) \ 5644d490647SSam Leffler snprintf(b, bs, "%u", wf->cur.ani_stats.ast_mibstats.x - wf->total.ani_stats.ast_mibstats.x); return 1 5652f549d72SSam Leffler #define TXANT(x) \ 566207ae002SSam Leffler snprintf(b, bs, "%u", wf->cur.ath.ast_ant_tx[x] - wf->total.ath.ast_ant_tx[x]); return 1 5672f549d72SSam Leffler #define RXANT(x) \ 568207ae002SSam Leffler snprintf(b, bs, "%u", wf->cur.ath.ast_ant_rx[x] - wf->total.ath.ast_ant_rx[x]); return 1 5692f549d72SSam Leffler 5702f549d72SSam Leffler switch (s) { 5712f549d72SSam Leffler case S_INPUT: 5722f549d72SSam Leffler snprintf(b, bs, "%lu", 5735205fa34SAdrian Chadd (unsigned long) 5745205fa34SAdrian Chadd ((wf->cur.ath.ast_rx_packets - wf->total.ath.ast_rx_packets) - 5755205fa34SAdrian Chadd (wf->cur.ath.ast_rx_mgt - wf->total.ath.ast_rx_mgt))); 5762f549d72SSam Leffler return 1; 5772f549d72SSam Leffler case S_OUTPUT: 5782f549d72SSam Leffler snprintf(b, bs, "%lu", 5795205fa34SAdrian Chadd (unsigned long) 5805205fa34SAdrian Chadd (wf->cur.ath.ast_tx_packets - wf->total.ath.ast_tx_packets)); 5812f549d72SSam Leffler return 1; 5822f549d72SSam Leffler case S_RATE: 5834d490647SSam Leffler snprintrate(b, bs, wf->cur.ath.ast_tx_rate); 5842f549d72SSam Leffler return 1; 5852f549d72SSam Leffler case S_WATCHDOG: STAT(watchdog); 5862f549d72SSam Leffler case S_FATAL: STAT(hardware); 5872f549d72SSam Leffler case S_BMISS: STAT(bmiss); 5882f549d72SSam Leffler case S_BMISS_PHANTOM: STAT(bmiss_phantom); 5892f549d72SSam Leffler #ifdef S_BSTUCK 5902f549d72SSam Leffler case S_BSTUCK: STAT(bstuck); 5912f549d72SSam Leffler #endif 5922f549d72SSam Leffler case S_RXORN: STAT(rxorn); 5932f549d72SSam Leffler case S_RXEOL: STAT(rxeol); 5942f549d72SSam Leffler case S_TXURN: STAT(txurn); 5952f549d72SSam Leffler case S_MIB: STAT(mib); 5962f549d72SSam Leffler #ifdef S_INTRCOAL 5972f549d72SSam Leffler case S_INTRCOAL: STAT(intrcoal); 5982f549d72SSam Leffler #endif 5992f549d72SSam Leffler case S_TX_MGMT: STAT(tx_mgmt); 6002f549d72SSam Leffler case S_TX_DISCARD: STAT(tx_discard); 6012f549d72SSam Leffler case S_TX_QSTOP: STAT(tx_qstop); 6022f549d72SSam Leffler case S_TX_ENCAP: STAT(tx_encap); 6032f549d72SSam Leffler case S_TX_NONODE: STAT(tx_nonode); 60441e449dbSSam Leffler case S_TX_NOBUF: STAT(tx_nobuf); 60541e449dbSSam Leffler case S_TX_NOFRAG: STAT(tx_nofrag); 6062f549d72SSam Leffler case S_TX_NOMBUF: STAT(tx_nombuf); 6072f549d72SSam Leffler #ifdef S_TX_NOMCL 6082f549d72SSam Leffler case S_TX_NOMCL: STAT(tx_nomcl); 6092f549d72SSam Leffler case S_TX_LINEAR: STAT(tx_linear); 6102f549d72SSam Leffler case S_TX_NODATA: STAT(tx_nodata); 6112f549d72SSam Leffler case S_TX_BUSDMA: STAT(tx_busdma); 6122f549d72SSam Leffler #endif 6132f549d72SSam Leffler case S_TX_XRETRIES: STAT(tx_xretries); 6142f549d72SSam Leffler case S_TX_FIFOERR: STAT(tx_fifoerr); 6152f549d72SSam Leffler case S_TX_FILTERED: STAT(tx_filtered); 6162f549d72SSam Leffler case S_TX_SHORTRETRY: STAT(tx_shortretry); 6172f549d72SSam Leffler case S_TX_LONGRETRY: STAT(tx_longretry); 6182f549d72SSam Leffler case S_TX_BADRATE: STAT(tx_badrate); 6192f549d72SSam Leffler case S_TX_NOACK: STAT(tx_noack); 6202f549d72SSam Leffler case S_TX_RTS: STAT(tx_rts); 6212f549d72SSam Leffler case S_TX_CTS: STAT(tx_cts); 6222f549d72SSam Leffler case S_TX_SHORTPRE: STAT(tx_shortpre); 6232f549d72SSam Leffler case S_TX_ALTRATE: STAT(tx_altrate); 6242f549d72SSam Leffler case S_TX_PROTECT: STAT(tx_protect); 625cc5912f8SSam Leffler case S_TX_RAW: STAT(tx_raw); 626cc5912f8SSam Leffler case S_TX_RAW_FAIL: STAT(tx_raw_fail); 6272f549d72SSam Leffler case S_RX_NOMBUF: STAT(rx_nombuf); 6282f549d72SSam Leffler #ifdef S_RX_BUSDMA 6292f549d72SSam Leffler case S_RX_BUSDMA: STAT(rx_busdma); 6302f549d72SSam Leffler #endif 6312f549d72SSam Leffler case S_RX_ORN: STAT(rx_orn); 6322f549d72SSam Leffler case S_RX_CRC_ERR: STAT(rx_crcerr); 6332f549d72SSam Leffler case S_RX_FIFO_ERR: STAT(rx_fifoerr); 6342f549d72SSam Leffler case S_RX_CRYPTO_ERR: STAT(rx_badcrypt); 6352f549d72SSam Leffler case S_RX_MIC_ERR: STAT(rx_badmic); 6362f549d72SSam Leffler case S_RX_PHY_ERR: STAT(rx_phyerr); 6372f549d72SSam Leffler case S_RX_PHY_UNDERRUN: PHY(HAL_PHYERR_UNDERRUN); 6382f549d72SSam Leffler case S_RX_PHY_TIMING: PHY(HAL_PHYERR_TIMING); 6392f549d72SSam Leffler case S_RX_PHY_PARITY: PHY(HAL_PHYERR_PARITY); 6402f549d72SSam Leffler case S_RX_PHY_RATE: PHY(HAL_PHYERR_RATE); 6412f549d72SSam Leffler case S_RX_PHY_LENGTH: PHY(HAL_PHYERR_LENGTH); 6422f549d72SSam Leffler case S_RX_PHY_RADAR: PHY(HAL_PHYERR_RADAR); 6432f549d72SSam Leffler case S_RX_PHY_SERVICE: PHY(HAL_PHYERR_SERVICE); 6442f549d72SSam Leffler case S_RX_PHY_TOR: PHY(HAL_PHYERR_TOR); 6452f549d72SSam Leffler case S_RX_PHY_OFDM_TIMING: PHY(HAL_PHYERR_OFDM_TIMING); 6462f549d72SSam Leffler case S_RX_PHY_OFDM_SIGNAL_PARITY: PHY(HAL_PHYERR_OFDM_SIGNAL_PARITY); 6472f549d72SSam Leffler case S_RX_PHY_OFDM_RATE_ILLEGAL: PHY(HAL_PHYERR_OFDM_RATE_ILLEGAL); 6482f549d72SSam Leffler case S_RX_PHY_OFDM_POWER_DROP: PHY(HAL_PHYERR_OFDM_POWER_DROP); 6492f549d72SSam Leffler case S_RX_PHY_OFDM_SERVICE: PHY(HAL_PHYERR_OFDM_SERVICE); 6502f549d72SSam Leffler case S_RX_PHY_OFDM_RESTART: PHY(HAL_PHYERR_OFDM_RESTART); 6512f549d72SSam Leffler case S_RX_PHY_CCK_TIMING: PHY(HAL_PHYERR_CCK_TIMING); 6522f549d72SSam Leffler case S_RX_PHY_CCK_HEADER_CRC: PHY(HAL_PHYERR_CCK_HEADER_CRC); 6532f549d72SSam Leffler case S_RX_PHY_CCK_RATE_ILLEGAL: PHY(HAL_PHYERR_CCK_RATE_ILLEGAL); 6542f549d72SSam Leffler case S_RX_PHY_CCK_SERVICE: PHY(HAL_PHYERR_CCK_SERVICE); 6552f549d72SSam Leffler case S_RX_PHY_CCK_RESTART: PHY(HAL_PHYERR_CCK_RESTART); 6562f549d72SSam Leffler case S_RX_TOOSHORT: STAT(rx_tooshort); 6572f549d72SSam Leffler case S_RX_TOOBIG: STAT(rx_toobig); 6582f549d72SSam Leffler case S_RX_MGT: STAT(rx_mgt); 6592f549d72SSam Leffler case S_RX_CTL: STAT(rx_ctl); 6602f549d72SSam Leffler case S_TX_RSSI: 661207ae002SSam Leffler snprintf(b, bs, "%d", wf->cur.ath.ast_tx_rssi); 6622f549d72SSam Leffler return 1; 6632f549d72SSam Leffler case S_RX_RSSI: 664207ae002SSam Leffler snprintf(b, bs, "%d", wf->cur.ath.ast_rx_rssi); 6652f549d72SSam Leffler return 1; 6662f549d72SSam Leffler case S_BE_XMIT: STAT(be_xmit); 6672f549d72SSam Leffler case S_BE_NOMBUF: STAT(be_nombuf); 6682f549d72SSam Leffler case S_PER_CAL: STAT(per_cal); 6692f549d72SSam Leffler case S_PER_CALFAIL: STAT(per_calfail); 6702f549d72SSam Leffler case S_PER_RFGAIN: STAT(per_rfgain); 6712f549d72SSam Leffler #ifdef S_TDMA_UPDATE 6722f549d72SSam Leffler case S_TDMA_UPDATE: STAT(tdma_update); 6732f549d72SSam Leffler case S_TDMA_TIMERS: STAT(tdma_timers); 6742f549d72SSam Leffler case S_TDMA_TSF: STAT(tdma_tsf); 67510ad9a77SSam Leffler case S_TDMA_TSFADJ: 67610ad9a77SSam Leffler snprintf(b, bs, "-%d/+%d", 67710ad9a77SSam Leffler wf->cur.ath.ast_tdma_tsfadjm, wf->cur.ath.ast_tdma_tsfadjp); 67810ad9a77SSam Leffler return 1; 679cc5912f8SSam Leffler case S_TDMA_ACK: STAT(tdma_ack); 6802f549d72SSam Leffler #endif 6812f549d72SSam Leffler case S_RATE_CALLS: STAT(rate_calls); 6822f549d72SSam Leffler case S_RATE_RAISE: STAT(rate_raise); 6832f549d72SSam Leffler case S_RATE_DROP: STAT(rate_drop); 6842f549d72SSam Leffler case S_ANT_DEFSWITCH: STAT(ant_defswitch); 6852f549d72SSam Leffler case S_ANT_TXSWITCH: STAT(ant_txswitch); 6864d490647SSam Leffler #ifdef S_ANI_NOISE 6874d490647SSam Leffler case S_ANI_NOISE: ANI(noiseImmunityLevel); 6884d490647SSam Leffler case S_ANI_SPUR: ANI(spurImmunityLevel); 6894d490647SSam Leffler case S_ANI_STEP: ANI(firstepLevel); 6904d490647SSam Leffler case S_ANI_OFDM: ANI(ofdmWeakSigDetectOff); 69104fc88d5SSam Leffler case S_ANI_CCK: ANI(cckWeakSigThreshold); 6924d490647SSam Leffler case S_ANI_LISTEN: ANI(listenTime); 6934d490647SSam Leffler case S_ANI_NIUP: ANISTAT(niup); 6944d490647SSam Leffler case S_ANI_NIDOWN: ANISTAT(nidown); 6954d490647SSam Leffler case S_ANI_SIUP: ANISTAT(spurup); 6964d490647SSam Leffler case S_ANI_SIDOWN: ANISTAT(spurdown); 6974d490647SSam Leffler case S_ANI_OFDMON: ANISTAT(ofdmon); 6984d490647SSam Leffler case S_ANI_OFDMOFF: ANISTAT(ofdmoff); 6994d490647SSam Leffler case S_ANI_CCKHI: ANISTAT(cckhigh); 7004d490647SSam Leffler case S_ANI_CCKLO: ANISTAT(ccklow); 7014d490647SSam Leffler case S_ANI_STEPUP: ANISTAT(stepup); 7024d490647SSam Leffler case S_ANI_STEPDOWN: ANISTAT(stepdown); 7034d490647SSam Leffler case S_ANI_OFDMERRS: ANISTAT(ofdmerrs); 7044d490647SSam Leffler case S_ANI_CCKERRS: ANISTAT(cckerrs); 7054d490647SSam Leffler case S_ANI_RESET: ANISTAT(reset); 7064d490647SSam Leffler case S_ANI_LZERO: ANISTAT(lzero); 7074d490647SSam Leffler case S_ANI_LNEG: ANISTAT(lneg); 7084d490647SSam Leffler case S_MIB_ACKBAD: MIBSTAT(ackrcv_bad); 7094d490647SSam Leffler case S_MIB_RTSBAD: MIBSTAT(rts_bad); 7104d490647SSam Leffler case S_MIB_RTSGOOD: MIBSTAT(rts_good); 7114d490647SSam Leffler case S_MIB_FCSBAD: MIBSTAT(fcs_bad); 7124d490647SSam Leffler case S_MIB_BEACONS: MIBSTAT(beacons); 7134d490647SSam Leffler case S_NODE_AVGBRSSI: 7144d490647SSam Leffler snprintf(b, bs, "%u", 7154d490647SSam Leffler HAL_RSSI(wf->cur.ani_stats.ast_nodestats.ns_avgbrssi)); 7164d490647SSam Leffler return 1; 7174d490647SSam Leffler case S_NODE_AVGRSSI: 7184d490647SSam Leffler snprintf(b, bs, "%u", 7194d490647SSam Leffler HAL_RSSI(wf->cur.ani_stats.ast_nodestats.ns_avgrssi)); 7204d490647SSam Leffler return 1; 7214d490647SSam Leffler case S_NODE_AVGARSSI: 7224d490647SSam Leffler snprintf(b, bs, "%u", 7234d490647SSam Leffler HAL_RSSI(wf->cur.ani_stats.ast_nodestats.ns_avgtxrssi)); 7244d490647SSam Leffler return 1; 7254d490647SSam Leffler #endif 7262f549d72SSam Leffler case S_ANT_TX0: TXANT(0); 7272f549d72SSam Leffler case S_ANT_TX1: TXANT(1); 7282f549d72SSam Leffler case S_ANT_TX2: TXANT(2); 7292f549d72SSam Leffler case S_ANT_TX3: TXANT(3); 7302f549d72SSam Leffler case S_ANT_TX4: TXANT(4); 7312f549d72SSam Leffler case S_ANT_TX5: TXANT(5); 7322f549d72SSam Leffler case S_ANT_TX6: TXANT(6); 7332f549d72SSam Leffler case S_ANT_TX7: TXANT(7); 7342f549d72SSam Leffler case S_ANT_RX0: RXANT(0); 7352f549d72SSam Leffler case S_ANT_RX1: RXANT(1); 7362f549d72SSam Leffler case S_ANT_RX2: RXANT(2); 7372f549d72SSam Leffler case S_ANT_RX3: RXANT(3); 7382f549d72SSam Leffler case S_ANT_RX4: RXANT(4); 7392f549d72SSam Leffler case S_ANT_RX5: RXANT(5); 7402f549d72SSam Leffler case S_ANT_RX6: RXANT(6); 7412f549d72SSam Leffler case S_ANT_RX7: RXANT(7); 7422f549d72SSam Leffler #ifdef S_CABQ_XMIT 7432f549d72SSam Leffler case S_CABQ_XMIT: STAT(cabq_xmit); 7442f549d72SSam Leffler case S_CABQ_BUSY: STAT(cabq_busy); 7452f549d72SSam Leffler #endif 7462f549d72SSam Leffler case S_FF_TXOK: STAT(ff_txok); 7472f549d72SSam Leffler case S_FF_TXERR: STAT(ff_txerr); 748207ae002SSam Leffler case S_FF_RX: STAT(ff_rx); 7492f549d72SSam Leffler case S_FF_FLUSH: STAT(ff_flush); 750207ae002SSam Leffler case S_TX_QFULL: STAT(tx_qfull); 751d90b001eSAdrian Chadd case S_BMISSCOUNT: STAT(be_missed); 7522f549d72SSam Leffler case S_RX_NOISE: 753207ae002SSam Leffler snprintf(b, bs, "%d", wf->cur.ath.ast_rx_noise); 7542f549d72SSam Leffler return 1; 7552f549d72SSam Leffler case S_TX_SIGNAL: 7562f549d72SSam Leffler snprintf(b, bs, "%d", 757207ae002SSam Leffler wf->cur.ath.ast_tx_rssi + wf->cur.ath.ast_rx_noise); 7582f549d72SSam Leffler return 1; 7592f549d72SSam Leffler case S_RX_SIGNAL: 7602f549d72SSam Leffler snprintf(b, bs, "%d", 761207ae002SSam Leffler wf->cur.ath.ast_rx_rssi + wf->cur.ath.ast_rx_noise); 7622f549d72SSam Leffler return 1; 763b1b75b3bSAdrian Chadd case S_RX_AGG: STAT(rx_agg); 764b1b75b3bSAdrian Chadd case S_RX_HALFGI: STAT(rx_halfgi); 765b1b75b3bSAdrian Chadd case S_RX_2040: STAT(rx_2040); 766b1b75b3bSAdrian Chadd case S_RX_PRE_CRC_ERR: STAT(rx_pre_crc_err); 767b1b75b3bSAdrian Chadd case S_RX_POST_CRC_ERR: STAT(rx_post_crc_err); 768b1b75b3bSAdrian Chadd case S_RX_DECRYPT_BUSY_ERR: STAT(rx_decrypt_busy_err); 769b1b75b3bSAdrian Chadd case S_RX_HI_CHAIN: STAT(rx_hi_rx_chain); 7702cdc5a48SAdrian Chadd case S_RX_STBC: STAT(rx_stbc); 771b1b75b3bSAdrian Chadd case S_TX_HTPROTECT: STAT(tx_htprotect); 772b1b75b3bSAdrian Chadd case S_RX_QEND: STAT(rx_hitqueueend); 773b1b75b3bSAdrian Chadd case S_TX_TIMEOUT: STAT(tx_timeout); 774b1b75b3bSAdrian Chadd case S_TX_CSTIMEOUT: STAT(tx_cst); 775b1b75b3bSAdrian Chadd case S_TX_XTXOP_ERR: STAT(tx_xtxop); 776b1b75b3bSAdrian Chadd case S_TX_TIMEREXPIRED_ERR: STAT(tx_timerexpired); 777b1b75b3bSAdrian Chadd case S_TX_DESCCFG_ERR: STAT(tx_desccfgerr); 778b1b75b3bSAdrian Chadd case S_TX_SWRETRIES: STAT(tx_swretries); 779b1b75b3bSAdrian Chadd case S_TX_SWRETRIES_MAX: STAT(tx_swretrymax); 780b1b75b3bSAdrian Chadd case S_TX_DATA_UNDERRUN: STAT(tx_data_underrun); 781b1b75b3bSAdrian Chadd case S_TX_DELIM_UNDERRUN: STAT(tx_delim_underrun); 7821df8da4cSAdrian Chadd case S_TX_AGGR_OK: STAT(tx_aggr_ok); 7831df8da4cSAdrian Chadd case S_TX_AGGR_FAIL: STAT(tx_aggr_fail); 7841df8da4cSAdrian Chadd case S_TX_AGGR_FAILALL: STAT(tx_aggr_failall); 785*079bd2e7SAdrian Chadd case S_TX_MCASTQ_OVERFLOW: STAT(tx_mcastq_overflow); 786*079bd2e7SAdrian Chadd case S_RX_KEYMISS: STAT(rx_keymiss); 787*079bd2e7SAdrian Chadd case S_TX_SWFILTERED: STAT(tx_swfiltered); 788*079bd2e7SAdrian Chadd case S_TX_NODE_PSQ_OVERFLOW: STAT(tx_node_psq_overflow); 789*079bd2e7SAdrian Chadd case S_TX_NODEQ_OVERFLOW: STAT(tx_nodeq_overflow); 790*079bd2e7SAdrian Chadd case S_TX_LDPC: STAT(tx_ldpc); 791*079bd2e7SAdrian Chadd case S_TX_STBC: STAT(tx_stbc); 792*079bd2e7SAdrian Chadd case S_TSFOOR: STAT(tsfoor); 7932f549d72SSam Leffler } 7942f549d72SSam Leffler b[0] = '\0'; 79512f961f4SSam Leffler return 0; 7962f549d72SSam Leffler #undef RXANT 7972f549d72SSam Leffler #undef TXANT 7984d490647SSam Leffler #undef ANI 7994d490647SSam Leffler #undef ANISTAT 8004d490647SSam Leffler #undef MIBSTAT 8012f549d72SSam Leffler #undef PHY 8022f549d72SSam Leffler #undef STAT 8032f549d72SSam Leffler } 8042f549d72SSam Leffler 8052f549d72SSam Leffler static int 80615abc53aSAdrian Chadd ath_get_totstat(struct bsdstat *sf, int s, char b[], size_t bs) 8072f549d72SSam Leffler { 8082f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf; 8092f549d72SSam Leffler #define STAT(x) \ 81095d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ath.ast_##x); return 1 8112f549d72SSam Leffler #define PHY(x) \ 81295d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ath.ast_rx_phy[x]); return 1 8134d490647SSam Leffler #define ANI(x) \ 81495d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ani_state.x); return 1 8154d490647SSam Leffler #define ANISTAT(x) \ 81695d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ani_stats.ast_ani_##x); return 1 8174d490647SSam Leffler #define MIBSTAT(x) \ 81895d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ani_stats.ast_mibstats.x); return 1 8192f549d72SSam Leffler #define TXANT(x) \ 82095d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ath.ast_ant_tx[x]); return 1 8212f549d72SSam Leffler #define RXANT(x) \ 82295d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ath.ast_ant_rx[x]); return 1 8232f549d72SSam Leffler 8242f549d72SSam Leffler switch (s) { 8252f549d72SSam Leffler case S_INPUT: 82695d7bf0fSSam Leffler snprintf(b, bs, "%lu", 827d3385328SAdrian Chadd (unsigned long) wf->total.ath.ast_rx_packets - 828d3385328SAdrian Chadd (unsigned long) wf->total.ath.ast_rx_mgt); 8292f549d72SSam Leffler return 1; 8302f549d72SSam Leffler case S_OUTPUT: 831d3385328SAdrian Chadd snprintf(b, bs, "%lu", 832d3385328SAdrian Chadd (unsigned long) wf->total.ath.ast_tx_packets); 8332f549d72SSam Leffler return 1; 8342f549d72SSam Leffler case S_RATE: 8354d490647SSam Leffler snprintrate(b, bs, wf->total.ath.ast_tx_rate); 8362f549d72SSam Leffler return 1; 8372f549d72SSam Leffler case S_WATCHDOG: STAT(watchdog); 8382f549d72SSam Leffler case S_FATAL: STAT(hardware); 8392f549d72SSam Leffler case S_BMISS: STAT(bmiss); 8402f549d72SSam Leffler case S_BMISS_PHANTOM: STAT(bmiss_phantom); 8412f549d72SSam Leffler #ifdef S_BSTUCK 8422f549d72SSam Leffler case S_BSTUCK: STAT(bstuck); 8432f549d72SSam Leffler #endif 8442f549d72SSam Leffler case S_RXORN: STAT(rxorn); 8452f549d72SSam Leffler case S_RXEOL: STAT(rxeol); 8462f549d72SSam Leffler case S_TXURN: STAT(txurn); 8472f549d72SSam Leffler case S_MIB: STAT(mib); 8482f549d72SSam Leffler #ifdef S_INTRCOAL 8492f549d72SSam Leffler case S_INTRCOAL: STAT(intrcoal); 8502f549d72SSam Leffler #endif 8512f549d72SSam Leffler case S_TX_MGMT: STAT(tx_mgmt); 8522f549d72SSam Leffler case S_TX_DISCARD: STAT(tx_discard); 8532f549d72SSam Leffler case S_TX_QSTOP: STAT(tx_qstop); 8542f549d72SSam Leffler case S_TX_ENCAP: STAT(tx_encap); 8552f549d72SSam Leffler case S_TX_NONODE: STAT(tx_nonode); 85641e449dbSSam Leffler case S_TX_NOBUF: STAT(tx_nobuf); 85741e449dbSSam Leffler case S_TX_NOFRAG: STAT(tx_nofrag); 8582f549d72SSam Leffler case S_TX_NOMBUF: STAT(tx_nombuf); 8592f549d72SSam Leffler #ifdef S_TX_NOMCL 8602f549d72SSam Leffler case S_TX_NOMCL: STAT(tx_nomcl); 8612f549d72SSam Leffler case S_TX_LINEAR: STAT(tx_linear); 8622f549d72SSam Leffler case S_TX_NODATA: STAT(tx_nodata); 8632f549d72SSam Leffler case S_TX_BUSDMA: STAT(tx_busdma); 8642f549d72SSam Leffler #endif 8652f549d72SSam Leffler case S_TX_XRETRIES: STAT(tx_xretries); 8662f549d72SSam Leffler case S_TX_FIFOERR: STAT(tx_fifoerr); 8672f549d72SSam Leffler case S_TX_FILTERED: STAT(tx_filtered); 8682f549d72SSam Leffler case S_TX_SHORTRETRY: STAT(tx_shortretry); 8692f549d72SSam Leffler case S_TX_LONGRETRY: STAT(tx_longretry); 8702f549d72SSam Leffler case S_TX_BADRATE: STAT(tx_badrate); 8712f549d72SSam Leffler case S_TX_NOACK: STAT(tx_noack); 8722f549d72SSam Leffler case S_TX_RTS: STAT(tx_rts); 8732f549d72SSam Leffler case S_TX_CTS: STAT(tx_cts); 8742f549d72SSam Leffler case S_TX_SHORTPRE: STAT(tx_shortpre); 8752f549d72SSam Leffler case S_TX_ALTRATE: STAT(tx_altrate); 8762f549d72SSam Leffler case S_TX_PROTECT: STAT(tx_protect); 877cc5912f8SSam Leffler case S_TX_RAW: STAT(tx_raw); 878cc5912f8SSam Leffler case S_TX_RAW_FAIL: STAT(tx_raw_fail); 8792f549d72SSam Leffler case S_RX_NOMBUF: STAT(rx_nombuf); 8802f549d72SSam Leffler #ifdef S_RX_BUSDMA 8812f549d72SSam Leffler case S_RX_BUSDMA: STAT(rx_busdma); 8822f549d72SSam Leffler #endif 8832f549d72SSam Leffler case S_RX_ORN: STAT(rx_orn); 8842f549d72SSam Leffler case S_RX_CRC_ERR: STAT(rx_crcerr); 8852f549d72SSam Leffler case S_RX_FIFO_ERR: STAT(rx_fifoerr); 8862f549d72SSam Leffler case S_RX_CRYPTO_ERR: STAT(rx_badcrypt); 8872f549d72SSam Leffler case S_RX_MIC_ERR: STAT(rx_badmic); 8882f549d72SSam Leffler case S_RX_PHY_ERR: STAT(rx_phyerr); 8892f549d72SSam Leffler case S_RX_PHY_UNDERRUN: PHY(HAL_PHYERR_UNDERRUN); 8902f549d72SSam Leffler case S_RX_PHY_TIMING: PHY(HAL_PHYERR_TIMING); 8912f549d72SSam Leffler case S_RX_PHY_PARITY: PHY(HAL_PHYERR_PARITY); 8922f549d72SSam Leffler case S_RX_PHY_RATE: PHY(HAL_PHYERR_RATE); 8932f549d72SSam Leffler case S_RX_PHY_LENGTH: PHY(HAL_PHYERR_LENGTH); 8942f549d72SSam Leffler case S_RX_PHY_RADAR: PHY(HAL_PHYERR_RADAR); 8952f549d72SSam Leffler case S_RX_PHY_SERVICE: PHY(HAL_PHYERR_SERVICE); 8962f549d72SSam Leffler case S_RX_PHY_TOR: PHY(HAL_PHYERR_TOR); 8972f549d72SSam Leffler case S_RX_PHY_OFDM_TIMING: PHY(HAL_PHYERR_OFDM_TIMING); 8982f549d72SSam Leffler case S_RX_PHY_OFDM_SIGNAL_PARITY: PHY(HAL_PHYERR_OFDM_SIGNAL_PARITY); 8992f549d72SSam Leffler case S_RX_PHY_OFDM_RATE_ILLEGAL: PHY(HAL_PHYERR_OFDM_RATE_ILLEGAL); 9002f549d72SSam Leffler case S_RX_PHY_OFDM_POWER_DROP: PHY(HAL_PHYERR_OFDM_POWER_DROP); 9012f549d72SSam Leffler case S_RX_PHY_OFDM_SERVICE: PHY(HAL_PHYERR_OFDM_SERVICE); 9022f549d72SSam Leffler case S_RX_PHY_OFDM_RESTART: PHY(HAL_PHYERR_OFDM_RESTART); 9032f549d72SSam Leffler case S_RX_PHY_CCK_TIMING: PHY(HAL_PHYERR_CCK_TIMING); 9042f549d72SSam Leffler case S_RX_PHY_CCK_HEADER_CRC: PHY(HAL_PHYERR_CCK_HEADER_CRC); 9052f549d72SSam Leffler case S_RX_PHY_CCK_RATE_ILLEGAL: PHY(HAL_PHYERR_CCK_RATE_ILLEGAL); 9062f549d72SSam Leffler case S_RX_PHY_CCK_SERVICE: PHY(HAL_PHYERR_CCK_SERVICE); 9072f549d72SSam Leffler case S_RX_PHY_CCK_RESTART: PHY(HAL_PHYERR_CCK_RESTART); 9082f549d72SSam Leffler case S_RX_TOOSHORT: STAT(rx_tooshort); 9092f549d72SSam Leffler case S_RX_TOOBIG: STAT(rx_toobig); 9102f549d72SSam Leffler case S_RX_MGT: STAT(rx_mgt); 9112f549d72SSam Leffler case S_RX_CTL: STAT(rx_ctl); 9122f549d72SSam Leffler case S_TX_RSSI: 913207ae002SSam Leffler snprintf(b, bs, "%d", wf->total.ath.ast_tx_rssi); 9142f549d72SSam Leffler return 1; 9152f549d72SSam Leffler case S_RX_RSSI: 916207ae002SSam Leffler snprintf(b, bs, "%d", wf->total.ath.ast_rx_rssi); 9172f549d72SSam Leffler return 1; 9182f549d72SSam Leffler case S_BE_XMIT: STAT(be_xmit); 9192f549d72SSam Leffler case S_BE_NOMBUF: STAT(be_nombuf); 9202f549d72SSam Leffler case S_PER_CAL: STAT(per_cal); 9212f549d72SSam Leffler case S_PER_CALFAIL: STAT(per_calfail); 9222f549d72SSam Leffler case S_PER_RFGAIN: STAT(per_rfgain); 9232f549d72SSam Leffler #ifdef S_TDMA_UPDATE 9242f549d72SSam Leffler case S_TDMA_UPDATE: STAT(tdma_update); 9252f549d72SSam Leffler case S_TDMA_TIMERS: STAT(tdma_timers); 9262f549d72SSam Leffler case S_TDMA_TSF: STAT(tdma_tsf); 92710ad9a77SSam Leffler case S_TDMA_TSFADJ: 92810ad9a77SSam Leffler snprintf(b, bs, "-%d/+%d", 92910ad9a77SSam Leffler wf->total.ath.ast_tdma_tsfadjm, 93010ad9a77SSam Leffler wf->total.ath.ast_tdma_tsfadjp); 93110ad9a77SSam Leffler return 1; 932cc5912f8SSam Leffler case S_TDMA_ACK: STAT(tdma_ack); 9332f549d72SSam Leffler #endif 9342f549d72SSam Leffler case S_RATE_CALLS: STAT(rate_calls); 9352f549d72SSam Leffler case S_RATE_RAISE: STAT(rate_raise); 9362f549d72SSam Leffler case S_RATE_DROP: STAT(rate_drop); 9372f549d72SSam Leffler case S_ANT_DEFSWITCH: STAT(ant_defswitch); 9382f549d72SSam Leffler case S_ANT_TXSWITCH: STAT(ant_txswitch); 9394d490647SSam Leffler #ifdef S_ANI_NOISE 9404d490647SSam Leffler case S_ANI_NOISE: ANI(noiseImmunityLevel); 9414d490647SSam Leffler case S_ANI_SPUR: ANI(spurImmunityLevel); 9424d490647SSam Leffler case S_ANI_STEP: ANI(firstepLevel); 94304fc88d5SSam Leffler case S_ANI_OFDM: ANI(ofdmWeakSigDetectOff); 94404fc88d5SSam Leffler case S_ANI_CCK: ANI(cckWeakSigThreshold); 9454d490647SSam Leffler case S_ANI_LISTEN: ANI(listenTime); 9464d490647SSam Leffler case S_ANI_NIUP: ANISTAT(niup); 9474d490647SSam Leffler case S_ANI_NIDOWN: ANISTAT(nidown); 9484d490647SSam Leffler case S_ANI_SIUP: ANISTAT(spurup); 9494d490647SSam Leffler case S_ANI_SIDOWN: ANISTAT(spurdown); 9504d490647SSam Leffler case S_ANI_OFDMON: ANISTAT(ofdmon); 9514d490647SSam Leffler case S_ANI_OFDMOFF: ANISTAT(ofdmoff); 9524d490647SSam Leffler case S_ANI_CCKHI: ANISTAT(cckhigh); 9534d490647SSam Leffler case S_ANI_CCKLO: ANISTAT(ccklow); 9544d490647SSam Leffler case S_ANI_STEPUP: ANISTAT(stepup); 9554d490647SSam Leffler case S_ANI_STEPDOWN: ANISTAT(stepdown); 9564d490647SSam Leffler case S_ANI_OFDMERRS: ANISTAT(ofdmerrs); 9574d490647SSam Leffler case S_ANI_CCKERRS: ANISTAT(cckerrs); 9584d490647SSam Leffler case S_ANI_RESET: ANISTAT(reset); 9594d490647SSam Leffler case S_ANI_LZERO: ANISTAT(lzero); 9604d490647SSam Leffler case S_ANI_LNEG: ANISTAT(lneg); 9614d490647SSam Leffler case S_MIB_ACKBAD: MIBSTAT(ackrcv_bad); 9624d490647SSam Leffler case S_MIB_RTSBAD: MIBSTAT(rts_bad); 9634d490647SSam Leffler case S_MIB_RTSGOOD: MIBSTAT(rts_good); 9644d490647SSam Leffler case S_MIB_FCSBAD: MIBSTAT(fcs_bad); 9654d490647SSam Leffler case S_MIB_BEACONS: MIBSTAT(beacons); 9664d490647SSam Leffler case S_NODE_AVGBRSSI: 9674d490647SSam Leffler snprintf(b, bs, "%u", 9684d490647SSam Leffler HAL_RSSI(wf->total.ani_stats.ast_nodestats.ns_avgbrssi)); 9694d490647SSam Leffler return 1; 9704d490647SSam Leffler case S_NODE_AVGRSSI: 9714d490647SSam Leffler snprintf(b, bs, "%u", 9724d490647SSam Leffler HAL_RSSI(wf->total.ani_stats.ast_nodestats.ns_avgrssi)); 9734d490647SSam Leffler return 1; 9744d490647SSam Leffler case S_NODE_AVGARSSI: 9754d490647SSam Leffler snprintf(b, bs, "%u", 9764d490647SSam Leffler HAL_RSSI(wf->total.ani_stats.ast_nodestats.ns_avgtxrssi)); 9774d490647SSam Leffler return 1; 9784d490647SSam Leffler #endif 9792f549d72SSam Leffler case S_ANT_TX0: TXANT(0); 9802f549d72SSam Leffler case S_ANT_TX1: TXANT(1); 9812f549d72SSam Leffler case S_ANT_TX2: TXANT(2); 9822f549d72SSam Leffler case S_ANT_TX3: TXANT(3); 9832f549d72SSam Leffler case S_ANT_TX4: TXANT(4); 9842f549d72SSam Leffler case S_ANT_TX5: TXANT(5); 9852f549d72SSam Leffler case S_ANT_TX6: TXANT(6); 9862f549d72SSam Leffler case S_ANT_TX7: TXANT(7); 9872f549d72SSam Leffler case S_ANT_RX0: RXANT(0); 9882f549d72SSam Leffler case S_ANT_RX1: RXANT(1); 9892f549d72SSam Leffler case S_ANT_RX2: RXANT(2); 9902f549d72SSam Leffler case S_ANT_RX3: RXANT(3); 9912f549d72SSam Leffler case S_ANT_RX4: RXANT(4); 9922f549d72SSam Leffler case S_ANT_RX5: RXANT(5); 9932f549d72SSam Leffler case S_ANT_RX6: RXANT(6); 9942f549d72SSam Leffler case S_ANT_RX7: RXANT(7); 9952f549d72SSam Leffler #ifdef S_CABQ_XMIT 9962f549d72SSam Leffler case S_CABQ_XMIT: STAT(cabq_xmit); 9972f549d72SSam Leffler case S_CABQ_BUSY: STAT(cabq_busy); 9982f549d72SSam Leffler #endif 9992f549d72SSam Leffler case S_FF_TXOK: STAT(ff_txok); 10002f549d72SSam Leffler case S_FF_TXERR: STAT(ff_txerr); 1001207ae002SSam Leffler case S_FF_RX: STAT(ff_rx); 10022f549d72SSam Leffler case S_FF_FLUSH: STAT(ff_flush); 1003207ae002SSam Leffler case S_TX_QFULL: STAT(tx_qfull); 1004d90b001eSAdrian Chadd case S_BMISSCOUNT: STAT(be_missed); 10052f549d72SSam Leffler case S_RX_NOISE: 1006207ae002SSam Leffler snprintf(b, bs, "%d", wf->total.ath.ast_rx_noise); 10072f549d72SSam Leffler return 1; 10082f549d72SSam Leffler case S_TX_SIGNAL: 10092f549d72SSam Leffler snprintf(b, bs, "%d", 1010207ae002SSam Leffler wf->total.ath.ast_tx_rssi + wf->total.ath.ast_rx_noise); 10112f549d72SSam Leffler return 1; 10122f549d72SSam Leffler case S_RX_SIGNAL: 10132f549d72SSam Leffler snprintf(b, bs, "%d", 1014207ae002SSam Leffler wf->total.ath.ast_rx_rssi + wf->total.ath.ast_rx_noise); 10152f549d72SSam Leffler return 1; 1016b1b75b3bSAdrian Chadd case S_RX_AGG: STAT(rx_agg); 1017b1b75b3bSAdrian Chadd case S_RX_HALFGI: STAT(rx_halfgi); 1018b1b75b3bSAdrian Chadd case S_RX_2040: STAT(rx_2040); 1019b1b75b3bSAdrian Chadd case S_RX_PRE_CRC_ERR: STAT(rx_pre_crc_err); 1020b1b75b3bSAdrian Chadd case S_RX_POST_CRC_ERR: STAT(rx_post_crc_err); 1021b1b75b3bSAdrian Chadd case S_RX_DECRYPT_BUSY_ERR: STAT(rx_decrypt_busy_err); 1022b1b75b3bSAdrian Chadd case S_RX_HI_CHAIN: STAT(rx_hi_rx_chain); 10232cdc5a48SAdrian Chadd case S_RX_STBC: STAT(rx_stbc); 1024b1b75b3bSAdrian Chadd case S_TX_HTPROTECT: STAT(tx_htprotect); 1025b1b75b3bSAdrian Chadd case S_RX_QEND: STAT(rx_hitqueueend); 1026b1b75b3bSAdrian Chadd case S_TX_TIMEOUT: STAT(tx_timeout); 1027b1b75b3bSAdrian Chadd case S_TX_CSTIMEOUT: STAT(tx_cst); 1028b1b75b3bSAdrian Chadd case S_TX_XTXOP_ERR: STAT(tx_xtxop); 1029b1b75b3bSAdrian Chadd case S_TX_TIMEREXPIRED_ERR: STAT(tx_timerexpired); 1030b1b75b3bSAdrian Chadd case S_TX_DESCCFG_ERR: STAT(tx_desccfgerr); 1031b1b75b3bSAdrian Chadd case S_TX_SWRETRIES: STAT(tx_swretries); 1032b1b75b3bSAdrian Chadd case S_TX_SWRETRIES_MAX: STAT(tx_swretrymax); 1033b1b75b3bSAdrian Chadd case S_TX_DATA_UNDERRUN: STAT(tx_data_underrun); 1034b1b75b3bSAdrian Chadd case S_TX_DELIM_UNDERRUN: STAT(tx_delim_underrun); 10351df8da4cSAdrian Chadd case S_TX_AGGR_OK: STAT(tx_aggr_ok); 10361df8da4cSAdrian Chadd case S_TX_AGGR_FAIL: STAT(tx_aggr_fail); 10371df8da4cSAdrian Chadd case S_TX_AGGR_FAILALL: STAT(tx_aggr_failall); 1038*079bd2e7SAdrian Chadd case S_TX_MCASTQ_OVERFLOW: STAT(tx_mcastq_overflow); 1039*079bd2e7SAdrian Chadd case S_RX_KEYMISS: STAT(rx_keymiss); 1040*079bd2e7SAdrian Chadd case S_TX_SWFILTERED: STAT(tx_swfiltered); 1041*079bd2e7SAdrian Chadd case S_TX_NODE_PSQ_OVERFLOW: STAT(tx_node_psq_overflow); 1042*079bd2e7SAdrian Chadd case S_TX_NODEQ_OVERFLOW: STAT(tx_nodeq_overflow); 1043*079bd2e7SAdrian Chadd case S_TX_LDPC: STAT(tx_ldpc); 1044*079bd2e7SAdrian Chadd case S_TX_STBC: STAT(tx_stbc); 1045*079bd2e7SAdrian Chadd case S_TSFOOR: STAT(tsfoor); 10462f549d72SSam Leffler } 10472f549d72SSam Leffler b[0] = '\0'; 10482f549d72SSam Leffler return 0; 10492f549d72SSam Leffler #undef RXANT 10502f549d72SSam Leffler #undef TXANT 10514d490647SSam Leffler #undef ANI 10524d490647SSam Leffler #undef ANISTAT 10534d490647SSam Leffler #undef MIBSTAT 10542f549d72SSam Leffler #undef PHY 10552f549d72SSam Leffler #undef STAT 10562f549d72SSam Leffler } 10572f549d72SSam Leffler 10582f549d72SSam Leffler static void 105915abc53aSAdrian Chadd ath_print_verbose(struct bsdstat *sf, FILE *fd) 10602f549d72SSam Leffler { 10612f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf; 10622f549d72SSam Leffler #define isphyerr(i) (S_PHY_MIN <= i && i <= S_PHY_MAX) 1063207ae002SSam Leffler const struct fmt *f; 10642f549d72SSam Leffler char s[32]; 10652f549d72SSam Leffler const char *indent; 1066207ae002SSam Leffler int i, width; 10672f549d72SSam Leffler 1068207ae002SSam Leffler width = 0; 1069207ae002SSam Leffler for (i = 0; i < S_LAST; i++) { 1070207ae002SSam Leffler f = &sf->stats[i]; 1071207ae002SSam Leffler if (!isphyerr(i) && f->width > width) 1072207ae002SSam Leffler width = f->width; 1073207ae002SSam Leffler } 10742f549d72SSam Leffler for (i = 0; i < S_LAST; i++) { 10752f549d72SSam Leffler if (ath_get_totstat(sf, i, s, sizeof(s)) && strcmp(s, "0")) { 10762f549d72SSam Leffler if (isphyerr(i)) 10772f549d72SSam Leffler indent = " "; 10782f549d72SSam Leffler else 10792f549d72SSam Leffler indent = ""; 1080207ae002SSam Leffler fprintf(fd, "%s%-*s %s\n", indent, width, s, athstats[i].desc); 10812f549d72SSam Leffler } 10822f549d72SSam Leffler } 10832f549d72SSam Leffler fprintf(fd, "Antenna profile:\n"); 10842f549d72SSam Leffler for (i = 0; i < 8; i++) 1085207ae002SSam Leffler if (wf->total.ath.ast_ant_rx[i] || wf->total.ath.ast_ant_tx[i]) 10862f549d72SSam Leffler fprintf(fd, "[%u] tx %8u rx %8u\n", i, 1087207ae002SSam Leffler wf->total.ath.ast_ant_tx[i], 1088207ae002SSam Leffler wf->total.ath.ast_ant_rx[i]); 10892f549d72SSam Leffler #undef isphyerr 10902f549d72SSam Leffler } 10912f549d72SSam Leffler 109215abc53aSAdrian Chadd BSDSTAT_DEFINE_BOUNCE(athstatfoo) 10932f549d72SSam Leffler 10942f549d72SSam Leffler struct athstatfoo * 10952f549d72SSam Leffler athstats_new(const char *ifname, const char *fmtstring) 10962f549d72SSam Leffler { 10972f549d72SSam Leffler struct athstatfoo_p *wf; 10982f549d72SSam Leffler 10992f549d72SSam Leffler wf = calloc(1, sizeof(struct athstatfoo_p)); 11002f549d72SSam Leffler if (wf != NULL) { 11014f0edd39SAdrian Chadd ath_driver_req_init(&wf->req); 110260caf0c9SCraig Rodrigues bsdstat_init(&wf->base.base, "athstats", athstats, 110360caf0c9SCraig Rodrigues nitems(athstats)); 11042f549d72SSam Leffler /* override base methods */ 11052f549d72SSam Leffler wf->base.base.collect_cur = ath_collect_cur; 11062f549d72SSam Leffler wf->base.base.collect_tot = ath_collect_tot; 11072f549d72SSam Leffler wf->base.base.get_curstat = ath_get_curstat; 11082f549d72SSam Leffler wf->base.base.get_totstat = ath_get_totstat; 11092f549d72SSam Leffler wf->base.base.update_tot = ath_update_tot; 11102f549d72SSam Leffler wf->base.base.print_verbose = ath_print_verbose; 11112f549d72SSam Leffler 11122f549d72SSam Leffler /* setup bounce functions for public methods */ 111315abc53aSAdrian Chadd BSDSTAT_BOUNCE(wf, athstatfoo); 11142f549d72SSam Leffler 11152f549d72SSam Leffler /* setup our public methods */ 11162f549d72SSam Leffler wf->base.setifname = ath_setifname; 11172f549d72SSam Leffler #if 0 11182f549d72SSam Leffler wf->base.setstamac = wlan_setstamac; 11192f549d72SSam Leffler #endif 1120dd8d00f5SSam Leffler wf->base.zerostats = ath_zerostats; 11212f549d72SSam Leffler ath_setifname(&wf->base, ifname); 11222f549d72SSam Leffler wf->base.setfmt(&wf->base, fmtstring); 11232f549d72SSam Leffler } 11242f549d72SSam Leffler return &wf->base; 112512f961f4SSam Leffler } 1126