112f961f4SSam Leffler /*-
210ad9a77SSam Leffler * Copyright (c) 2002-2009 Sam Leffler, Errno Consulting
312f961f4SSam Leffler * All rights reserved.
412f961f4SSam Leffler *
512f961f4SSam Leffler * Redistribution and use in source and binary forms, with or without
612f961f4SSam Leffler * modification, are permitted provided that the following conditions
712f961f4SSam Leffler * are met:
812f961f4SSam Leffler * 1. Redistributions of source code must retain the above copyright
912f961f4SSam Leffler * notice, this list of conditions and the following disclaimer,
1012f961f4SSam Leffler * without modification.
1112f961f4SSam Leffler * 2. Redistributions in binary form must reproduce at minimum a disclaimer
1212f961f4SSam Leffler * similar to the "NO WARRANTY" disclaimer below ("Disclaimer") and any
1312f961f4SSam Leffler * redistribution must be conditioned upon including a substantially
1412f961f4SSam Leffler * similar Disclaimer requirement for further binary redistribution.
1512f961f4SSam Leffler *
1612f961f4SSam Leffler * NO WARRANTY
1712f961f4SSam Leffler * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
1812f961f4SSam Leffler * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
1912f961f4SSam Leffler * LIMITED TO, THE IMPLIED WARRANTIES OF NONINFRINGEMENT, MERCHANTIBILITY
2012f961f4SSam Leffler * AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL
2112f961f4SSam Leffler * THE COPYRIGHT HOLDERS OR CONTRIBUTORS BE LIABLE FOR SPECIAL, EXEMPLARY,
2212f961f4SSam Leffler * OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
2312f961f4SSam Leffler * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
2412f961f4SSam Leffler * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER
2512f961f4SSam Leffler * IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
2612f961f4SSam Leffler * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF
2712f961f4SSam Leffler * THE POSSIBILITY OF SUCH DAMAGES.
2812f961f4SSam Leffler */
2912f961f4SSam Leffler
308363d9c4SAdrian Chadd #include "opt_ah.h"
318363d9c4SAdrian Chadd
3212f961f4SSam Leffler /*
332f549d72SSam Leffler * ath statistics class.
3412f961f4SSam Leffler */
3560caf0c9SCraig Rodrigues
3660caf0c9SCraig Rodrigues #include <sys/param.h>
3712f961f4SSam Leffler #include <sys/file.h>
3812f961f4SSam Leffler #include <sys/sockio.h>
3912f961f4SSam Leffler #include <sys/socket.h>
4060caf0c9SCraig Rodrigues
4112f961f4SSam Leffler #include <net/if.h>
4212f961f4SSam Leffler #include <net/if_media.h>
4312f961f4SSam Leffler #include <net/if_var.h>
4412f961f4SSam Leffler
4560caf0c9SCraig Rodrigues #include <err.h>
4660caf0c9SCraig Rodrigues #include <signal.h>
4712f961f4SSam Leffler #include <stdio.h>
48207ae002SSam Leffler #include <stdlib.h>
492f549d72SSam Leffler #include <string.h>
502f549d72SSam Leffler #include <unistd.h>
5112f961f4SSam Leffler
52207ae002SSam Leffler #include "ah.h"
53207ae002SSam Leffler #include "ah_desc.h"
54582aab3bSAdrian Chadd #include "ah_diagcodes.h"
55b1b75b3bSAdrian Chadd #include "net80211/ieee80211_ioctl.h"
56b1b75b3bSAdrian Chadd #include "net80211/ieee80211_radiotap.h"
57207ae002SSam Leffler #include "if_athioctl.h"
5812f961f4SSam Leffler
592f549d72SSam Leffler #include "athstats.h"
602f549d72SSam Leffler
614f0edd39SAdrian Chadd #include "ctrl.h"
624f0edd39SAdrian Chadd
634d490647SSam Leffler #ifdef ATH_SUPPORT_ANI
644d490647SSam Leffler #define HAL_EP_RND(x,mul) \
654d490647SSam Leffler ((((x)%(mul)) >= ((mul)/2)) ? ((x) + ((mul) - 1)) / (mul) : (x)/(mul))
664d490647SSam Leffler #define HAL_RSSI(x) HAL_EP_RND(x, HAL_RSSI_EP_MULTIPLIER)
674d490647SSam Leffler #endif
684d490647SSam Leffler
692f549d72SSam Leffler #define NOTPRESENT { 0, "", "" }
702f549d72SSam Leffler
71207ae002SSam Leffler #define AFTER(prev) ((prev)+1)
72207ae002SSam Leffler
732f549d72SSam Leffler static const struct fmt athstats[] = {
742f549d72SSam Leffler #define S_INPUT 0
7595d7bf0fSSam Leffler { 8, "input", "input", "data frames received" },
76207ae002SSam Leffler #define S_OUTPUT AFTER(S_INPUT)
7795d7bf0fSSam Leffler { 8, "output", "output", "data frames transmit" },
78207ae002SSam Leffler #define S_TX_ALTRATE AFTER(S_OUTPUT)
792f549d72SSam Leffler { 7, "altrate", "altrate", "tx frames with an alternate rate" },
80207ae002SSam Leffler #define S_TX_SHORTRETRY AFTER(S_TX_ALTRATE)
8195d7bf0fSSam Leffler { 7, "short", "short", "short on-chip tx retries" },
82207ae002SSam Leffler #define S_TX_LONGRETRY AFTER(S_TX_SHORTRETRY)
8395d7bf0fSSam Leffler { 7, "long", "long", "long on-chip tx retries" },
84207ae002SSam Leffler #define S_TX_XRETRIES AFTER(S_TX_LONGRETRY)
852f549d72SSam Leffler { 6, "xretry", "xretry", "tx failed 'cuz too many retries" },
86207ae002SSam Leffler #define S_MIB AFTER(S_TX_XRETRIES)
872f549d72SSam Leffler { 5, "mib", "mib", "mib overflow interrupts" },
882f549d72SSam Leffler #ifndef __linux__
89207ae002SSam Leffler #define S_TX_LINEAR AFTER(S_MIB)
902f549d72SSam Leffler { 5, "txlinear", "txlinear", "tx linearized to cluster" },
91207ae002SSam Leffler #define S_BSTUCK AFTER(S_TX_LINEAR)
928e787d67SAdrian Chadd { 6, "bstuck", "bstuck", "stuck beacon conditions" },
93207ae002SSam Leffler #define S_INTRCOAL AFTER(S_BSTUCK)
942f549d72SSam Leffler { 5, "intrcoal", "intrcoal", "interrupts coalesced" },
95207ae002SSam Leffler #define S_RATE AFTER(S_INTRCOAL)
962f549d72SSam Leffler #else
97207ae002SSam Leffler #define S_RATE AFTER(S_MIB)
982f549d72SSam Leffler #endif
994d490647SSam Leffler { 5, "rate", "rate", "current transmit rate" },
100207ae002SSam Leffler #define S_WATCHDOG AFTER(S_RATE)
1012f549d72SSam Leffler { 5, "wdog", "wdog", "watchdog timeouts" },
102207ae002SSam Leffler #define S_FATAL AFTER(S_WATCHDOG)
1032f549d72SSam Leffler { 5, "fatal", "fatal", "hardware error interrupts" },
104207ae002SSam Leffler #define S_BMISS AFTER(S_FATAL)
1052f549d72SSam Leffler { 5, "bmiss", "bmiss", "beacon miss interrupts" },
106207ae002SSam Leffler #define S_RXORN AFTER(S_BMISS)
1072f549d72SSam Leffler { 5, "rxorn", "rxorn", "recv overrun interrupts" },
108207ae002SSam Leffler #define S_RXEOL AFTER(S_RXORN)
1092f549d72SSam Leffler { 5, "rxeol", "rxeol", "recv eol interrupts" },
110207ae002SSam Leffler #define S_TXURN AFTER(S_RXEOL)
1112f549d72SSam Leffler { 5, "txurn", "txurn", "txmit underrun interrupts" },
112207ae002SSam Leffler #define S_TX_MGMT AFTER(S_TXURN)
1132f549d72SSam Leffler { 5, "txmgt", "txmgt", "tx management frames" },
114207ae002SSam Leffler #define S_TX_DISCARD AFTER(S_TX_MGMT)
1152f549d72SSam Leffler { 5, "txdisc", "txdisc", "tx frames discarded prior to association" },
116207ae002SSam Leffler #define S_TX_INVALID AFTER(S_TX_DISCARD)
1172f549d72SSam Leffler { 5, "txinv", "txinv", "tx invalid (19)" },
118207ae002SSam Leffler #define S_TX_QSTOP AFTER(S_TX_INVALID)
1192f549d72SSam Leffler { 5, "qstop", "qstop", "tx stopped 'cuz no xmit buffer" },
120207ae002SSam Leffler #define S_TX_ENCAP AFTER(S_TX_QSTOP)
1212f549d72SSam Leffler { 5, "txencode", "txencode", "tx encapsulation failed" },
122207ae002SSam Leffler #define S_TX_NONODE AFTER(S_TX_ENCAP)
1232f549d72SSam Leffler { 5, "txnonode", "txnonode", "tx failed 'cuz no node" },
12441e449dbSSam Leffler #define S_TX_NOBUF AFTER(S_TX_NONODE)
12541e449dbSSam Leffler { 5, "txnobuf", "txnobuf", "tx failed 'cuz dma buffer allocation failed" },
12641e449dbSSam Leffler #define S_TX_NOFRAG AFTER(S_TX_NOBUF)
12741e449dbSSam Leffler { 5, "txnofrag", "txnofrag", "tx failed 'cuz frag buffer allocation(s) failed" },
12841e449dbSSam Leffler #define S_TX_NOMBUF AFTER(S_TX_NOFRAG)
1292f549d72SSam Leffler { 5, "txnombuf", "txnombuf", "tx failed 'cuz mbuf allocation failed" },
1302f549d72SSam Leffler #ifndef __linux__
131207ae002SSam Leffler #define S_TX_NOMCL AFTER(S_TX_NOMBUF)
1322f549d72SSam Leffler { 5, "txnomcl", "txnomcl", "tx failed 'cuz cluster allocation failed" },
133207ae002SSam Leffler #define S_TX_FIFOERR AFTER(S_TX_NOMCL)
1342f549d72SSam Leffler #else
135207ae002SSam Leffler #define S_TX_FIFOERR AFTER(S_TX_NOMBUF)
1362f549d72SSam Leffler #endif
1372f549d72SSam Leffler { 5, "efifo", "efifo", "tx failed 'cuz FIFO underrun" },
138207ae002SSam Leffler #define S_TX_FILTERED AFTER(S_TX_FIFOERR)
1392f549d72SSam Leffler { 5, "efilt", "efilt", "tx failed 'cuz destination filtered" },
140207ae002SSam Leffler #define S_TX_BADRATE AFTER(S_TX_FILTERED)
1412f549d72SSam Leffler { 5, "txbadrate", "txbadrate", "tx failed 'cuz bogus xmit rate" },
142207ae002SSam Leffler #define S_TX_NOACK AFTER(S_TX_BADRATE)
1432f549d72SSam Leffler { 5, "noack", "noack", "tx frames with no ack marked" },
144207ae002SSam Leffler #define S_TX_RTS AFTER(S_TX_NOACK)
1452f549d72SSam Leffler { 5, "rts", "rts", "tx frames with rts enabled" },
146207ae002SSam Leffler #define S_TX_CTS AFTER(S_TX_RTS)
1472f549d72SSam Leffler { 5, "cts", "cts", "tx frames with cts enabled" },
148207ae002SSam Leffler #define S_TX_SHORTPRE AFTER(S_TX_CTS)
1492f549d72SSam Leffler { 5, "shpre", "shpre", "tx frames with short preamble" },
150207ae002SSam Leffler #define S_TX_PROTECT AFTER(S_TX_SHORTPRE)
1512f549d72SSam Leffler { 5, "protect", "protect", "tx frames with 11g protection" },
152207ae002SSam Leffler #define S_RX_ORN AFTER(S_TX_PROTECT)
1532f549d72SSam Leffler { 5, "rxorn", "rxorn", "rx failed 'cuz of desc overrun" },
154207ae002SSam Leffler #define S_RX_CRC_ERR AFTER(S_RX_ORN)
1552f549d72SSam Leffler { 6, "crcerr", "crcerr", "rx failed 'cuz of bad CRC" },
156207ae002SSam Leffler #define S_RX_FIFO_ERR AFTER(S_RX_CRC_ERR)
1572f549d72SSam Leffler { 5, "rxfifo", "rxfifo", "rx failed 'cuz of FIFO overrun" },
158207ae002SSam Leffler #define S_RX_CRYPTO_ERR AFTER(S_RX_FIFO_ERR)
1592f549d72SSam Leffler { 5, "crypt", "crypt", "rx failed 'cuz decryption" },
160207ae002SSam Leffler #define S_RX_MIC_ERR AFTER(S_RX_CRYPTO_ERR)
1612f549d72SSam Leffler { 4, "mic", "mic", "rx failed 'cuz MIC failure" },
162207ae002SSam Leffler #define S_RX_TOOSHORT AFTER(S_RX_MIC_ERR)
1632f549d72SSam Leffler { 5, "rxshort", "rxshort", "rx failed 'cuz frame too short" },
164207ae002SSam Leffler #define S_RX_NOMBUF AFTER(S_RX_TOOSHORT)
1652f549d72SSam Leffler { 5, "rxnombuf", "rxnombuf", "rx setup failed 'cuz no mbuf" },
166207ae002SSam Leffler #define S_RX_MGT AFTER(S_RX_NOMBUF)
1672f549d72SSam Leffler { 5, "rxmgt", "rxmgt", "rx management frames" },
168207ae002SSam Leffler #define S_RX_CTL AFTER(S_RX_MGT)
1692f549d72SSam Leffler { 5, "rxctl", "rxctl", "rx control frames" },
170207ae002SSam Leffler #define S_RX_PHY_ERR AFTER(S_RX_CTL)
1712f549d72SSam Leffler { 7, "phyerr", "phyerr", "rx failed 'cuz of PHY err" },
172207ae002SSam Leffler #define S_RX_PHY_UNDERRUN AFTER(S_RX_PHY_ERR)
1734d490647SSam Leffler { 4, "phyund", "TUnd", "transmit underrun" },
174207ae002SSam Leffler #define S_RX_PHY_TIMING AFTER(S_RX_PHY_UNDERRUN)
1754d490647SSam Leffler { 4, "phytim", "Tim", "timing error" },
176207ae002SSam Leffler #define S_RX_PHY_PARITY AFTER(S_RX_PHY_TIMING)
1774d490647SSam Leffler { 4, "phypar", "IPar", "illegal parity" },
178207ae002SSam Leffler #define S_RX_PHY_RATE AFTER(S_RX_PHY_PARITY)
1794d490647SSam Leffler { 4, "phyrate", "IRate", "illegal rate" },
180207ae002SSam Leffler #define S_RX_PHY_LENGTH AFTER(S_RX_PHY_RATE)
1814d490647SSam Leffler { 4, "phylen", "ILen", "illegal length" },
182207ae002SSam Leffler #define S_RX_PHY_RADAR AFTER(S_RX_PHY_LENGTH)
1834d490647SSam Leffler { 4, "phyradar", "Radar", "radar detect" },
184207ae002SSam Leffler #define S_RX_PHY_SERVICE AFTER(S_RX_PHY_RADAR)
1854d490647SSam Leffler { 4, "physervice", "Service", "illegal service" },
186207ae002SSam Leffler #define S_RX_PHY_TOR AFTER(S_RX_PHY_SERVICE)
1874d490647SSam Leffler { 4, "phytor", "TOR", "transmit override receive" },
188207ae002SSam Leffler #define S_RX_PHY_OFDM_TIMING AFTER(S_RX_PHY_TOR)
1892f549d72SSam Leffler { 6, "ofdmtim", "ofdmtim", "OFDM timing" },
190207ae002SSam Leffler #define S_RX_PHY_OFDM_SIGNAL_PARITY AFTER(S_RX_PHY_OFDM_TIMING)
1912f549d72SSam Leffler { 6, "ofdmsig", "ofdmsig", "OFDM illegal parity" },
192207ae002SSam Leffler #define S_RX_PHY_OFDM_RATE_ILLEGAL AFTER(S_RX_PHY_OFDM_SIGNAL_PARITY)
1932f549d72SSam Leffler { 6, "ofdmrate", "ofdmrate", "OFDM illegal rate" },
194207ae002SSam Leffler #define S_RX_PHY_OFDM_POWER_DROP AFTER(S_RX_PHY_OFDM_RATE_ILLEGAL)
1952f549d72SSam Leffler { 6, "ofdmpow", "ofdmpow", "OFDM power drop" },
196207ae002SSam Leffler #define S_RX_PHY_OFDM_SERVICE AFTER(S_RX_PHY_OFDM_POWER_DROP)
1972f549d72SSam Leffler { 6, "ofdmservice", "ofdmservice", "OFDM illegal service" },
198207ae002SSam Leffler #define S_RX_PHY_OFDM_RESTART AFTER(S_RX_PHY_OFDM_SERVICE)
1992f549d72SSam Leffler { 6, "ofdmrestart", "ofdmrestart", "OFDM restart" },
200207ae002SSam Leffler #define S_RX_PHY_CCK_TIMING AFTER(S_RX_PHY_OFDM_RESTART)
2012f549d72SSam Leffler { 6, "ccktim", "ccktim", "CCK timing" },
202207ae002SSam Leffler #define S_RX_PHY_CCK_HEADER_CRC AFTER(S_RX_PHY_CCK_TIMING)
2032f549d72SSam Leffler { 6, "cckhead", "cckhead", "CCK header crc" },
204207ae002SSam Leffler #define S_RX_PHY_CCK_RATE_ILLEGAL AFTER(S_RX_PHY_CCK_HEADER_CRC)
2052f549d72SSam Leffler { 6, "cckrate", "cckrate", "CCK illegal rate" },
206207ae002SSam Leffler #define S_RX_PHY_CCK_SERVICE AFTER(S_RX_PHY_CCK_RATE_ILLEGAL)
2072f549d72SSam Leffler { 6, "cckservice", "cckservice", "CCK illegal service" },
208207ae002SSam Leffler #define S_RX_PHY_CCK_RESTART AFTER(S_RX_PHY_CCK_SERVICE)
2092f549d72SSam Leffler { 6, "cckrestar", "cckrestar", "CCK restart" },
210207ae002SSam Leffler #define S_BE_NOMBUF AFTER(S_RX_PHY_CCK_RESTART)
2112f549d72SSam Leffler { 4, "benombuf", "benombuf", "beacon setup failed 'cuz no mbuf" },
212207ae002SSam Leffler #define S_BE_XMIT AFTER(S_BE_NOMBUF)
21395d7bf0fSSam Leffler { 7, "bexmit", "bexmit", "beacons transmitted" },
214207ae002SSam Leffler #define S_PER_CAL AFTER(S_BE_XMIT)
2152f549d72SSam Leffler { 4, "pcal", "pcal", "periodic calibrations" },
216207ae002SSam Leffler #define S_PER_CALFAIL AFTER(S_PER_CAL)
2172f549d72SSam Leffler { 4, "pcalf", "pcalf", "periodic calibration failures" },
218207ae002SSam Leffler #define S_PER_RFGAIN AFTER(S_PER_CALFAIL)
2192f549d72SSam Leffler { 4, "prfga", "prfga", "rfgain value change" },
220207ae002SSam Leffler #if ATH_SUPPORT_TDMA
221207ae002SSam Leffler #define S_TDMA_UPDATE AFTER(S_PER_RFGAIN)
22295d7bf0fSSam Leffler { 5, "tdmau", "tdmau", "TDMA slot timing updates" },
223207ae002SSam Leffler #define S_TDMA_TIMERS AFTER(S_TDMA_UPDATE)
22495d7bf0fSSam Leffler { 5, "tdmab", "tdmab", "TDMA slot update set beacon timers" },
225207ae002SSam Leffler #define S_TDMA_TSF AFTER(S_TDMA_TIMERS)
22695d7bf0fSSam Leffler { 5, "tdmat", "tdmat", "TDMA slot update set TSF" },
22710ad9a77SSam Leffler #define S_TDMA_TSFADJ AFTER(S_TDMA_TSF)
22895d7bf0fSSam Leffler { 8, "tdmadj", "tdmadj", "TDMA slot adjust (usecs, smoothed)" },
229cc5912f8SSam Leffler #define S_TDMA_ACK AFTER(S_TDMA_TSFADJ)
230cc5912f8SSam Leffler { 5, "tdmack", "tdmack", "TDMA tx failed 'cuz ACK required" },
231cc5912f8SSam Leffler #define S_RATE_CALLS AFTER(S_TDMA_ACK)
2322f549d72SSam Leffler #else
233207ae002SSam Leffler #define S_RATE_CALLS AFTER(S_PER_RFGAIN)
2342f549d72SSam Leffler #endif
2352f549d72SSam Leffler { 5, "ratec", "ratec", "rate control checks" },
236207ae002SSam Leffler #define S_RATE_RAISE AFTER(S_RATE_CALLS)
2372f549d72SSam Leffler { 5, "rate+", "rate+", "rate control raised xmit rate" },
238207ae002SSam Leffler #define S_RATE_DROP AFTER(S_RATE_RAISE)
2392f549d72SSam Leffler { 5, "rate-", "rate-", "rate control dropped xmit rate" },
240207ae002SSam Leffler #define S_TX_RSSI AFTER(S_RATE_DROP)
2412f549d72SSam Leffler { 4, "arssi", "arssi", "rssi of last ack" },
242207ae002SSam Leffler #define S_RX_RSSI AFTER(S_TX_RSSI)
2432f549d72SSam Leffler { 4, "rssi", "rssi", "avg recv rssi" },
244207ae002SSam Leffler #define S_RX_NOISE AFTER(S_RX_RSSI)
2452f549d72SSam Leffler { 5, "noise", "noise", "rx noise floor" },
246207ae002SSam Leffler #define S_BMISS_PHANTOM AFTER(S_RX_NOISE)
2472f549d72SSam Leffler { 5, "bmissphantom", "bmissphantom", "phantom beacon misses" },
248207ae002SSam Leffler #define S_TX_RAW AFTER(S_BMISS_PHANTOM)
2492f549d72SSam Leffler { 5, "txraw", "txraw", "tx frames through raw api" },
250cc5912f8SSam Leffler #define S_TX_RAW_FAIL AFTER(S_TX_RAW)
251cc5912f8SSam Leffler { 5, "txrawfail", "txrawfail", "raw tx failed 'cuz interface/hw down" },
252cc5912f8SSam Leffler #define S_RX_TOOBIG AFTER(S_TX_RAW_FAIL)
2532f549d72SSam Leffler { 5, "rx2big", "rx2big", "rx failed 'cuz frame too large" },
254b1b75b3bSAdrian Chadd #define S_RX_AGG AFTER(S_RX_TOOBIG)
255b1b75b3bSAdrian Chadd { 5, "rxagg", "rxagg", "A-MPDU sub-frames received" },
256b1b75b3bSAdrian Chadd #define S_RX_HALFGI AFTER(S_RX_AGG)
257b1b75b3bSAdrian Chadd { 5, "rxhalfgi", "rxhgi", "Half-GI frames received" },
258b1b75b3bSAdrian Chadd #define S_RX_2040 AFTER(S_RX_HALFGI)
259b1b75b3bSAdrian Chadd { 6, "rx2040", "rx2040", "40MHz frames received" },
260b1b75b3bSAdrian Chadd #define S_RX_PRE_CRC_ERR AFTER(S_RX_2040)
261b1b75b3bSAdrian Chadd { 11, "rxprecrcerr", "rxprecrcerr", "CRC errors for non-last A-MPDU subframes" },
262b1b75b3bSAdrian Chadd #define S_RX_POST_CRC_ERR AFTER(S_RX_PRE_CRC_ERR)
263b1b75b3bSAdrian Chadd { 12, "rxpostcrcerr", "rxpostcrcerr", "CRC errors for last subframe in an A-MPDU" },
264b1b75b3bSAdrian Chadd #define S_RX_DECRYPT_BUSY_ERR AFTER(S_RX_POST_CRC_ERR)
265b1b75b3bSAdrian Chadd { 10, "rxdescbusy", "rxdescbusy", "Decryption engine busy" },
266b1b75b3bSAdrian Chadd #define S_RX_HI_CHAIN AFTER(S_RX_DECRYPT_BUSY_ERR)
267b1b75b3bSAdrian Chadd { 4, "rxhi", "rxhi", "Frames received with RX chain in high power mode" },
2682cdc5a48SAdrian Chadd #define S_RX_STBC AFTER(S_RX_HI_CHAIN)
2692cdc5a48SAdrian Chadd { 6, "rxstbc", "rxstbc", "Frames received w/ STBC encoding" },
2702cdc5a48SAdrian Chadd #define S_TX_HTPROTECT AFTER(S_RX_STBC)
271b1b75b3bSAdrian Chadd { 7, "txhtprot", "txhtprot", "Frames transmitted with HT Protection" },
272b1b75b3bSAdrian Chadd #define S_RX_QEND AFTER(S_TX_HTPROTECT)
273b1b75b3bSAdrian Chadd { 7, "rxquend", "rxquend", "Hit end of RX descriptor queue" },
274b1b75b3bSAdrian Chadd #define S_TX_TIMEOUT AFTER(S_RX_QEND)
275b1b75b3bSAdrian Chadd { 4, "txtimeout", "TXTX", "TX Timeout" },
276b1b75b3bSAdrian Chadd #define S_TX_CSTIMEOUT AFTER(S_TX_TIMEOUT)
277b1b75b3bSAdrian Chadd { 4, "csttimeout", "CSTX", "Carrier Sense Timeout" },
278b1b75b3bSAdrian Chadd #define S_TX_XTXOP_ERR AFTER(S_TX_CSTIMEOUT)
279b1b75b3bSAdrian Chadd { 5, "xtxoperr", "TXOPX", "TXOP exceed" },
280b1b75b3bSAdrian Chadd #define S_TX_TIMEREXPIRED_ERR AFTER(S_TX_XTXOP_ERR)
281b1b75b3bSAdrian Chadd { 7, "texperr", "texperr", "TX Timer expired" },
282b1b75b3bSAdrian Chadd #define S_TX_DESCCFG_ERR AFTER(S_TX_TIMEREXPIRED_ERR)
283b1b75b3bSAdrian Chadd { 10, "desccfgerr", "desccfgerr", "TX descriptor error" },
284b1b75b3bSAdrian Chadd #define S_TX_SWRETRIES AFTER(S_TX_DESCCFG_ERR)
285b1b75b3bSAdrian Chadd { 9, "txswretry", "txswretry", "Number of frames retransmitted in software" },
286b1b75b3bSAdrian Chadd #define S_TX_SWRETRIES_MAX AFTER(S_TX_SWRETRIES)
287b1b75b3bSAdrian Chadd { 7, "txswmax", "txswmax", "Number of frames exceeding software retry" },
288b1b75b3bSAdrian Chadd #define S_TX_DATA_UNDERRUN AFTER(S_TX_SWRETRIES_MAX)
289b1b75b3bSAdrian Chadd { 5, "txdataunderrun", "TXDAU", "A-MPDU TX FIFO data underrun" },
290b1b75b3bSAdrian Chadd #define S_TX_DELIM_UNDERRUN AFTER(S_TX_DATA_UNDERRUN)
291b1b75b3bSAdrian Chadd { 5, "txdelimunderrun", "TXDEU", "A-MPDU TX Delimiter underrun" },
2921df8da4cSAdrian Chadd #define S_TX_AGGR_OK AFTER(S_TX_DELIM_UNDERRUN)
2931df8da4cSAdrian Chadd { 5, "txaggrok", "TXAOK", "A-MPDU sub-frame TX attempt success" },
2941df8da4cSAdrian Chadd #define S_TX_AGGR_FAIL AFTER(S_TX_AGGR_OK)
295317d14cfSAdrian Chadd { 4, "txaggrfail", "TXAF", "A-MPDU sub-frame TX attempt failures" },
2961df8da4cSAdrian Chadd #define S_TX_AGGR_FAILALL AFTER(S_TX_AGGR_FAIL)
297317d14cfSAdrian Chadd { 7, "txaggrfailall", "TXAFALL", "A-MPDU TX frame failures" },
298*079bd2e7SAdrian Chadd #define S_TX_MCASTQ_OVERFLOW AFTER(S_TX_AGGR_FAILALL)
299*079bd2e7SAdrian Chadd { 8, "txmcastqovf", "TXMCQOVF", "TX multicast queue overflow" },
300*079bd2e7SAdrian Chadd #define S_RX_KEYMISS AFTER(S_TX_MCASTQ_OVERFLOW)
301*079bd2e7SAdrian Chadd { 4, "rxkeymiss", "RXKM", "RX crypto key miss" },
302*079bd2e7SAdrian Chadd #define S_TX_SWFILTERED AFTER(S_RX_KEYMISS)
303*079bd2e7SAdrian Chadd { 7, "txswfilt", "TXSWFLT", "TX frames filtered by hw and retried" },
304*079bd2e7SAdrian Chadd #define S_TX_NODE_PSQ_OVERFLOW AFTER(S_TX_SWFILTERED)
305*079bd2e7SAdrian Chadd { 8, "txpsqovf", "TXPSQOVF", "TX frames overflowed the power save queue" },
306*079bd2e7SAdrian Chadd #define S_TX_NODEQ_OVERFLOW AFTER(S_TX_NODE_PSQ_OVERFLOW)
307*079bd2e7SAdrian Chadd { 8, "txnqovf", "TXNQOVF", "TX frames overflowed the node queue" },
308*079bd2e7SAdrian Chadd #define S_TX_LDPC AFTER(S_TX_NODEQ_OVERFLOW)
309*079bd2e7SAdrian Chadd { 6, "txldpc", "TXLDPC", "TX frames transmitted with LDPC" },
310*079bd2e7SAdrian Chadd #define S_TX_STBC AFTER(S_TX_LDPC)
311*079bd2e7SAdrian Chadd { 6, "txstbc", "TXSTBC", "TX frames transmitted with STBC" },
312*079bd2e7SAdrian Chadd #define S_TSFOOR AFTER(S_TX_STBC)
313*079bd2e7SAdrian Chadd { 6, "tsfoor", "TSFOOR", "TSF overflow interrupt/restarts" },
314*079bd2e7SAdrian Chadd #define S_CABQ_XMIT AFTER(S_TSFOOR)
3158e787d67SAdrian Chadd { 7, "cabxmit", "cabxmit", "cabq frames transmitted" },
316207ae002SSam Leffler #define S_CABQ_BUSY AFTER(S_CABQ_XMIT)
3178e787d67SAdrian Chadd { 8, "cabqbusy", "cabqbusy", "cabq xmit overflowed beacon interval" },
318207ae002SSam Leffler #define S_TX_NODATA AFTER(S_CABQ_BUSY)
3198e787d67SAdrian Chadd { 8, "txnodata", "txnodata", "tx discarded empty frame" },
320207ae002SSam Leffler #define S_TX_BUSDMA AFTER(S_TX_NODATA)
3218e787d67SAdrian Chadd { 8, "txbusdma", "txbusdma", "tx failed for dma resrcs" },
322207ae002SSam Leffler #define S_RX_BUSDMA AFTER(S_TX_BUSDMA)
3238e787d67SAdrian Chadd { 8, "rxbusdma", "rxbusdma", "rx setup failed for dma resrcs" },
324207ae002SSam Leffler #define S_FF_TXOK AFTER(S_RX_BUSDMA)
3252f549d72SSam Leffler { 5, "fftxok", "fftxok", "fast frames xmit successfully" },
326207ae002SSam Leffler #define S_FF_TXERR AFTER(S_FF_TXOK)
3272f549d72SSam Leffler { 5, "fftxerr", "fftxerr", "fast frames not xmit due to error" },
328207ae002SSam Leffler #define S_FF_RX AFTER(S_FF_TXERR)
3292f549d72SSam Leffler { 5, "ffrx", "ffrx", "fast frames received" },
330207ae002SSam Leffler #define S_FF_FLUSH AFTER(S_FF_RX)
3312f549d72SSam Leffler { 5, "ffflush", "ffflush", "fast frames flushed from staging q" },
332207ae002SSam Leffler #define S_TX_QFULL AFTER(S_FF_FLUSH)
333207ae002SSam Leffler { 5, "txqfull", "txqfull", "tx discarded 'cuz queue is full" },
334207ae002SSam Leffler #define S_ANT_DEFSWITCH AFTER(S_TX_QFULL)
3352f549d72SSam Leffler { 5, "defsw", "defsw", "switched default/rx antenna" },
336207ae002SSam Leffler #define S_ANT_TXSWITCH AFTER(S_ANT_DEFSWITCH)
3372f549d72SSam Leffler { 5, "txsw", "txsw", "tx used alternate antenna" },
3384d490647SSam Leffler #ifdef ATH_SUPPORT_ANI
3394d490647SSam Leffler #define S_ANI_NOISE AFTER(S_ANT_TXSWITCH)
3404d490647SSam Leffler { 2, "ni", "NI", "noise immunity level" },
3414d490647SSam Leffler #define S_ANI_SPUR AFTER(S_ANI_NOISE)
3424d490647SSam Leffler { 2, "si", "SI", "spur immunity level" },
3434d490647SSam Leffler #define S_ANI_STEP AFTER(S_ANI_SPUR)
3444d490647SSam Leffler { 2, "step", "ST", "first step level" },
3454d490647SSam Leffler #define S_ANI_OFDM AFTER(S_ANI_STEP)
3464d490647SSam Leffler { 4, "owsd", "OWSD", "OFDM weak signal detect" },
3474d490647SSam Leffler #define S_ANI_CCK AFTER(S_ANI_OFDM)
3484d490647SSam Leffler { 4, "cwst", "CWST", "CCK weak signal threshold" },
3494d490647SSam Leffler #define S_ANI_MAXSPUR AFTER(S_ANI_CCK)
3504d490647SSam Leffler { 3, "maxsi","MSI", "max spur immunity level" },
3514d490647SSam Leffler #define S_ANI_LISTEN AFTER(S_ANI_MAXSPUR)
3524d490647SSam Leffler { 6, "listen","LISTEN", "listen time" },
3534d490647SSam Leffler #define S_ANI_NIUP AFTER(S_ANI_LISTEN)
354582aab3bSAdrian Chadd { 4, "ni+", "NI+", "ANI increased noise immunity" },
3554d490647SSam Leffler #define S_ANI_NIDOWN AFTER(S_ANI_NIUP)
3564d490647SSam Leffler { 4, "ni-", "NI-", "ANI decrease noise immunity" },
3574d490647SSam Leffler #define S_ANI_SIUP AFTER(S_ANI_NIDOWN)
3584d490647SSam Leffler { 4, "si+", "SI+", "ANI increased spur immunity" },
3594d490647SSam Leffler #define S_ANI_SIDOWN AFTER(S_ANI_SIUP)
3604d490647SSam Leffler { 4, "si-", "SI-", "ANI decrease spur immunity" },
3614d490647SSam Leffler #define S_ANI_OFDMON AFTER(S_ANI_SIDOWN)
3624d490647SSam Leffler { 5, "ofdm+","OFDM+", "ANI enabled OFDM weak signal detect" },
3634d490647SSam Leffler #define S_ANI_OFDMOFF AFTER(S_ANI_OFDMON)
3644d490647SSam Leffler { 5, "ofdm-","OFDM-", "ANI disabled OFDM weak signal detect" },
3654d490647SSam Leffler #define S_ANI_CCKHI AFTER(S_ANI_OFDMOFF)
3664d490647SSam Leffler { 5, "cck+", "CCK+", "ANI enabled CCK weak signal threshold" },
3674d490647SSam Leffler #define S_ANI_CCKLO AFTER(S_ANI_CCKHI)
3684d490647SSam Leffler { 5, "cck-", "CCK-", "ANI disabled CCK weak signal threshold" },
3694d490647SSam Leffler #define S_ANI_STEPUP AFTER(S_ANI_CCKLO)
3704d490647SSam Leffler { 5, "step+","STEP+", "ANI increased first step level" },
3714d490647SSam Leffler #define S_ANI_STEPDOWN AFTER(S_ANI_STEPUP)
3724d490647SSam Leffler { 5, "step-","STEP-", "ANI decreased first step level" },
3734d490647SSam Leffler #define S_ANI_OFDMERRS AFTER(S_ANI_STEPDOWN)
37495d7bf0fSSam Leffler { 8, "ofdm", "OFDM", "cumulative OFDM phy error count" },
3754d490647SSam Leffler #define S_ANI_CCKERRS AFTER(S_ANI_OFDMERRS)
37695d7bf0fSSam Leffler { 8, "cck", "CCK", "cumulative CCK phy error count" },
3774d490647SSam Leffler #define S_ANI_RESET AFTER(S_ANI_CCKERRS)
3784d490647SSam Leffler { 5, "reset","RESET", "ANI parameters zero'd for non-STA operation" },
3794d490647SSam Leffler #define S_ANI_LZERO AFTER(S_ANI_RESET)
3804d490647SSam Leffler { 5, "lzero","LZERO", "ANI forced listen time to zero" },
3814d490647SSam Leffler #define S_ANI_LNEG AFTER(S_ANI_LZERO)
3824d490647SSam Leffler { 5, "lneg", "LNEG", "ANI calculated listen time < 0" },
3834d490647SSam Leffler #define S_MIB_ACKBAD AFTER(S_ANI_LNEG)
38495d7bf0fSSam Leffler { 5, "ackbad","ACKBAD", "missing ACK's" },
3854d490647SSam Leffler #define S_MIB_RTSBAD AFTER(S_MIB_ACKBAD)
38695d7bf0fSSam Leffler { 5, "rtsbad","RTSBAD", "RTS without CTS" },
3874d490647SSam Leffler #define S_MIB_RTSGOOD AFTER(S_MIB_RTSBAD)
38895d7bf0fSSam Leffler { 5, "rtsgood","RTSGOOD", "successful RTS" },
3894d490647SSam Leffler #define S_MIB_FCSBAD AFTER(S_MIB_RTSGOOD)
39095d7bf0fSSam Leffler { 5, "fcsbad","FCSBAD", "bad FCS" },
3914d490647SSam Leffler #define S_MIB_BEACONS AFTER(S_MIB_FCSBAD)
39295d7bf0fSSam Leffler { 5, "beacons","beacons", "beacons received" },
3934d490647SSam Leffler #define S_NODE_AVGBRSSI AFTER(S_MIB_BEACONS)
3944d490647SSam Leffler { 3, "avgbrssi","BSI", "average rssi (beacons only)" },
3954d490647SSam Leffler #define S_NODE_AVGRSSI AFTER(S_NODE_AVGBRSSI)
3964d490647SSam Leffler { 3, "avgrssi","DSI", "average rssi (all rx'd frames)" },
3974d490647SSam Leffler #define S_NODE_AVGARSSI AFTER(S_NODE_AVGRSSI)
3984d490647SSam Leffler { 3, "avgtxrssi","TSI", "average rssi (ACKs only)" },
3994d490647SSam Leffler #define S_ANT_TX0 AFTER(S_NODE_AVGARSSI)
4004d490647SSam Leffler #else
401207ae002SSam Leffler #define S_ANT_TX0 AFTER(S_ANT_TXSWITCH)
4024d490647SSam Leffler #endif /* ATH_SUPPORT_ANI */
40395d7bf0fSSam Leffler { 8, "tx0", "ant0(tx)", "frames tx on antenna 0" },
404207ae002SSam Leffler #define S_ANT_TX1 AFTER(S_ANT_TX0)
40595d7bf0fSSam Leffler { 8, "tx1", "ant1(tx)", "frames tx on antenna 1" },
406207ae002SSam Leffler #define S_ANT_TX2 AFTER(S_ANT_TX1)
40795d7bf0fSSam Leffler { 8, "tx2", "ant2(tx)", "frames tx on antenna 2" },
408207ae002SSam Leffler #define S_ANT_TX3 AFTER(S_ANT_TX2)
40995d7bf0fSSam Leffler { 8, "tx3", "ant3(tx)", "frames tx on antenna 3" },
410207ae002SSam Leffler #define S_ANT_TX4 AFTER(S_ANT_TX3)
41195d7bf0fSSam Leffler { 8, "tx4", "ant4(tx)", "frames tx on antenna 4" },
412207ae002SSam Leffler #define S_ANT_TX5 AFTER(S_ANT_TX4)
41395d7bf0fSSam Leffler { 8, "tx5", "ant5(tx)", "frames tx on antenna 5" },
414207ae002SSam Leffler #define S_ANT_TX6 AFTER(S_ANT_TX5)
41595d7bf0fSSam Leffler { 8, "tx6", "ant6(tx)", "frames tx on antenna 6" },
416207ae002SSam Leffler #define S_ANT_TX7 AFTER(S_ANT_TX6)
41795d7bf0fSSam Leffler { 8, "tx7", "ant7(tx)", "frames tx on antenna 7" },
418207ae002SSam Leffler #define S_ANT_RX0 AFTER(S_ANT_TX7)
41995d7bf0fSSam Leffler { 8, "rx0", "ant0(rx)", "frames rx on antenna 0" },
420207ae002SSam Leffler #define S_ANT_RX1 AFTER(S_ANT_RX0)
42195d7bf0fSSam Leffler { 8, "rx1", "ant1(rx)", "frames rx on antenna 1" },
422207ae002SSam Leffler #define S_ANT_RX2 AFTER(S_ANT_RX1)
42395d7bf0fSSam Leffler { 8, "rx2", "ant2(rx)", "frames rx on antenna 2" },
424207ae002SSam Leffler #define S_ANT_RX3 AFTER(S_ANT_RX2)
42595d7bf0fSSam Leffler { 8, "rx3", "ant3(rx)", "frames rx on antenna 3" },
426207ae002SSam Leffler #define S_ANT_RX4 AFTER(S_ANT_RX3)
42795d7bf0fSSam Leffler { 8, "rx4", "ant4(rx)", "frames rx on antenna 4" },
428207ae002SSam Leffler #define S_ANT_RX5 AFTER(S_ANT_RX4)
42995d7bf0fSSam Leffler { 8, "rx5", "ant5(rx)", "frames rx on antenna 5" },
430207ae002SSam Leffler #define S_ANT_RX6 AFTER(S_ANT_RX5)
43195d7bf0fSSam Leffler { 8, "rx6", "ant6(rx)", "frames rx on antenna 6" },
432207ae002SSam Leffler #define S_ANT_RX7 AFTER(S_ANT_RX6)
43395d7bf0fSSam Leffler { 8, "rx7", "ant7(rx)", "frames rx on antenna 7" },
434207ae002SSam Leffler #define S_TX_SIGNAL AFTER(S_ANT_RX7)
4352f549d72SSam Leffler { 4, "asignal", "asig", "signal of last ack (dBm)" },
436207ae002SSam Leffler #define S_RX_SIGNAL AFTER(S_TX_SIGNAL)
4372f549d72SSam Leffler { 4, "signal", "sig", "avg recv signal (dBm)" },
438d90b001eSAdrian Chadd #define S_BMISSCOUNT AFTER(S_RX_SIGNAL)
439d90b001eSAdrian Chadd { 8, "bmisscount", "bmisscnt", "beacon miss count" },
44012f961f4SSam Leffler };
4412f549d72SSam Leffler #define S_PHY_MIN S_RX_PHY_UNDERRUN
4422f549d72SSam Leffler #define S_PHY_MAX S_RX_PHY_CCK_RESTART
4432f549d72SSam Leffler #define S_LAST S_ANT_TX0
444d90b001eSAdrian Chadd #define S_MAX S_BMISSCOUNT+1
44512f961f4SSam Leffler
446207ae002SSam Leffler struct _athstats {
447207ae002SSam Leffler struct ath_stats ath;
4484d490647SSam Leffler #ifdef ATH_SUPPORT_ANI
449582aab3bSAdrian Chadd HAL_ANI_STATS ani_stats;
450582aab3bSAdrian Chadd HAL_ANI_STATE ani_state;
4514d490647SSam Leffler #endif
452207ae002SSam Leffler };
453207ae002SSam Leffler
4542f549d72SSam Leffler struct athstatfoo_p {
4552f549d72SSam Leffler struct athstatfoo base;
456207ae002SSam Leffler int optstats;
4574f0edd39SAdrian Chadd struct ath_driver_req req;
4584d490647SSam Leffler #define ATHSTATS_ANI 0x0001
459207ae002SSam Leffler struct ath_diag atd;
460207ae002SSam Leffler struct _athstats cur;
461207ae002SSam Leffler struct _athstats total;
4622f549d72SSam Leffler };
46312f961f4SSam Leffler
4642f549d72SSam Leffler static void
ath_setifname(struct athstatfoo * wf0,const char * ifname)4652f549d72SSam Leffler ath_setifname(struct athstatfoo *wf0, const char *ifname)
4662f549d72SSam Leffler {
4672f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) wf0;
46812f961f4SSam Leffler
4694f0edd39SAdrian Chadd ath_driver_req_close(&wf->req);
4704f0edd39SAdrian Chadd (void) ath_driver_req_open(&wf->req, ifname);
4714d490647SSam Leffler #ifdef ATH_SUPPORT_ANI
4724d490647SSam Leffler strncpy(wf->atd.ad_name, ifname, sizeof (wf->atd.ad_name));
4734d490647SSam Leffler wf->optstats |= ATHSTATS_ANI;
4744d490647SSam Leffler #endif
47512f961f4SSam Leffler }
47612f961f4SSam Leffler
4772f549d72SSam Leffler static void
ath_zerostats(struct athstatfoo * wf0)478dd8d00f5SSam Leffler ath_zerostats(struct athstatfoo *wf0)
479dd8d00f5SSam Leffler {
480dd8d00f5SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) wf0;
481dd8d00f5SSam Leffler
4824f0edd39SAdrian Chadd if (ath_driver_req_zero_stats(&wf->req) < 0)
4834f0edd39SAdrian Chadd exit(-1);
484dd8d00f5SSam Leffler }
485dd8d00f5SSam Leffler
486dd8d00f5SSam Leffler static void
ath_collect(struct athstatfoo_p * wf,struct _athstats * stats)487207ae002SSam Leffler ath_collect(struct athstatfoo_p *wf, struct _athstats *stats)
4882f549d72SSam Leffler {
4894f0edd39SAdrian Chadd
4904f0edd39SAdrian Chadd if (ath_driver_req_fetch_stats(&wf->req, &stats->ath) < 0)
4914f0edd39SAdrian Chadd exit(1);
4924d490647SSam Leffler #ifdef ATH_SUPPORT_ANI
4934d490647SSam Leffler if (wf->optstats & ATHSTATS_ANI) {
4944f0edd39SAdrian Chadd
4954f0edd39SAdrian Chadd /* XXX TODO: convert */
496582aab3bSAdrian Chadd wf->atd.ad_id = HAL_DIAG_ANI_CURRENT; /* HAL_DIAG_ANI_CURRENT */
4974d490647SSam Leffler wf->atd.ad_out_data = (caddr_t) &stats->ani_state;
4984d490647SSam Leffler wf->atd.ad_out_size = sizeof(stats->ani_state);
4994f0edd39SAdrian Chadd if (ath_driver_req_fetch_diag(&wf->req, SIOCGATHDIAG,
5004f0edd39SAdrian Chadd &wf->atd) < 0) {
5014d490647SSam Leffler wf->optstats &= ~ATHSTATS_ANI;
5024d490647SSam Leffler }
5034f0edd39SAdrian Chadd
5044f0edd39SAdrian Chadd /* XXX TODO: convert */
505582aab3bSAdrian Chadd wf->atd.ad_id = HAL_DIAG_ANI_STATS; /* HAL_DIAG_ANI_STATS */
5064d490647SSam Leffler wf->atd.ad_out_data = (caddr_t) &stats->ani_stats;
5074d490647SSam Leffler wf->atd.ad_out_size = sizeof(stats->ani_stats);
5084f0edd39SAdrian Chadd (void) ath_driver_req_fetch_diag(&wf->req, SIOCGATHDIAG,
5094f0edd39SAdrian Chadd &wf->atd);
5104d490647SSam Leffler }
5114d490647SSam Leffler #endif /* ATH_SUPPORT_ANI */
51212f961f4SSam Leffler }
5132f549d72SSam Leffler
5142f549d72SSam Leffler static void
ath_collect_cur(struct bsdstat * sf)51515abc53aSAdrian Chadd ath_collect_cur(struct bsdstat *sf)
5162f549d72SSam Leffler {
5172f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf;
5182f549d72SSam Leffler
5192f549d72SSam Leffler ath_collect(wf, &wf->cur);
5202f549d72SSam Leffler }
5212f549d72SSam Leffler
5222f549d72SSam Leffler static void
ath_collect_tot(struct bsdstat * sf)52315abc53aSAdrian Chadd ath_collect_tot(struct bsdstat *sf)
5242f549d72SSam Leffler {
5252f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf;
5262f549d72SSam Leffler
5272f549d72SSam Leffler ath_collect(wf, &wf->total);
5282f549d72SSam Leffler }
5292f549d72SSam Leffler
5302f549d72SSam Leffler static void
ath_update_tot(struct bsdstat * sf)53115abc53aSAdrian Chadd ath_update_tot(struct bsdstat *sf)
5322f549d72SSam Leffler {
5332f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf;
5342f549d72SSam Leffler
5352f549d72SSam Leffler wf->total = wf->cur;
5362f549d72SSam Leffler }
5372f549d72SSam Leffler
5384d490647SSam Leffler static void
snprintrate(char b[],size_t bs,int rate)5394d490647SSam Leffler snprintrate(char b[], size_t bs, int rate)
5404d490647SSam Leffler {
5414d490647SSam Leffler if (rate & IEEE80211_RATE_MCS)
5424d490647SSam Leffler snprintf(b, bs, "MCS%u", rate &~ IEEE80211_RATE_MCS);
5434d490647SSam Leffler else if (rate & 1)
5444d490647SSam Leffler snprintf(b, bs, "%u.5M", rate / 2);
5454d490647SSam Leffler else
5464d490647SSam Leffler snprintf(b, bs, "%uM", rate / 2);
5474d490647SSam Leffler }
5484d490647SSam Leffler
5492f549d72SSam Leffler static int
ath_get_curstat(struct bsdstat * sf,int s,char b[],size_t bs)55015abc53aSAdrian Chadd ath_get_curstat(struct bsdstat *sf, int s, char b[], size_t bs)
5512f549d72SSam Leffler {
5522f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf;
5532f549d72SSam Leffler #define STAT(x) \
554207ae002SSam Leffler snprintf(b, bs, "%u", wf->cur.ath.ast_##x - wf->total.ath.ast_##x); return 1
5552f549d72SSam Leffler #define PHY(x) \
556207ae002SSam Leffler snprintf(b, bs, "%u", wf->cur.ath.ast_rx_phy[x] - wf->total.ath.ast_rx_phy[x]); return 1
5574d490647SSam Leffler #define ANI(x) \
5584d490647SSam Leffler snprintf(b, bs, "%u", wf->cur.ani_state.x); return 1
5594d490647SSam Leffler #define ANISTAT(x) \
5604d490647SSam Leffler snprintf(b, bs, "%u", wf->cur.ani_stats.ast_ani_##x - wf->total.ani_stats.ast_ani_##x); return 1
5614d490647SSam Leffler #define MIBSTAT(x) \
5624d490647SSam Leffler snprintf(b, bs, "%u", wf->cur.ani_stats.ast_mibstats.x - wf->total.ani_stats.ast_mibstats.x); return 1
5632f549d72SSam Leffler #define TXANT(x) \
564207ae002SSam Leffler snprintf(b, bs, "%u", wf->cur.ath.ast_ant_tx[x] - wf->total.ath.ast_ant_tx[x]); return 1
5652f549d72SSam Leffler #define RXANT(x) \
566207ae002SSam Leffler snprintf(b, bs, "%u", wf->cur.ath.ast_ant_rx[x] - wf->total.ath.ast_ant_rx[x]); return 1
5672f549d72SSam Leffler
5682f549d72SSam Leffler switch (s) {
5692f549d72SSam Leffler case S_INPUT:
5702f549d72SSam Leffler snprintf(b, bs, "%lu",
5715205fa34SAdrian Chadd (unsigned long)
5725205fa34SAdrian Chadd ((wf->cur.ath.ast_rx_packets - wf->total.ath.ast_rx_packets) -
5735205fa34SAdrian Chadd (wf->cur.ath.ast_rx_mgt - wf->total.ath.ast_rx_mgt)));
5742f549d72SSam Leffler return 1;
5752f549d72SSam Leffler case S_OUTPUT:
5762f549d72SSam Leffler snprintf(b, bs, "%lu",
5775205fa34SAdrian Chadd (unsigned long)
5785205fa34SAdrian Chadd (wf->cur.ath.ast_tx_packets - wf->total.ath.ast_tx_packets));
5792f549d72SSam Leffler return 1;
5802f549d72SSam Leffler case S_RATE:
5814d490647SSam Leffler snprintrate(b, bs, wf->cur.ath.ast_tx_rate);
5822f549d72SSam Leffler return 1;
5832f549d72SSam Leffler case S_WATCHDOG: STAT(watchdog);
5842f549d72SSam Leffler case S_FATAL: STAT(hardware);
5852f549d72SSam Leffler case S_BMISS: STAT(bmiss);
5862f549d72SSam Leffler case S_BMISS_PHANTOM: STAT(bmiss_phantom);
5872f549d72SSam Leffler #ifdef S_BSTUCK
5882f549d72SSam Leffler case S_BSTUCK: STAT(bstuck);
5892f549d72SSam Leffler #endif
5902f549d72SSam Leffler case S_RXORN: STAT(rxorn);
5912f549d72SSam Leffler case S_RXEOL: STAT(rxeol);
5922f549d72SSam Leffler case S_TXURN: STAT(txurn);
5932f549d72SSam Leffler case S_MIB: STAT(mib);
5942f549d72SSam Leffler #ifdef S_INTRCOAL
5952f549d72SSam Leffler case S_INTRCOAL: STAT(intrcoal);
5962f549d72SSam Leffler #endif
5972f549d72SSam Leffler case S_TX_MGMT: STAT(tx_mgmt);
5982f549d72SSam Leffler case S_TX_DISCARD: STAT(tx_discard);
5992f549d72SSam Leffler case S_TX_QSTOP: STAT(tx_qstop);
6002f549d72SSam Leffler case S_TX_ENCAP: STAT(tx_encap);
6012f549d72SSam Leffler case S_TX_NONODE: STAT(tx_nonode);
60241e449dbSSam Leffler case S_TX_NOBUF: STAT(tx_nobuf);
60341e449dbSSam Leffler case S_TX_NOFRAG: STAT(tx_nofrag);
6042f549d72SSam Leffler case S_TX_NOMBUF: STAT(tx_nombuf);
6052f549d72SSam Leffler #ifdef S_TX_NOMCL
6062f549d72SSam Leffler case S_TX_NOMCL: STAT(tx_nomcl);
6072f549d72SSam Leffler case S_TX_LINEAR: STAT(tx_linear);
6082f549d72SSam Leffler case S_TX_NODATA: STAT(tx_nodata);
6092f549d72SSam Leffler case S_TX_BUSDMA: STAT(tx_busdma);
6102f549d72SSam Leffler #endif
6112f549d72SSam Leffler case S_TX_XRETRIES: STAT(tx_xretries);
6122f549d72SSam Leffler case S_TX_FIFOERR: STAT(tx_fifoerr);
6132f549d72SSam Leffler case S_TX_FILTERED: STAT(tx_filtered);
6142f549d72SSam Leffler case S_TX_SHORTRETRY: STAT(tx_shortretry);
6152f549d72SSam Leffler case S_TX_LONGRETRY: STAT(tx_longretry);
6162f549d72SSam Leffler case S_TX_BADRATE: STAT(tx_badrate);
6172f549d72SSam Leffler case S_TX_NOACK: STAT(tx_noack);
6182f549d72SSam Leffler case S_TX_RTS: STAT(tx_rts);
6192f549d72SSam Leffler case S_TX_CTS: STAT(tx_cts);
6202f549d72SSam Leffler case S_TX_SHORTPRE: STAT(tx_shortpre);
6212f549d72SSam Leffler case S_TX_ALTRATE: STAT(tx_altrate);
6222f549d72SSam Leffler case S_TX_PROTECT: STAT(tx_protect);
623cc5912f8SSam Leffler case S_TX_RAW: STAT(tx_raw);
624cc5912f8SSam Leffler case S_TX_RAW_FAIL: STAT(tx_raw_fail);
6252f549d72SSam Leffler case S_RX_NOMBUF: STAT(rx_nombuf);
6262f549d72SSam Leffler #ifdef S_RX_BUSDMA
6272f549d72SSam Leffler case S_RX_BUSDMA: STAT(rx_busdma);
6282f549d72SSam Leffler #endif
6292f549d72SSam Leffler case S_RX_ORN: STAT(rx_orn);
6302f549d72SSam Leffler case S_RX_CRC_ERR: STAT(rx_crcerr);
6312f549d72SSam Leffler case S_RX_FIFO_ERR: STAT(rx_fifoerr);
6322f549d72SSam Leffler case S_RX_CRYPTO_ERR: STAT(rx_badcrypt);
6332f549d72SSam Leffler case S_RX_MIC_ERR: STAT(rx_badmic);
6342f549d72SSam Leffler case S_RX_PHY_ERR: STAT(rx_phyerr);
6352f549d72SSam Leffler case S_RX_PHY_UNDERRUN: PHY(HAL_PHYERR_UNDERRUN);
6362f549d72SSam Leffler case S_RX_PHY_TIMING: PHY(HAL_PHYERR_TIMING);
6372f549d72SSam Leffler case S_RX_PHY_PARITY: PHY(HAL_PHYERR_PARITY);
6382f549d72SSam Leffler case S_RX_PHY_RATE: PHY(HAL_PHYERR_RATE);
6392f549d72SSam Leffler case S_RX_PHY_LENGTH: PHY(HAL_PHYERR_LENGTH);
6402f549d72SSam Leffler case S_RX_PHY_RADAR: PHY(HAL_PHYERR_RADAR);
6412f549d72SSam Leffler case S_RX_PHY_SERVICE: PHY(HAL_PHYERR_SERVICE);
6422f549d72SSam Leffler case S_RX_PHY_TOR: PHY(HAL_PHYERR_TOR);
6432f549d72SSam Leffler case S_RX_PHY_OFDM_TIMING: PHY(HAL_PHYERR_OFDM_TIMING);
6442f549d72SSam Leffler case S_RX_PHY_OFDM_SIGNAL_PARITY: PHY(HAL_PHYERR_OFDM_SIGNAL_PARITY);
6452f549d72SSam Leffler case S_RX_PHY_OFDM_RATE_ILLEGAL: PHY(HAL_PHYERR_OFDM_RATE_ILLEGAL);
6462f549d72SSam Leffler case S_RX_PHY_OFDM_POWER_DROP: PHY(HAL_PHYERR_OFDM_POWER_DROP);
6472f549d72SSam Leffler case S_RX_PHY_OFDM_SERVICE: PHY(HAL_PHYERR_OFDM_SERVICE);
6482f549d72SSam Leffler case S_RX_PHY_OFDM_RESTART: PHY(HAL_PHYERR_OFDM_RESTART);
6492f549d72SSam Leffler case S_RX_PHY_CCK_TIMING: PHY(HAL_PHYERR_CCK_TIMING);
6502f549d72SSam Leffler case S_RX_PHY_CCK_HEADER_CRC: PHY(HAL_PHYERR_CCK_HEADER_CRC);
6512f549d72SSam Leffler case S_RX_PHY_CCK_RATE_ILLEGAL: PHY(HAL_PHYERR_CCK_RATE_ILLEGAL);
6522f549d72SSam Leffler case S_RX_PHY_CCK_SERVICE: PHY(HAL_PHYERR_CCK_SERVICE);
6532f549d72SSam Leffler case S_RX_PHY_CCK_RESTART: PHY(HAL_PHYERR_CCK_RESTART);
6542f549d72SSam Leffler case S_RX_TOOSHORT: STAT(rx_tooshort);
6552f549d72SSam Leffler case S_RX_TOOBIG: STAT(rx_toobig);
6562f549d72SSam Leffler case S_RX_MGT: STAT(rx_mgt);
6572f549d72SSam Leffler case S_RX_CTL: STAT(rx_ctl);
6582f549d72SSam Leffler case S_TX_RSSI:
659207ae002SSam Leffler snprintf(b, bs, "%d", wf->cur.ath.ast_tx_rssi);
6602f549d72SSam Leffler return 1;
6612f549d72SSam Leffler case S_RX_RSSI:
662207ae002SSam Leffler snprintf(b, bs, "%d", wf->cur.ath.ast_rx_rssi);
6632f549d72SSam Leffler return 1;
6642f549d72SSam Leffler case S_BE_XMIT: STAT(be_xmit);
6652f549d72SSam Leffler case S_BE_NOMBUF: STAT(be_nombuf);
6662f549d72SSam Leffler case S_PER_CAL: STAT(per_cal);
6672f549d72SSam Leffler case S_PER_CALFAIL: STAT(per_calfail);
6682f549d72SSam Leffler case S_PER_RFGAIN: STAT(per_rfgain);
6692f549d72SSam Leffler #ifdef S_TDMA_UPDATE
6702f549d72SSam Leffler case S_TDMA_UPDATE: STAT(tdma_update);
6712f549d72SSam Leffler case S_TDMA_TIMERS: STAT(tdma_timers);
6722f549d72SSam Leffler case S_TDMA_TSF: STAT(tdma_tsf);
67310ad9a77SSam Leffler case S_TDMA_TSFADJ:
67410ad9a77SSam Leffler snprintf(b, bs, "-%d/+%d",
67510ad9a77SSam Leffler wf->cur.ath.ast_tdma_tsfadjm, wf->cur.ath.ast_tdma_tsfadjp);
67610ad9a77SSam Leffler return 1;
677cc5912f8SSam Leffler case S_TDMA_ACK: STAT(tdma_ack);
6782f549d72SSam Leffler #endif
6792f549d72SSam Leffler case S_RATE_CALLS: STAT(rate_calls);
6802f549d72SSam Leffler case S_RATE_RAISE: STAT(rate_raise);
6812f549d72SSam Leffler case S_RATE_DROP: STAT(rate_drop);
6822f549d72SSam Leffler case S_ANT_DEFSWITCH: STAT(ant_defswitch);
6832f549d72SSam Leffler case S_ANT_TXSWITCH: STAT(ant_txswitch);
6844d490647SSam Leffler #ifdef S_ANI_NOISE
6854d490647SSam Leffler case S_ANI_NOISE: ANI(noiseImmunityLevel);
6864d490647SSam Leffler case S_ANI_SPUR: ANI(spurImmunityLevel);
6874d490647SSam Leffler case S_ANI_STEP: ANI(firstepLevel);
6884d490647SSam Leffler case S_ANI_OFDM: ANI(ofdmWeakSigDetectOff);
68904fc88d5SSam Leffler case S_ANI_CCK: ANI(cckWeakSigThreshold);
6904d490647SSam Leffler case S_ANI_LISTEN: ANI(listenTime);
6914d490647SSam Leffler case S_ANI_NIUP: ANISTAT(niup);
6924d490647SSam Leffler case S_ANI_NIDOWN: ANISTAT(nidown);
6934d490647SSam Leffler case S_ANI_SIUP: ANISTAT(spurup);
6944d490647SSam Leffler case S_ANI_SIDOWN: ANISTAT(spurdown);
6954d490647SSam Leffler case S_ANI_OFDMON: ANISTAT(ofdmon);
6964d490647SSam Leffler case S_ANI_OFDMOFF: ANISTAT(ofdmoff);
6974d490647SSam Leffler case S_ANI_CCKHI: ANISTAT(cckhigh);
6984d490647SSam Leffler case S_ANI_CCKLO: ANISTAT(ccklow);
6994d490647SSam Leffler case S_ANI_STEPUP: ANISTAT(stepup);
7004d490647SSam Leffler case S_ANI_STEPDOWN: ANISTAT(stepdown);
7014d490647SSam Leffler case S_ANI_OFDMERRS: ANISTAT(ofdmerrs);
7024d490647SSam Leffler case S_ANI_CCKERRS: ANISTAT(cckerrs);
7034d490647SSam Leffler case S_ANI_RESET: ANISTAT(reset);
7044d490647SSam Leffler case S_ANI_LZERO: ANISTAT(lzero);
7054d490647SSam Leffler case S_ANI_LNEG: ANISTAT(lneg);
7064d490647SSam Leffler case S_MIB_ACKBAD: MIBSTAT(ackrcv_bad);
7074d490647SSam Leffler case S_MIB_RTSBAD: MIBSTAT(rts_bad);
7084d490647SSam Leffler case S_MIB_RTSGOOD: MIBSTAT(rts_good);
7094d490647SSam Leffler case S_MIB_FCSBAD: MIBSTAT(fcs_bad);
7104d490647SSam Leffler case S_MIB_BEACONS: MIBSTAT(beacons);
7114d490647SSam Leffler case S_NODE_AVGBRSSI:
7124d490647SSam Leffler snprintf(b, bs, "%u",
7134d490647SSam Leffler HAL_RSSI(wf->cur.ani_stats.ast_nodestats.ns_avgbrssi));
7144d490647SSam Leffler return 1;
7154d490647SSam Leffler case S_NODE_AVGRSSI:
7164d490647SSam Leffler snprintf(b, bs, "%u",
7174d490647SSam Leffler HAL_RSSI(wf->cur.ani_stats.ast_nodestats.ns_avgrssi));
7184d490647SSam Leffler return 1;
7194d490647SSam Leffler case S_NODE_AVGARSSI:
7204d490647SSam Leffler snprintf(b, bs, "%u",
7214d490647SSam Leffler HAL_RSSI(wf->cur.ani_stats.ast_nodestats.ns_avgtxrssi));
7224d490647SSam Leffler return 1;
7234d490647SSam Leffler #endif
7242f549d72SSam Leffler case S_ANT_TX0: TXANT(0);
7252f549d72SSam Leffler case S_ANT_TX1: TXANT(1);
7262f549d72SSam Leffler case S_ANT_TX2: TXANT(2);
7272f549d72SSam Leffler case S_ANT_TX3: TXANT(3);
7282f549d72SSam Leffler case S_ANT_TX4: TXANT(4);
7292f549d72SSam Leffler case S_ANT_TX5: TXANT(5);
7302f549d72SSam Leffler case S_ANT_TX6: TXANT(6);
7312f549d72SSam Leffler case S_ANT_TX7: TXANT(7);
7322f549d72SSam Leffler case S_ANT_RX0: RXANT(0);
7332f549d72SSam Leffler case S_ANT_RX1: RXANT(1);
7342f549d72SSam Leffler case S_ANT_RX2: RXANT(2);
7352f549d72SSam Leffler case S_ANT_RX3: RXANT(3);
7362f549d72SSam Leffler case S_ANT_RX4: RXANT(4);
7372f549d72SSam Leffler case S_ANT_RX5: RXANT(5);
7382f549d72SSam Leffler case S_ANT_RX6: RXANT(6);
7392f549d72SSam Leffler case S_ANT_RX7: RXANT(7);
7402f549d72SSam Leffler #ifdef S_CABQ_XMIT
7412f549d72SSam Leffler case S_CABQ_XMIT: STAT(cabq_xmit);
7422f549d72SSam Leffler case S_CABQ_BUSY: STAT(cabq_busy);
7432f549d72SSam Leffler #endif
7442f549d72SSam Leffler case S_FF_TXOK: STAT(ff_txok);
7452f549d72SSam Leffler case S_FF_TXERR: STAT(ff_txerr);
746207ae002SSam Leffler case S_FF_RX: STAT(ff_rx);
7472f549d72SSam Leffler case S_FF_FLUSH: STAT(ff_flush);
748207ae002SSam Leffler case S_TX_QFULL: STAT(tx_qfull);
749d90b001eSAdrian Chadd case S_BMISSCOUNT: STAT(be_missed);
7502f549d72SSam Leffler case S_RX_NOISE:
751207ae002SSam Leffler snprintf(b, bs, "%d", wf->cur.ath.ast_rx_noise);
7522f549d72SSam Leffler return 1;
7532f549d72SSam Leffler case S_TX_SIGNAL:
7542f549d72SSam Leffler snprintf(b, bs, "%d",
755207ae002SSam Leffler wf->cur.ath.ast_tx_rssi + wf->cur.ath.ast_rx_noise);
7562f549d72SSam Leffler return 1;
7572f549d72SSam Leffler case S_RX_SIGNAL:
7582f549d72SSam Leffler snprintf(b, bs, "%d",
759207ae002SSam Leffler wf->cur.ath.ast_rx_rssi + wf->cur.ath.ast_rx_noise);
7602f549d72SSam Leffler return 1;
761b1b75b3bSAdrian Chadd case S_RX_AGG: STAT(rx_agg);
762b1b75b3bSAdrian Chadd case S_RX_HALFGI: STAT(rx_halfgi);
763b1b75b3bSAdrian Chadd case S_RX_2040: STAT(rx_2040);
764b1b75b3bSAdrian Chadd case S_RX_PRE_CRC_ERR: STAT(rx_pre_crc_err);
765b1b75b3bSAdrian Chadd case S_RX_POST_CRC_ERR: STAT(rx_post_crc_err);
766b1b75b3bSAdrian Chadd case S_RX_DECRYPT_BUSY_ERR: STAT(rx_decrypt_busy_err);
767b1b75b3bSAdrian Chadd case S_RX_HI_CHAIN: STAT(rx_hi_rx_chain);
7682cdc5a48SAdrian Chadd case S_RX_STBC: STAT(rx_stbc);
769b1b75b3bSAdrian Chadd case S_TX_HTPROTECT: STAT(tx_htprotect);
770b1b75b3bSAdrian Chadd case S_RX_QEND: STAT(rx_hitqueueend);
771b1b75b3bSAdrian Chadd case S_TX_TIMEOUT: STAT(tx_timeout);
772b1b75b3bSAdrian Chadd case S_TX_CSTIMEOUT: STAT(tx_cst);
773b1b75b3bSAdrian Chadd case S_TX_XTXOP_ERR: STAT(tx_xtxop);
774b1b75b3bSAdrian Chadd case S_TX_TIMEREXPIRED_ERR: STAT(tx_timerexpired);
775b1b75b3bSAdrian Chadd case S_TX_DESCCFG_ERR: STAT(tx_desccfgerr);
776b1b75b3bSAdrian Chadd case S_TX_SWRETRIES: STAT(tx_swretries);
777b1b75b3bSAdrian Chadd case S_TX_SWRETRIES_MAX: STAT(tx_swretrymax);
778b1b75b3bSAdrian Chadd case S_TX_DATA_UNDERRUN: STAT(tx_data_underrun);
779b1b75b3bSAdrian Chadd case S_TX_DELIM_UNDERRUN: STAT(tx_delim_underrun);
7801df8da4cSAdrian Chadd case S_TX_AGGR_OK: STAT(tx_aggr_ok);
7811df8da4cSAdrian Chadd case S_TX_AGGR_FAIL: STAT(tx_aggr_fail);
7821df8da4cSAdrian Chadd case S_TX_AGGR_FAILALL: STAT(tx_aggr_failall);
783*079bd2e7SAdrian Chadd case S_TX_MCASTQ_OVERFLOW: STAT(tx_mcastq_overflow);
784*079bd2e7SAdrian Chadd case S_RX_KEYMISS: STAT(rx_keymiss);
785*079bd2e7SAdrian Chadd case S_TX_SWFILTERED: STAT(tx_swfiltered);
786*079bd2e7SAdrian Chadd case S_TX_NODE_PSQ_OVERFLOW: STAT(tx_node_psq_overflow);
787*079bd2e7SAdrian Chadd case S_TX_NODEQ_OVERFLOW: STAT(tx_nodeq_overflow);
788*079bd2e7SAdrian Chadd case S_TX_LDPC: STAT(tx_ldpc);
789*079bd2e7SAdrian Chadd case S_TX_STBC: STAT(tx_stbc);
790*079bd2e7SAdrian Chadd case S_TSFOOR: STAT(tsfoor);
7912f549d72SSam Leffler }
7922f549d72SSam Leffler b[0] = '\0';
79312f961f4SSam Leffler return 0;
7942f549d72SSam Leffler #undef RXANT
7952f549d72SSam Leffler #undef TXANT
7964d490647SSam Leffler #undef ANI
7974d490647SSam Leffler #undef ANISTAT
7984d490647SSam Leffler #undef MIBSTAT
7992f549d72SSam Leffler #undef PHY
8002f549d72SSam Leffler #undef STAT
8012f549d72SSam Leffler }
8022f549d72SSam Leffler
8032f549d72SSam Leffler static int
ath_get_totstat(struct bsdstat * sf,int s,char b[],size_t bs)80415abc53aSAdrian Chadd ath_get_totstat(struct bsdstat *sf, int s, char b[], size_t bs)
8052f549d72SSam Leffler {
8062f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf;
8072f549d72SSam Leffler #define STAT(x) \
80895d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ath.ast_##x); return 1
8092f549d72SSam Leffler #define PHY(x) \
81095d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ath.ast_rx_phy[x]); return 1
8114d490647SSam Leffler #define ANI(x) \
81295d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ani_state.x); return 1
8134d490647SSam Leffler #define ANISTAT(x) \
81495d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ani_stats.ast_ani_##x); return 1
8154d490647SSam Leffler #define MIBSTAT(x) \
81695d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ani_stats.ast_mibstats.x); return 1
8172f549d72SSam Leffler #define TXANT(x) \
81895d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ath.ast_ant_tx[x]); return 1
8192f549d72SSam Leffler #define RXANT(x) \
82095d7bf0fSSam Leffler snprintf(b, bs, "%u", wf->total.ath.ast_ant_rx[x]); return 1
8212f549d72SSam Leffler
8222f549d72SSam Leffler switch (s) {
8232f549d72SSam Leffler case S_INPUT:
82495d7bf0fSSam Leffler snprintf(b, bs, "%lu",
825d3385328SAdrian Chadd (unsigned long) wf->total.ath.ast_rx_packets -
826d3385328SAdrian Chadd (unsigned long) wf->total.ath.ast_rx_mgt);
8272f549d72SSam Leffler return 1;
8282f549d72SSam Leffler case S_OUTPUT:
829d3385328SAdrian Chadd snprintf(b, bs, "%lu",
830d3385328SAdrian Chadd (unsigned long) wf->total.ath.ast_tx_packets);
8312f549d72SSam Leffler return 1;
8322f549d72SSam Leffler case S_RATE:
8334d490647SSam Leffler snprintrate(b, bs, wf->total.ath.ast_tx_rate);
8342f549d72SSam Leffler return 1;
8352f549d72SSam Leffler case S_WATCHDOG: STAT(watchdog);
8362f549d72SSam Leffler case S_FATAL: STAT(hardware);
8372f549d72SSam Leffler case S_BMISS: STAT(bmiss);
8382f549d72SSam Leffler case S_BMISS_PHANTOM: STAT(bmiss_phantom);
8392f549d72SSam Leffler #ifdef S_BSTUCK
8402f549d72SSam Leffler case S_BSTUCK: STAT(bstuck);
8412f549d72SSam Leffler #endif
8422f549d72SSam Leffler case S_RXORN: STAT(rxorn);
8432f549d72SSam Leffler case S_RXEOL: STAT(rxeol);
8442f549d72SSam Leffler case S_TXURN: STAT(txurn);
8452f549d72SSam Leffler case S_MIB: STAT(mib);
8462f549d72SSam Leffler #ifdef S_INTRCOAL
8472f549d72SSam Leffler case S_INTRCOAL: STAT(intrcoal);
8482f549d72SSam Leffler #endif
8492f549d72SSam Leffler case S_TX_MGMT: STAT(tx_mgmt);
8502f549d72SSam Leffler case S_TX_DISCARD: STAT(tx_discard);
8512f549d72SSam Leffler case S_TX_QSTOP: STAT(tx_qstop);
8522f549d72SSam Leffler case S_TX_ENCAP: STAT(tx_encap);
8532f549d72SSam Leffler case S_TX_NONODE: STAT(tx_nonode);
85441e449dbSSam Leffler case S_TX_NOBUF: STAT(tx_nobuf);
85541e449dbSSam Leffler case S_TX_NOFRAG: STAT(tx_nofrag);
8562f549d72SSam Leffler case S_TX_NOMBUF: STAT(tx_nombuf);
8572f549d72SSam Leffler #ifdef S_TX_NOMCL
8582f549d72SSam Leffler case S_TX_NOMCL: STAT(tx_nomcl);
8592f549d72SSam Leffler case S_TX_LINEAR: STAT(tx_linear);
8602f549d72SSam Leffler case S_TX_NODATA: STAT(tx_nodata);
8612f549d72SSam Leffler case S_TX_BUSDMA: STAT(tx_busdma);
8622f549d72SSam Leffler #endif
8632f549d72SSam Leffler case S_TX_XRETRIES: STAT(tx_xretries);
8642f549d72SSam Leffler case S_TX_FIFOERR: STAT(tx_fifoerr);
8652f549d72SSam Leffler case S_TX_FILTERED: STAT(tx_filtered);
8662f549d72SSam Leffler case S_TX_SHORTRETRY: STAT(tx_shortretry);
8672f549d72SSam Leffler case S_TX_LONGRETRY: STAT(tx_longretry);
8682f549d72SSam Leffler case S_TX_BADRATE: STAT(tx_badrate);
8692f549d72SSam Leffler case S_TX_NOACK: STAT(tx_noack);
8702f549d72SSam Leffler case S_TX_RTS: STAT(tx_rts);
8712f549d72SSam Leffler case S_TX_CTS: STAT(tx_cts);
8722f549d72SSam Leffler case S_TX_SHORTPRE: STAT(tx_shortpre);
8732f549d72SSam Leffler case S_TX_ALTRATE: STAT(tx_altrate);
8742f549d72SSam Leffler case S_TX_PROTECT: STAT(tx_protect);
875cc5912f8SSam Leffler case S_TX_RAW: STAT(tx_raw);
876cc5912f8SSam Leffler case S_TX_RAW_FAIL: STAT(tx_raw_fail);
8772f549d72SSam Leffler case S_RX_NOMBUF: STAT(rx_nombuf);
8782f549d72SSam Leffler #ifdef S_RX_BUSDMA
8792f549d72SSam Leffler case S_RX_BUSDMA: STAT(rx_busdma);
8802f549d72SSam Leffler #endif
8812f549d72SSam Leffler case S_RX_ORN: STAT(rx_orn);
8822f549d72SSam Leffler case S_RX_CRC_ERR: STAT(rx_crcerr);
8832f549d72SSam Leffler case S_RX_FIFO_ERR: STAT(rx_fifoerr);
8842f549d72SSam Leffler case S_RX_CRYPTO_ERR: STAT(rx_badcrypt);
8852f549d72SSam Leffler case S_RX_MIC_ERR: STAT(rx_badmic);
8862f549d72SSam Leffler case S_RX_PHY_ERR: STAT(rx_phyerr);
8872f549d72SSam Leffler case S_RX_PHY_UNDERRUN: PHY(HAL_PHYERR_UNDERRUN);
8882f549d72SSam Leffler case S_RX_PHY_TIMING: PHY(HAL_PHYERR_TIMING);
8892f549d72SSam Leffler case S_RX_PHY_PARITY: PHY(HAL_PHYERR_PARITY);
8902f549d72SSam Leffler case S_RX_PHY_RATE: PHY(HAL_PHYERR_RATE);
8912f549d72SSam Leffler case S_RX_PHY_LENGTH: PHY(HAL_PHYERR_LENGTH);
8922f549d72SSam Leffler case S_RX_PHY_RADAR: PHY(HAL_PHYERR_RADAR);
8932f549d72SSam Leffler case S_RX_PHY_SERVICE: PHY(HAL_PHYERR_SERVICE);
8942f549d72SSam Leffler case S_RX_PHY_TOR: PHY(HAL_PHYERR_TOR);
8952f549d72SSam Leffler case S_RX_PHY_OFDM_TIMING: PHY(HAL_PHYERR_OFDM_TIMING);
8962f549d72SSam Leffler case S_RX_PHY_OFDM_SIGNAL_PARITY: PHY(HAL_PHYERR_OFDM_SIGNAL_PARITY);
8972f549d72SSam Leffler case S_RX_PHY_OFDM_RATE_ILLEGAL: PHY(HAL_PHYERR_OFDM_RATE_ILLEGAL);
8982f549d72SSam Leffler case S_RX_PHY_OFDM_POWER_DROP: PHY(HAL_PHYERR_OFDM_POWER_DROP);
8992f549d72SSam Leffler case S_RX_PHY_OFDM_SERVICE: PHY(HAL_PHYERR_OFDM_SERVICE);
9002f549d72SSam Leffler case S_RX_PHY_OFDM_RESTART: PHY(HAL_PHYERR_OFDM_RESTART);
9012f549d72SSam Leffler case S_RX_PHY_CCK_TIMING: PHY(HAL_PHYERR_CCK_TIMING);
9022f549d72SSam Leffler case S_RX_PHY_CCK_HEADER_CRC: PHY(HAL_PHYERR_CCK_HEADER_CRC);
9032f549d72SSam Leffler case S_RX_PHY_CCK_RATE_ILLEGAL: PHY(HAL_PHYERR_CCK_RATE_ILLEGAL);
9042f549d72SSam Leffler case S_RX_PHY_CCK_SERVICE: PHY(HAL_PHYERR_CCK_SERVICE);
9052f549d72SSam Leffler case S_RX_PHY_CCK_RESTART: PHY(HAL_PHYERR_CCK_RESTART);
9062f549d72SSam Leffler case S_RX_TOOSHORT: STAT(rx_tooshort);
9072f549d72SSam Leffler case S_RX_TOOBIG: STAT(rx_toobig);
9082f549d72SSam Leffler case S_RX_MGT: STAT(rx_mgt);
9092f549d72SSam Leffler case S_RX_CTL: STAT(rx_ctl);
9102f549d72SSam Leffler case S_TX_RSSI:
911207ae002SSam Leffler snprintf(b, bs, "%d", wf->total.ath.ast_tx_rssi);
9122f549d72SSam Leffler return 1;
9132f549d72SSam Leffler case S_RX_RSSI:
914207ae002SSam Leffler snprintf(b, bs, "%d", wf->total.ath.ast_rx_rssi);
9152f549d72SSam Leffler return 1;
9162f549d72SSam Leffler case S_BE_XMIT: STAT(be_xmit);
9172f549d72SSam Leffler case S_BE_NOMBUF: STAT(be_nombuf);
9182f549d72SSam Leffler case S_PER_CAL: STAT(per_cal);
9192f549d72SSam Leffler case S_PER_CALFAIL: STAT(per_calfail);
9202f549d72SSam Leffler case S_PER_RFGAIN: STAT(per_rfgain);
9212f549d72SSam Leffler #ifdef S_TDMA_UPDATE
9222f549d72SSam Leffler case S_TDMA_UPDATE: STAT(tdma_update);
9232f549d72SSam Leffler case S_TDMA_TIMERS: STAT(tdma_timers);
9242f549d72SSam Leffler case S_TDMA_TSF: STAT(tdma_tsf);
92510ad9a77SSam Leffler case S_TDMA_TSFADJ:
92610ad9a77SSam Leffler snprintf(b, bs, "-%d/+%d",
92710ad9a77SSam Leffler wf->total.ath.ast_tdma_tsfadjm,
92810ad9a77SSam Leffler wf->total.ath.ast_tdma_tsfadjp);
92910ad9a77SSam Leffler return 1;
930cc5912f8SSam Leffler case S_TDMA_ACK: STAT(tdma_ack);
9312f549d72SSam Leffler #endif
9322f549d72SSam Leffler case S_RATE_CALLS: STAT(rate_calls);
9332f549d72SSam Leffler case S_RATE_RAISE: STAT(rate_raise);
9342f549d72SSam Leffler case S_RATE_DROP: STAT(rate_drop);
9352f549d72SSam Leffler case S_ANT_DEFSWITCH: STAT(ant_defswitch);
9362f549d72SSam Leffler case S_ANT_TXSWITCH: STAT(ant_txswitch);
9374d490647SSam Leffler #ifdef S_ANI_NOISE
9384d490647SSam Leffler case S_ANI_NOISE: ANI(noiseImmunityLevel);
9394d490647SSam Leffler case S_ANI_SPUR: ANI(spurImmunityLevel);
9404d490647SSam Leffler case S_ANI_STEP: ANI(firstepLevel);
94104fc88d5SSam Leffler case S_ANI_OFDM: ANI(ofdmWeakSigDetectOff);
94204fc88d5SSam Leffler case S_ANI_CCK: ANI(cckWeakSigThreshold);
9434d490647SSam Leffler case S_ANI_LISTEN: ANI(listenTime);
9444d490647SSam Leffler case S_ANI_NIUP: ANISTAT(niup);
9454d490647SSam Leffler case S_ANI_NIDOWN: ANISTAT(nidown);
9464d490647SSam Leffler case S_ANI_SIUP: ANISTAT(spurup);
9474d490647SSam Leffler case S_ANI_SIDOWN: ANISTAT(spurdown);
9484d490647SSam Leffler case S_ANI_OFDMON: ANISTAT(ofdmon);
9494d490647SSam Leffler case S_ANI_OFDMOFF: ANISTAT(ofdmoff);
9504d490647SSam Leffler case S_ANI_CCKHI: ANISTAT(cckhigh);
9514d490647SSam Leffler case S_ANI_CCKLO: ANISTAT(ccklow);
9524d490647SSam Leffler case S_ANI_STEPUP: ANISTAT(stepup);
9534d490647SSam Leffler case S_ANI_STEPDOWN: ANISTAT(stepdown);
9544d490647SSam Leffler case S_ANI_OFDMERRS: ANISTAT(ofdmerrs);
9554d490647SSam Leffler case S_ANI_CCKERRS: ANISTAT(cckerrs);
9564d490647SSam Leffler case S_ANI_RESET: ANISTAT(reset);
9574d490647SSam Leffler case S_ANI_LZERO: ANISTAT(lzero);
9584d490647SSam Leffler case S_ANI_LNEG: ANISTAT(lneg);
9594d490647SSam Leffler case S_MIB_ACKBAD: MIBSTAT(ackrcv_bad);
9604d490647SSam Leffler case S_MIB_RTSBAD: MIBSTAT(rts_bad);
9614d490647SSam Leffler case S_MIB_RTSGOOD: MIBSTAT(rts_good);
9624d490647SSam Leffler case S_MIB_FCSBAD: MIBSTAT(fcs_bad);
9634d490647SSam Leffler case S_MIB_BEACONS: MIBSTAT(beacons);
9644d490647SSam Leffler case S_NODE_AVGBRSSI:
9654d490647SSam Leffler snprintf(b, bs, "%u",
9664d490647SSam Leffler HAL_RSSI(wf->total.ani_stats.ast_nodestats.ns_avgbrssi));
9674d490647SSam Leffler return 1;
9684d490647SSam Leffler case S_NODE_AVGRSSI:
9694d490647SSam Leffler snprintf(b, bs, "%u",
9704d490647SSam Leffler HAL_RSSI(wf->total.ani_stats.ast_nodestats.ns_avgrssi));
9714d490647SSam Leffler return 1;
9724d490647SSam Leffler case S_NODE_AVGARSSI:
9734d490647SSam Leffler snprintf(b, bs, "%u",
9744d490647SSam Leffler HAL_RSSI(wf->total.ani_stats.ast_nodestats.ns_avgtxrssi));
9754d490647SSam Leffler return 1;
9764d490647SSam Leffler #endif
9772f549d72SSam Leffler case S_ANT_TX0: TXANT(0);
9782f549d72SSam Leffler case S_ANT_TX1: TXANT(1);
9792f549d72SSam Leffler case S_ANT_TX2: TXANT(2);
9802f549d72SSam Leffler case S_ANT_TX3: TXANT(3);
9812f549d72SSam Leffler case S_ANT_TX4: TXANT(4);
9822f549d72SSam Leffler case S_ANT_TX5: TXANT(5);
9832f549d72SSam Leffler case S_ANT_TX6: TXANT(6);
9842f549d72SSam Leffler case S_ANT_TX7: TXANT(7);
9852f549d72SSam Leffler case S_ANT_RX0: RXANT(0);
9862f549d72SSam Leffler case S_ANT_RX1: RXANT(1);
9872f549d72SSam Leffler case S_ANT_RX2: RXANT(2);
9882f549d72SSam Leffler case S_ANT_RX3: RXANT(3);
9892f549d72SSam Leffler case S_ANT_RX4: RXANT(4);
9902f549d72SSam Leffler case S_ANT_RX5: RXANT(5);
9912f549d72SSam Leffler case S_ANT_RX6: RXANT(6);
9922f549d72SSam Leffler case S_ANT_RX7: RXANT(7);
9932f549d72SSam Leffler #ifdef S_CABQ_XMIT
9942f549d72SSam Leffler case S_CABQ_XMIT: STAT(cabq_xmit);
9952f549d72SSam Leffler case S_CABQ_BUSY: STAT(cabq_busy);
9962f549d72SSam Leffler #endif
9972f549d72SSam Leffler case S_FF_TXOK: STAT(ff_txok);
9982f549d72SSam Leffler case S_FF_TXERR: STAT(ff_txerr);
999207ae002SSam Leffler case S_FF_RX: STAT(ff_rx);
10002f549d72SSam Leffler case S_FF_FLUSH: STAT(ff_flush);
1001207ae002SSam Leffler case S_TX_QFULL: STAT(tx_qfull);
1002d90b001eSAdrian Chadd case S_BMISSCOUNT: STAT(be_missed);
10032f549d72SSam Leffler case S_RX_NOISE:
1004207ae002SSam Leffler snprintf(b, bs, "%d", wf->total.ath.ast_rx_noise);
10052f549d72SSam Leffler return 1;
10062f549d72SSam Leffler case S_TX_SIGNAL:
10072f549d72SSam Leffler snprintf(b, bs, "%d",
1008207ae002SSam Leffler wf->total.ath.ast_tx_rssi + wf->total.ath.ast_rx_noise);
10092f549d72SSam Leffler return 1;
10102f549d72SSam Leffler case S_RX_SIGNAL:
10112f549d72SSam Leffler snprintf(b, bs, "%d",
1012207ae002SSam Leffler wf->total.ath.ast_rx_rssi + wf->total.ath.ast_rx_noise);
10132f549d72SSam Leffler return 1;
1014b1b75b3bSAdrian Chadd case S_RX_AGG: STAT(rx_agg);
1015b1b75b3bSAdrian Chadd case S_RX_HALFGI: STAT(rx_halfgi);
1016b1b75b3bSAdrian Chadd case S_RX_2040: STAT(rx_2040);
1017b1b75b3bSAdrian Chadd case S_RX_PRE_CRC_ERR: STAT(rx_pre_crc_err);
1018b1b75b3bSAdrian Chadd case S_RX_POST_CRC_ERR: STAT(rx_post_crc_err);
1019b1b75b3bSAdrian Chadd case S_RX_DECRYPT_BUSY_ERR: STAT(rx_decrypt_busy_err);
1020b1b75b3bSAdrian Chadd case S_RX_HI_CHAIN: STAT(rx_hi_rx_chain);
10212cdc5a48SAdrian Chadd case S_RX_STBC: STAT(rx_stbc);
1022b1b75b3bSAdrian Chadd case S_TX_HTPROTECT: STAT(tx_htprotect);
1023b1b75b3bSAdrian Chadd case S_RX_QEND: STAT(rx_hitqueueend);
1024b1b75b3bSAdrian Chadd case S_TX_TIMEOUT: STAT(tx_timeout);
1025b1b75b3bSAdrian Chadd case S_TX_CSTIMEOUT: STAT(tx_cst);
1026b1b75b3bSAdrian Chadd case S_TX_XTXOP_ERR: STAT(tx_xtxop);
1027b1b75b3bSAdrian Chadd case S_TX_TIMEREXPIRED_ERR: STAT(tx_timerexpired);
1028b1b75b3bSAdrian Chadd case S_TX_DESCCFG_ERR: STAT(tx_desccfgerr);
1029b1b75b3bSAdrian Chadd case S_TX_SWRETRIES: STAT(tx_swretries);
1030b1b75b3bSAdrian Chadd case S_TX_SWRETRIES_MAX: STAT(tx_swretrymax);
1031b1b75b3bSAdrian Chadd case S_TX_DATA_UNDERRUN: STAT(tx_data_underrun);
1032b1b75b3bSAdrian Chadd case S_TX_DELIM_UNDERRUN: STAT(tx_delim_underrun);
10331df8da4cSAdrian Chadd case S_TX_AGGR_OK: STAT(tx_aggr_ok);
10341df8da4cSAdrian Chadd case S_TX_AGGR_FAIL: STAT(tx_aggr_fail);
10351df8da4cSAdrian Chadd case S_TX_AGGR_FAILALL: STAT(tx_aggr_failall);
1036*079bd2e7SAdrian Chadd case S_TX_MCASTQ_OVERFLOW: STAT(tx_mcastq_overflow);
1037*079bd2e7SAdrian Chadd case S_RX_KEYMISS: STAT(rx_keymiss);
1038*079bd2e7SAdrian Chadd case S_TX_SWFILTERED: STAT(tx_swfiltered);
1039*079bd2e7SAdrian Chadd case S_TX_NODE_PSQ_OVERFLOW: STAT(tx_node_psq_overflow);
1040*079bd2e7SAdrian Chadd case S_TX_NODEQ_OVERFLOW: STAT(tx_nodeq_overflow);
1041*079bd2e7SAdrian Chadd case S_TX_LDPC: STAT(tx_ldpc);
1042*079bd2e7SAdrian Chadd case S_TX_STBC: STAT(tx_stbc);
1043*079bd2e7SAdrian Chadd case S_TSFOOR: STAT(tsfoor);
10442f549d72SSam Leffler }
10452f549d72SSam Leffler b[0] = '\0';
10462f549d72SSam Leffler return 0;
10472f549d72SSam Leffler #undef RXANT
10482f549d72SSam Leffler #undef TXANT
10494d490647SSam Leffler #undef ANI
10504d490647SSam Leffler #undef ANISTAT
10514d490647SSam Leffler #undef MIBSTAT
10522f549d72SSam Leffler #undef PHY
10532f549d72SSam Leffler #undef STAT
10542f549d72SSam Leffler }
10552f549d72SSam Leffler
10562f549d72SSam Leffler static void
ath_print_verbose(struct bsdstat * sf,FILE * fd)105715abc53aSAdrian Chadd ath_print_verbose(struct bsdstat *sf, FILE *fd)
10582f549d72SSam Leffler {
10592f549d72SSam Leffler struct athstatfoo_p *wf = (struct athstatfoo_p *) sf;
10602f549d72SSam Leffler #define isphyerr(i) (S_PHY_MIN <= i && i <= S_PHY_MAX)
1061207ae002SSam Leffler const struct fmt *f;
10622f549d72SSam Leffler char s[32];
10632f549d72SSam Leffler const char *indent;
1064207ae002SSam Leffler int i, width;
10652f549d72SSam Leffler
1066207ae002SSam Leffler width = 0;
1067207ae002SSam Leffler for (i = 0; i < S_LAST; i++) {
1068207ae002SSam Leffler f = &sf->stats[i];
1069207ae002SSam Leffler if (!isphyerr(i) && f->width > width)
1070207ae002SSam Leffler width = f->width;
1071207ae002SSam Leffler }
10722f549d72SSam Leffler for (i = 0; i < S_LAST; i++) {
10732f549d72SSam Leffler if (ath_get_totstat(sf, i, s, sizeof(s)) && strcmp(s, "0")) {
10742f549d72SSam Leffler if (isphyerr(i))
10752f549d72SSam Leffler indent = " ";
10762f549d72SSam Leffler else
10772f549d72SSam Leffler indent = "";
1078207ae002SSam Leffler fprintf(fd, "%s%-*s %s\n", indent, width, s, athstats[i].desc);
10792f549d72SSam Leffler }
10802f549d72SSam Leffler }
10812f549d72SSam Leffler fprintf(fd, "Antenna profile:\n");
10822f549d72SSam Leffler for (i = 0; i < 8; i++)
1083207ae002SSam Leffler if (wf->total.ath.ast_ant_rx[i] || wf->total.ath.ast_ant_tx[i])
10842f549d72SSam Leffler fprintf(fd, "[%u] tx %8u rx %8u\n", i,
1085207ae002SSam Leffler wf->total.ath.ast_ant_tx[i],
1086207ae002SSam Leffler wf->total.ath.ast_ant_rx[i]);
10872f549d72SSam Leffler #undef isphyerr
10882f549d72SSam Leffler }
10892f549d72SSam Leffler
BSDSTAT_DEFINE_BOUNCE(athstatfoo)109015abc53aSAdrian Chadd BSDSTAT_DEFINE_BOUNCE(athstatfoo)
10912f549d72SSam Leffler
10922f549d72SSam Leffler struct athstatfoo *
10932f549d72SSam Leffler athstats_new(const char *ifname, const char *fmtstring)
10942f549d72SSam Leffler {
10952f549d72SSam Leffler struct athstatfoo_p *wf;
10962f549d72SSam Leffler
10972f549d72SSam Leffler wf = calloc(1, sizeof(struct athstatfoo_p));
10982f549d72SSam Leffler if (wf != NULL) {
10994f0edd39SAdrian Chadd ath_driver_req_init(&wf->req);
110060caf0c9SCraig Rodrigues bsdstat_init(&wf->base.base, "athstats", athstats,
110160caf0c9SCraig Rodrigues nitems(athstats));
11022f549d72SSam Leffler /* override base methods */
11032f549d72SSam Leffler wf->base.base.collect_cur = ath_collect_cur;
11042f549d72SSam Leffler wf->base.base.collect_tot = ath_collect_tot;
11052f549d72SSam Leffler wf->base.base.get_curstat = ath_get_curstat;
11062f549d72SSam Leffler wf->base.base.get_totstat = ath_get_totstat;
11072f549d72SSam Leffler wf->base.base.update_tot = ath_update_tot;
11082f549d72SSam Leffler wf->base.base.print_verbose = ath_print_verbose;
11092f549d72SSam Leffler
11102f549d72SSam Leffler /* setup bounce functions for public methods */
111115abc53aSAdrian Chadd BSDSTAT_BOUNCE(wf, athstatfoo);
11122f549d72SSam Leffler
11132f549d72SSam Leffler /* setup our public methods */
11142f549d72SSam Leffler wf->base.setifname = ath_setifname;
11152f549d72SSam Leffler #if 0
11162f549d72SSam Leffler wf->base.setstamac = wlan_setstamac;
11172f549d72SSam Leffler #endif
1118dd8d00f5SSam Leffler wf->base.zerostats = ath_zerostats;
11192f549d72SSam Leffler ath_setifname(&wf->base, ifname);
11202f549d72SSam Leffler wf->base.setfmt(&wf->base, fmtstring);
11212f549d72SSam Leffler }
11222f549d72SSam Leffler return &wf->base;
112312f961f4SSam Leffler }
1124