xref: /freebsd/sys/x86/x86/tsc.c (revision aa0a1e58f0189b0fde359a8bda032887e72057fa)
1 /*-
2  * Copyright (c) 1998-2003 Poul-Henning Kamp
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
15  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
16  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
17  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
18  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
19  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
20  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
21  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
22  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
23  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
24  * SUCH DAMAGE.
25  */
26 
27 #include <sys/cdefs.h>
28 __FBSDID("$FreeBSD$");
29 
30 #include "opt_clock.h"
31 
32 #include <sys/param.h>
33 #include <sys/bus.h>
34 #include <sys/cpu.h>
35 #include <sys/malloc.h>
36 #include <sys/systm.h>
37 #include <sys/sysctl.h>
38 #include <sys/time.h>
39 #include <sys/timetc.h>
40 #include <sys/kernel.h>
41 #include <sys/power.h>
42 #include <sys/smp.h>
43 #include <machine/clock.h>
44 #include <machine/cputypes.h>
45 #include <machine/md_var.h>
46 #include <machine/specialreg.h>
47 
48 #include "cpufreq_if.h"
49 
50 uint64_t	tsc_freq;
51 int		tsc_is_invariant;
52 static eventhandler_tag tsc_levels_tag, tsc_pre_tag, tsc_post_tag;
53 
54 SYSCTL_INT(_kern_timecounter, OID_AUTO, invariant_tsc, CTLFLAG_RDTUN,
55     &tsc_is_invariant, 0, "Indicates whether the TSC is P-state invariant");
56 TUNABLE_INT("kern.timecounter.invariant_tsc", &tsc_is_invariant);
57 
58 #ifdef SMP
59 static int	smp_tsc;
60 SYSCTL_INT(_kern_timecounter, OID_AUTO, smp_tsc, CTLFLAG_RDTUN, &smp_tsc, 0,
61     "Indicates whether the TSC is safe to use in SMP mode");
62 TUNABLE_INT("kern.timecounter.smp_tsc", &smp_tsc);
63 #endif
64 
65 static int	tsc_disabled;
66 SYSCTL_INT(_machdep, OID_AUTO, disable_tsc, CTLFLAG_RDTUN, &tsc_disabled, 0,
67     "Disable x86 Time Stamp Counter");
68 TUNABLE_INT("machdep.disable_tsc", &tsc_disabled);
69 
70 static void tsc_freq_changed(void *arg, const struct cf_level *level,
71     int status);
72 static void tsc_freq_changing(void *arg, const struct cf_level *level,
73     int *status);
74 static	unsigned tsc_get_timecount(struct timecounter *tc);
75 static void tsc_levels_changed(void *arg, int unit);
76 
77 static struct timecounter tsc_timecounter = {
78 	tsc_get_timecount,	/* get_timecount */
79 	0,			/* no poll_pps */
80 	~0u,			/* counter_mask */
81 	0,			/* frequency */
82 	"TSC",			/* name */
83 	800,			/* quality (adjusted in code) */
84 };
85 
86 void
87 init_TSC(void)
88 {
89 	u_int64_t tscval[2];
90 
91 	if ((cpu_feature & CPUID_TSC) == 0 || tsc_disabled)
92 		return;
93 
94 	if (bootverbose)
95 	        printf("Calibrating TSC clock ... ");
96 
97 	tscval[0] = rdtsc();
98 	DELAY(1000000);
99 	tscval[1] = rdtsc();
100 
101 	tsc_freq = tscval[1] - tscval[0];
102 	if (bootverbose)
103 		printf("TSC clock: %ju Hz\n", (intmax_t)tsc_freq);
104 
105 	switch (cpu_vendor_id) {
106 	case CPU_VENDOR_AMD:
107 		if ((amd_pminfo & AMDPM_TSC_INVARIANT) != 0 ||
108 		    (vm_guest == VM_GUEST_NO &&
109 		    CPUID_TO_FAMILY(cpu_id) >= 0x10))
110 			tsc_is_invariant = 1;
111 		break;
112 	case CPU_VENDOR_INTEL:
113 		if ((amd_pminfo & AMDPM_TSC_INVARIANT) != 0 ||
114 		    (vm_guest == VM_GUEST_NO &&
115 		    ((CPUID_TO_FAMILY(cpu_id) == 0x6 &&
116 		    CPUID_TO_MODEL(cpu_id) >= 0xe) ||
117 		    (CPUID_TO_FAMILY(cpu_id) == 0xf &&
118 		    CPUID_TO_MODEL(cpu_id) >= 0x3))))
119 			tsc_is_invariant = 1;
120 		break;
121 	case CPU_VENDOR_CENTAUR:
122 		if (vm_guest == VM_GUEST_NO &&
123 		    CPUID_TO_FAMILY(cpu_id) == 0x6 &&
124 		    CPUID_TO_MODEL(cpu_id) >= 0xf &&
125 		    (rdmsr(0x1203) & 0x100000000ULL) == 0)
126 			tsc_is_invariant = 1;
127 		break;
128 	}
129 
130 	/*
131 	 * Inform CPU accounting about our boot-time clock rate.  This will
132 	 * be updated if someone loads a cpufreq driver after boot that
133 	 * discovers a new max frequency.
134 	 */
135 	set_cputicker(rdtsc, tsc_freq, 1);
136 
137 	if (tsc_is_invariant)
138 		return;
139 
140 	/* Register to find out about changes in CPU frequency. */
141 	tsc_pre_tag = EVENTHANDLER_REGISTER(cpufreq_pre_change,
142 	    tsc_freq_changing, NULL, EVENTHANDLER_PRI_FIRST);
143 	tsc_post_tag = EVENTHANDLER_REGISTER(cpufreq_post_change,
144 	    tsc_freq_changed, NULL, EVENTHANDLER_PRI_FIRST);
145 	tsc_levels_tag = EVENTHANDLER_REGISTER(cpufreq_levels_changed,
146 	    tsc_levels_changed, NULL, EVENTHANDLER_PRI_ANY);
147 }
148 
149 void
150 init_TSC_tc(void)
151 {
152 
153 	if ((cpu_feature & CPUID_TSC) == 0 || tsc_disabled)
154 		return;
155 
156 	/*
157 	 * We can not use the TSC if we support APM.  Precise timekeeping
158 	 * on an APM'ed machine is at best a fools pursuit, since
159 	 * any and all of the time spent in various SMM code can't
160 	 * be reliably accounted for.  Reading the RTC is your only
161 	 * source of reliable time info.  The i8254 loses too, of course,
162 	 * but we need to have some kind of time...
163 	 * We don't know at this point whether APM is going to be used
164 	 * or not, nor when it might be activated.  Play it safe.
165 	 */
166 	if (power_pm_get_type() == POWER_PM_TYPE_APM) {
167 		tsc_timecounter.tc_quality = -1000;
168 		if (bootverbose)
169 			printf("TSC timecounter disabled: APM enabled.\n");
170 	}
171 
172 #ifdef SMP
173 	/*
174 	 * We can not use the TSC in SMP mode unless the TSCs on all CPUs
175 	 * are somehow synchronized.  Some hardware configurations do
176 	 * this, but we have no way of determining whether this is the
177 	 * case, so we do not use the TSC in multi-processor systems
178 	 * unless the user indicated (by setting kern.timecounter.smp_tsc
179 	 * to 1) that he believes that his TSCs are synchronized.
180 	 */
181 	if (mp_ncpus > 1 && !smp_tsc)
182 		tsc_timecounter.tc_quality = -100;
183 #endif
184 
185 	if (tsc_freq != 0) {
186 		tsc_timecounter.tc_frequency = tsc_freq;
187 		tc_init(&tsc_timecounter);
188 	}
189 }
190 
191 /*
192  * When cpufreq levels change, find out about the (new) max frequency.  We
193  * use this to update CPU accounting in case it got a lower estimate at boot.
194  */
195 static void
196 tsc_levels_changed(void *arg, int unit)
197 {
198 	device_t cf_dev;
199 	struct cf_level *levels;
200 	int count, error;
201 	uint64_t max_freq;
202 
203 	/* Only use values from the first CPU, assuming all are equal. */
204 	if (unit != 0)
205 		return;
206 
207 	/* Find the appropriate cpufreq device instance. */
208 	cf_dev = devclass_get_device(devclass_find("cpufreq"), unit);
209 	if (cf_dev == NULL) {
210 		printf("tsc_levels_changed() called but no cpufreq device?\n");
211 		return;
212 	}
213 
214 	/* Get settings from the device and find the max frequency. */
215 	count = 64;
216 	levels = malloc(count * sizeof(*levels), M_TEMP, M_NOWAIT);
217 	if (levels == NULL)
218 		return;
219 	error = CPUFREQ_LEVELS(cf_dev, levels, &count);
220 	if (error == 0 && count != 0) {
221 		max_freq = (uint64_t)levels[0].total_set.freq * 1000000;
222 		set_cputicker(rdtsc, max_freq, 1);
223 	} else
224 		printf("tsc_levels_changed: no max freq found\n");
225 	free(levels, M_TEMP);
226 }
227 
228 /*
229  * If the TSC timecounter is in use, veto the pending change.  It may be
230  * possible in the future to handle a dynamically-changing timecounter rate.
231  */
232 static void
233 tsc_freq_changing(void *arg, const struct cf_level *level, int *status)
234 {
235 
236 	if (*status != 0 || timecounter != &tsc_timecounter)
237 		return;
238 
239 	printf("timecounter TSC must not be in use when "
240 	    "changing frequencies; change denied\n");
241 	*status = EBUSY;
242 }
243 
244 /* Update TSC freq with the value indicated by the caller. */
245 static void
246 tsc_freq_changed(void *arg, const struct cf_level *level, int status)
247 {
248 
249 	/* If there was an error during the transition, don't do anything. */
250 	if (tsc_disabled || status != 0)
251 		return;
252 
253 	/* Total setting for this level gives the new frequency in MHz. */
254 	tsc_freq = (uint64_t)level->total_set.freq * 1000000;
255 	tsc_timecounter.tc_frequency = tsc_freq;
256 }
257 
258 static int
259 sysctl_machdep_tsc_freq(SYSCTL_HANDLER_ARGS)
260 {
261 	int error;
262 	uint64_t freq;
263 
264 	if (tsc_timecounter.tc_frequency == 0)
265 		return (EOPNOTSUPP);
266 	freq = tsc_freq;
267 	error = sysctl_handle_64(oidp, &freq, 0, req);
268 	if (error == 0 && req->newptr != NULL) {
269 		tsc_freq = freq;
270 		tsc_timecounter.tc_frequency = tsc_freq;
271 	}
272 	return (error);
273 }
274 
275 SYSCTL_PROC(_machdep, OID_AUTO, tsc_freq, CTLTYPE_U64 | CTLFLAG_RW,
276     0, 0, sysctl_machdep_tsc_freq, "QU", "");
277 
278 static unsigned
279 tsc_get_timecount(struct timecounter *tc)
280 {
281 	return (rdtsc());
282 }
283