1 /*- 2 * Copyright (c) 1998-2003 Poul-Henning Kamp 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include "opt_clock.h" 31 32 #include <sys/param.h> 33 #include <sys/bus.h> 34 #include <sys/cpu.h> 35 #include <sys/limits.h> 36 #include <sys/malloc.h> 37 #include <sys/systm.h> 38 #include <sys/sysctl.h> 39 #include <sys/time.h> 40 #include <sys/timetc.h> 41 #include <sys/kernel.h> 42 #include <sys/power.h> 43 #include <sys/smp.h> 44 #include <machine/clock.h> 45 #include <machine/cputypes.h> 46 #include <machine/md_var.h> 47 #include <machine/specialreg.h> 48 49 #include "cpufreq_if.h" 50 51 uint64_t tsc_freq; 52 int tsc_is_invariant; 53 int tsc_perf_stat; 54 55 static eventhandler_tag tsc_levels_tag, tsc_pre_tag, tsc_post_tag; 56 57 SYSCTL_INT(_kern_timecounter, OID_AUTO, invariant_tsc, CTLFLAG_RDTUN, 58 &tsc_is_invariant, 0, "Indicates whether the TSC is P-state invariant"); 59 TUNABLE_INT("kern.timecounter.invariant_tsc", &tsc_is_invariant); 60 61 #ifdef SMP 62 static int smp_tsc; 63 SYSCTL_INT(_kern_timecounter, OID_AUTO, smp_tsc, CTLFLAG_RDTUN, &smp_tsc, 0, 64 "Indicates whether the TSC is safe to use in SMP mode"); 65 TUNABLE_INT("kern.timecounter.smp_tsc", &smp_tsc); 66 #endif 67 68 static int tsc_disabled; 69 SYSCTL_INT(_machdep, OID_AUTO, disable_tsc, CTLFLAG_RDTUN, &tsc_disabled, 0, 70 "Disable x86 Time Stamp Counter"); 71 TUNABLE_INT("machdep.disable_tsc", &tsc_disabled); 72 73 static int tsc_skip_calibration; 74 SYSCTL_INT(_machdep, OID_AUTO, disable_tsc_calibration, CTLFLAG_RDTUN, 75 &tsc_skip_calibration, 0, "Disable TSC frequency calibration"); 76 TUNABLE_INT("machdep.disable_tsc_calibration", &tsc_skip_calibration); 77 78 static void tsc_freq_changed(void *arg, const struct cf_level *level, 79 int status); 80 static void tsc_freq_changing(void *arg, const struct cf_level *level, 81 int *status); 82 static unsigned tsc_get_timecount(struct timecounter *tc); 83 static void tsc_levels_changed(void *arg, int unit); 84 85 static struct timecounter tsc_timecounter = { 86 tsc_get_timecount, /* get_timecount */ 87 0, /* no poll_pps */ 88 ~0u, /* counter_mask */ 89 0, /* frequency */ 90 "TSC", /* name */ 91 800, /* quality (adjusted in code) */ 92 }; 93 94 #define VMW_HVMAGIC 0x564d5868 95 #define VMW_HVPORT 0x5658 96 #define VMW_HVCMD_GETVERSION 10 97 #define VMW_HVCMD_GETHZ 45 98 99 static __inline void 100 vmware_hvcall(u_int cmd, u_int *p) 101 { 102 103 __asm __volatile("inl (%%dx)" 104 : "=a" (p[0]), "=b" (p[1]), "=c" (p[2]), "=d" (p[3]) 105 : "0" (VMW_HVMAGIC), "1" (UINT_MAX), "2" (cmd), "3" (VMW_HVPORT) 106 : "memory"); 107 } 108 109 static int 110 tsc_freq_vmware(void) 111 { 112 char hv_sig[13]; 113 u_int regs[4]; 114 char *p; 115 u_int hv_high; 116 int i; 117 118 /* 119 * [RFC] CPUID usage for interaction between Hypervisors and Linux. 120 * http://lkml.org/lkml/2008/10/1/246 121 * 122 * KB1009458: Mechanisms to determine if software is running in 123 * a VMware virtual machine 124 * http://kb.vmware.com/kb/1009458 125 */ 126 hv_high = 0; 127 if ((cpu_feature2 & CPUID2_HV) != 0) { 128 do_cpuid(0x40000000, regs); 129 hv_high = regs[0]; 130 for (i = 1, p = hv_sig; i < 4; i++, p += sizeof(regs) / 4) 131 memcpy(p, ®s[i], sizeof(regs[i])); 132 *p = '\0'; 133 if (bootverbose) { 134 /* 135 * HV vendor ID string 136 * ------------+-------------- 137 * KVM "KVMKVMKVM" 138 * Microsoft "Microsoft Hv" 139 * VMware "VMwareVMware" 140 * Xen "XenVMMXenVMM" 141 */ 142 printf("Hypervisor: Origin = \"%s\"\n", hv_sig); 143 } 144 if (strncmp(hv_sig, "VMwareVMware", 12) != 0) 145 return (0); 146 } else { 147 p = getenv("smbios.system.serial"); 148 if (p == NULL) 149 return (0); 150 if (strncmp(p, "VMware-", 7) != 0 && 151 strncmp(p, "VMW", 3) != 0) { 152 freeenv(p); 153 return (0); 154 } 155 freeenv(p); 156 vmware_hvcall(VMW_HVCMD_GETVERSION, regs); 157 if (regs[1] != VMW_HVMAGIC) 158 return (0); 159 } 160 if (hv_high >= 0x40000010) { 161 do_cpuid(0x40000010, regs); 162 tsc_freq = regs[0] * 1000; 163 } else { 164 vmware_hvcall(VMW_HVCMD_GETHZ, regs); 165 if (regs[1] != UINT_MAX) 166 tsc_freq = regs[0] | ((uint64_t)regs[1] << 32); 167 } 168 tsc_is_invariant = 1; 169 #ifdef SMP 170 smp_tsc = 1; /* XXX */ 171 #endif 172 return (1); 173 } 174 175 static void 176 tsc_freq_intel(void) 177 { 178 char brand[48]; 179 u_int regs[4]; 180 uint64_t freq; 181 char *p; 182 u_int i; 183 184 /* 185 * Intel Processor Identification and the CPUID Instruction 186 * Application Note 485. 187 * http://www.intel.com/assets/pdf/appnote/241618.pdf 188 */ 189 if (cpu_exthigh >= 0x80000004) { 190 p = brand; 191 for (i = 0x80000002; i < 0x80000005; i++) { 192 do_cpuid(i, regs); 193 memcpy(p, regs, sizeof(regs)); 194 p += sizeof(regs); 195 } 196 p = NULL; 197 for (i = 0; i < sizeof(brand) - 1; i++) 198 if (brand[i] == 'H' && brand[i + 1] == 'z') 199 p = brand + i; 200 if (p != NULL) { 201 p -= 5; 202 switch (p[4]) { 203 case 'M': 204 i = 1; 205 break; 206 case 'G': 207 i = 1000; 208 break; 209 case 'T': 210 i = 1000000; 211 break; 212 default: 213 return; 214 } 215 #define C2D(c) ((c) - '0') 216 if (p[1] == '.') { 217 freq = C2D(p[0]) * 1000; 218 freq += C2D(p[2]) * 100; 219 freq += C2D(p[3]) * 10; 220 freq *= i * 1000; 221 } else { 222 freq = C2D(p[0]) * 1000; 223 freq += C2D(p[1]) * 100; 224 freq += C2D(p[2]) * 10; 225 freq += C2D(p[3]); 226 freq *= i * 1000000; 227 } 228 #undef C2D 229 tsc_freq = freq; 230 } 231 } 232 } 233 234 static void 235 probe_tsc_freq(void) 236 { 237 u_int regs[4]; 238 uint64_t tsc1, tsc2; 239 240 if (cpu_high >= 6) { 241 do_cpuid(6, regs); 242 if ((regs[2] & CPUID_PERF_STAT) != 0) { 243 /* 244 * XXX Some emulators expose host CPUID without actual 245 * support for these MSRs. We must test whether they 246 * really work. 247 */ 248 wrmsr(MSR_MPERF, 0); 249 wrmsr(MSR_APERF, 0); 250 DELAY(10); 251 if (rdmsr(MSR_MPERF) > 0 && rdmsr(MSR_APERF) > 0) 252 tsc_perf_stat = 1; 253 } 254 } 255 256 if (tsc_freq_vmware()) 257 return; 258 259 switch (cpu_vendor_id) { 260 case CPU_VENDOR_AMD: 261 if ((amd_pminfo & AMDPM_TSC_INVARIANT) != 0 || 262 (vm_guest == VM_GUEST_NO && 263 CPUID_TO_FAMILY(cpu_id) >= 0x10)) 264 tsc_is_invariant = 1; 265 break; 266 case CPU_VENDOR_INTEL: 267 if ((amd_pminfo & AMDPM_TSC_INVARIANT) != 0 || 268 (vm_guest == VM_GUEST_NO && 269 ((CPUID_TO_FAMILY(cpu_id) == 0x6 && 270 CPUID_TO_MODEL(cpu_id) >= 0xe) || 271 (CPUID_TO_FAMILY(cpu_id) == 0xf && 272 CPUID_TO_MODEL(cpu_id) >= 0x3)))) 273 tsc_is_invariant = 1; 274 break; 275 case CPU_VENDOR_CENTAUR: 276 if (vm_guest == VM_GUEST_NO && 277 CPUID_TO_FAMILY(cpu_id) == 0x6 && 278 CPUID_TO_MODEL(cpu_id) >= 0xf && 279 (rdmsr(0x1203) & 0x100000000ULL) == 0) 280 tsc_is_invariant = 1; 281 break; 282 } 283 284 if (tsc_skip_calibration) { 285 if (cpu_vendor_id == CPU_VENDOR_INTEL) 286 tsc_freq_intel(); 287 return; 288 } 289 290 if (bootverbose) 291 printf("Calibrating TSC clock ... "); 292 tsc1 = rdtsc(); 293 DELAY(1000000); 294 tsc2 = rdtsc(); 295 tsc_freq = tsc2 - tsc1; 296 if (bootverbose) 297 printf("TSC clock: %ju Hz\n", (intmax_t)tsc_freq); 298 } 299 300 void 301 init_TSC(void) 302 { 303 304 if ((cpu_feature & CPUID_TSC) == 0 || tsc_disabled) 305 return; 306 307 probe_tsc_freq(); 308 309 /* 310 * Inform CPU accounting about our boot-time clock rate. This will 311 * be updated if someone loads a cpufreq driver after boot that 312 * discovers a new max frequency. 313 */ 314 if (tsc_freq != 0) 315 set_cputicker(rdtsc, tsc_freq, !tsc_is_invariant); 316 317 if (tsc_is_invariant) 318 return; 319 320 /* Register to find out about changes in CPU frequency. */ 321 tsc_pre_tag = EVENTHANDLER_REGISTER(cpufreq_pre_change, 322 tsc_freq_changing, NULL, EVENTHANDLER_PRI_FIRST); 323 tsc_post_tag = EVENTHANDLER_REGISTER(cpufreq_post_change, 324 tsc_freq_changed, NULL, EVENTHANDLER_PRI_FIRST); 325 tsc_levels_tag = EVENTHANDLER_REGISTER(cpufreq_levels_changed, 326 tsc_levels_changed, NULL, EVENTHANDLER_PRI_ANY); 327 } 328 329 void 330 init_TSC_tc(void) 331 { 332 333 if ((cpu_feature & CPUID_TSC) == 0 || tsc_disabled) 334 return; 335 336 /* 337 * We can not use the TSC if we support APM. Precise timekeeping 338 * on an APM'ed machine is at best a fools pursuit, since 339 * any and all of the time spent in various SMM code can't 340 * be reliably accounted for. Reading the RTC is your only 341 * source of reliable time info. The i8254 loses too, of course, 342 * but we need to have some kind of time... 343 * We don't know at this point whether APM is going to be used 344 * or not, nor when it might be activated. Play it safe. 345 */ 346 if (power_pm_get_type() == POWER_PM_TYPE_APM) { 347 tsc_timecounter.tc_quality = -1000; 348 if (bootverbose) 349 printf("TSC timecounter disabled: APM enabled.\n"); 350 } 351 352 #ifdef SMP 353 /* 354 * We can not use the TSC in SMP mode unless the TSCs on all CPUs 355 * are somehow synchronized. Some hardware configurations do 356 * this, but we have no way of determining whether this is the 357 * case, so we do not use the TSC in multi-processor systems 358 * unless the user indicated (by setting kern.timecounter.smp_tsc 359 * to 1) that he believes that his TSCs are synchronized. 360 */ 361 if (mp_ncpus > 1 && !smp_tsc) 362 tsc_timecounter.tc_quality = -100; 363 #endif 364 365 if (tsc_freq != 0) { 366 tsc_timecounter.tc_frequency = tsc_freq; 367 tc_init(&tsc_timecounter); 368 } 369 } 370 371 /* 372 * When cpufreq levels change, find out about the (new) max frequency. We 373 * use this to update CPU accounting in case it got a lower estimate at boot. 374 */ 375 static void 376 tsc_levels_changed(void *arg, int unit) 377 { 378 device_t cf_dev; 379 struct cf_level *levels; 380 int count, error; 381 uint64_t max_freq; 382 383 /* Only use values from the first CPU, assuming all are equal. */ 384 if (unit != 0) 385 return; 386 387 /* Find the appropriate cpufreq device instance. */ 388 cf_dev = devclass_get_device(devclass_find("cpufreq"), unit); 389 if (cf_dev == NULL) { 390 printf("tsc_levels_changed() called but no cpufreq device?\n"); 391 return; 392 } 393 394 /* Get settings from the device and find the max frequency. */ 395 count = 64; 396 levels = malloc(count * sizeof(*levels), M_TEMP, M_NOWAIT); 397 if (levels == NULL) 398 return; 399 error = CPUFREQ_LEVELS(cf_dev, levels, &count); 400 if (error == 0 && count != 0) { 401 max_freq = (uint64_t)levels[0].total_set.freq * 1000000; 402 set_cputicker(rdtsc, max_freq, 1); 403 } else 404 printf("tsc_levels_changed: no max freq found\n"); 405 free(levels, M_TEMP); 406 } 407 408 /* 409 * If the TSC timecounter is in use, veto the pending change. It may be 410 * possible in the future to handle a dynamically-changing timecounter rate. 411 */ 412 static void 413 tsc_freq_changing(void *arg, const struct cf_level *level, int *status) 414 { 415 416 if (*status != 0 || timecounter != &tsc_timecounter) 417 return; 418 419 printf("timecounter TSC must not be in use when " 420 "changing frequencies; change denied\n"); 421 *status = EBUSY; 422 } 423 424 /* Update TSC freq with the value indicated by the caller. */ 425 static void 426 tsc_freq_changed(void *arg, const struct cf_level *level, int status) 427 { 428 uint64_t freq; 429 430 /* If there was an error during the transition, don't do anything. */ 431 if (tsc_disabled || status != 0) 432 return; 433 434 /* Total setting for this level gives the new frequency in MHz. */ 435 freq = (uint64_t)level->total_set.freq * 1000000; 436 atomic_store_rel_64(&tsc_freq, freq); 437 atomic_store_rel_64(&tsc_timecounter.tc_frequency, freq); 438 } 439 440 static int 441 sysctl_machdep_tsc_freq(SYSCTL_HANDLER_ARGS) 442 { 443 int error; 444 uint64_t freq; 445 446 freq = atomic_load_acq_64(&tsc_freq); 447 if (freq == 0) 448 return (EOPNOTSUPP); 449 error = sysctl_handle_64(oidp, &freq, 0, req); 450 if (error == 0 && req->newptr != NULL) { 451 atomic_store_rel_64(&tsc_freq, freq); 452 atomic_store_rel_64(&tsc_timecounter.tc_frequency, freq); 453 } 454 return (error); 455 } 456 457 SYSCTL_PROC(_machdep, OID_AUTO, tsc_freq, CTLTYPE_U64 | CTLFLAG_RW, 458 0, 0, sysctl_machdep_tsc_freq, "QU", "Time Stamp Counter frequency"); 459 460 static u_int 461 tsc_get_timecount(struct timecounter *tc) 462 { 463 464 return (rdtsc32()); 465 } 466