1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 1990 The Regents of the University of California. 5 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org> 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz and Don Ahn. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 36 */ 37 38 #include <sys/cdefs.h> 39 __FBSDID("$FreeBSD$"); 40 41 /* 42 * Routines to handle clock hardware. 43 */ 44 45 #include "opt_clock.h" 46 #include "opt_isa.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/bus.h> 51 #include <sys/lock.h> 52 #include <sys/kdb.h> 53 #include <sys/mutex.h> 54 #include <sys/proc.h> 55 #include <sys/kernel.h> 56 #include <sys/module.h> 57 #include <sys/rman.h> 58 #include <sys/sched.h> 59 #include <sys/smp.h> 60 #include <sys/sysctl.h> 61 #include <sys/timeet.h> 62 #include <sys/timetc.h> 63 64 #include <machine/clock.h> 65 #include <machine/cpu.h> 66 #include <machine/intr_machdep.h> 67 #include <machine/ppireg.h> 68 #include <machine/timerreg.h> 69 #include <x86/apicvar.h> 70 #include <x86/init.h> 71 72 #include <isa/rtc.h> 73 #ifdef DEV_ISA 74 #include <isa/isareg.h> 75 #include <isa/isavar.h> 76 #endif 77 78 int clkintr_pending; 79 #ifndef TIMER_FREQ 80 #define TIMER_FREQ 1193182 81 #endif 82 u_int i8254_freq = TIMER_FREQ; 83 TUNABLE_INT("hw.i8254.freq", &i8254_freq); 84 int i8254_max_count; 85 static int i8254_timecounter = 1; 86 87 static struct mtx clock_lock; 88 static struct intsrc *i8254_intsrc; 89 static uint16_t i8254_lastcount; 90 static uint16_t i8254_offset; 91 static int (*i8254_pending)(struct intsrc *); 92 static int i8254_ticked; 93 94 struct attimer_softc { 95 int intr_en; 96 int port_rid, intr_rid; 97 struct resource *port_res; 98 struct resource *intr_res; 99 void *intr_handler; 100 struct timecounter tc; 101 struct eventtimer et; 102 int mode; 103 #define MODE_STOP 0 104 #define MODE_PERIODIC 1 105 #define MODE_ONESHOT 2 106 uint32_t period; 107 }; 108 static struct attimer_softc *attimer_sc = NULL; 109 110 static int timer0_period = -2; 111 static int timer0_mode = 0xffff; 112 static int timer0_last = 0xffff; 113 114 /* Values for timerX_state: */ 115 #define RELEASED 0 116 #define RELEASE_PENDING 1 117 #define ACQUIRED 2 118 #define ACQUIRE_PENDING 3 119 120 static u_char timer2_state; 121 122 static unsigned i8254_get_timecount(struct timecounter *tc); 123 static void set_i8254_freq(int mode, uint32_t period); 124 125 void 126 clock_init(void) 127 { 128 /* Init the clock lock */ 129 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE); 130 /* Init the clock in order to use DELAY */ 131 init_ops.early_clock_source_init(); 132 tsc_init(); 133 } 134 135 static int 136 clkintr(void *arg) 137 { 138 struct attimer_softc *sc = (struct attimer_softc *)arg; 139 140 if (i8254_timecounter && sc->period != 0) { 141 mtx_lock_spin(&clock_lock); 142 if (i8254_ticked) 143 i8254_ticked = 0; 144 else { 145 i8254_offset += i8254_max_count; 146 i8254_lastcount = 0; 147 } 148 clkintr_pending = 0; 149 mtx_unlock_spin(&clock_lock); 150 } 151 152 if (sc->et.et_active && sc->mode != MODE_STOP) 153 sc->et.et_event_cb(&sc->et, sc->et.et_arg); 154 155 return (FILTER_HANDLED); 156 } 157 158 int 159 timer_spkr_acquire(void) 160 { 161 int mode; 162 163 mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT; 164 165 if (timer2_state != RELEASED) 166 return (-1); 167 timer2_state = ACQUIRED; 168 169 /* 170 * This access to the timer registers is as atomic as possible 171 * because it is a single instruction. We could do better if we 172 * knew the rate. Use of splclock() limits glitches to 10-100us, 173 * and this is probably good enough for timer2, so we aren't as 174 * careful with it as with timer0. 175 */ 176 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f)); 177 178 ppi_spkr_on(); /* enable counter2 output to speaker */ 179 return (0); 180 } 181 182 int 183 timer_spkr_release(void) 184 { 185 186 if (timer2_state != ACQUIRED) 187 return (-1); 188 timer2_state = RELEASED; 189 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT); 190 191 ppi_spkr_off(); /* disable counter2 output to speaker */ 192 return (0); 193 } 194 195 void 196 timer_spkr_setfreq(int freq) 197 { 198 199 freq = i8254_freq / freq; 200 mtx_lock_spin(&clock_lock); 201 outb(TIMER_CNTR2, freq & 0xff); 202 outb(TIMER_CNTR2, freq >> 8); 203 mtx_unlock_spin(&clock_lock); 204 } 205 206 static int 207 getit(void) 208 { 209 int high, low; 210 211 mtx_lock_spin(&clock_lock); 212 213 /* Select timer0 and latch counter value. */ 214 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 215 216 low = inb(TIMER_CNTR0); 217 high = inb(TIMER_CNTR0); 218 219 mtx_unlock_spin(&clock_lock); 220 return ((high << 8) | low); 221 } 222 223 /* 224 * Wait "n" microseconds. 225 * Relies on timer 1 counting down from (i8254_freq / hz) 226 * Note: timer had better have been programmed before this is first used! 227 */ 228 void 229 i8254_delay(int n) 230 { 231 int delta, prev_tick, tick, ticks_left; 232 #ifdef DELAYDEBUG 233 int getit_calls = 1; 234 int n1; 235 static int state = 0; 236 237 if (state == 0) { 238 state = 1; 239 for (n1 = 1; n1 <= 10000000; n1 *= 10) 240 DELAY(n1); 241 state = 2; 242 } 243 if (state == 1) 244 printf("DELAY(%d)...", n); 245 #endif 246 /* 247 * Read the counter first, so that the rest of the setup overhead is 248 * counted. Guess the initial overhead is 20 usec (on most systems it 249 * takes about 1.5 usec for each of the i/o's in getit(). The loop 250 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The 251 * multiplications and divisions to scale the count take a while). 252 * 253 * However, if ddb is active then use a fake counter since reading 254 * the i8254 counter involves acquiring a lock. ddb must not do 255 * locking for many reasons, but it calls here for at least atkbd 256 * input. 257 */ 258 #ifdef KDB 259 if (kdb_active) 260 prev_tick = 1; 261 else 262 #endif 263 prev_tick = getit(); 264 n -= 0; /* XXX actually guess no initial overhead */ 265 /* 266 * Calculate (n * (i8254_freq / 1e6)) without using floating point 267 * and without any avoidable overflows. 268 */ 269 if (n <= 0) 270 ticks_left = 0; 271 else if (n < 256) 272 /* 273 * Use fixed point to avoid a slow division by 1000000. 274 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest. 275 * 2^15 is the first power of 2 that gives exact results 276 * for n between 0 and 256. 277 */ 278 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15; 279 else 280 /* 281 * Don't bother using fixed point, although gcc-2.7.2 282 * generates particularly poor code for the long long 283 * division, since even the slow way will complete long 284 * before the delay is up (unless we're interrupted). 285 */ 286 ticks_left = ((u_int)n * (long long)i8254_freq + 999999) 287 / 1000000; 288 289 while (ticks_left > 0) { 290 #ifdef KDB 291 if (kdb_active) { 292 inb(0x84); 293 tick = prev_tick - 1; 294 if (tick <= 0) 295 tick = i8254_max_count; 296 } else 297 #endif 298 tick = getit(); 299 #ifdef DELAYDEBUG 300 ++getit_calls; 301 #endif 302 delta = prev_tick - tick; 303 prev_tick = tick; 304 if (delta < 0) { 305 delta += i8254_max_count; 306 /* 307 * Guard against i8254_max_count being wrong. 308 * This shouldn't happen in normal operation, 309 * but it may happen if set_i8254_freq() is 310 * traced. 311 */ 312 if (delta < 0) 313 delta = 0; 314 } 315 ticks_left -= delta; 316 } 317 #ifdef DELAYDEBUG 318 if (state == 1) 319 printf(" %d calls to getit() at %d usec each\n", 320 getit_calls, (n + 5) / getit_calls); 321 #endif 322 } 323 324 static void 325 set_i8254_freq(int mode, uint32_t period) 326 { 327 int new_count, new_mode; 328 329 mtx_lock_spin(&clock_lock); 330 if (mode == MODE_STOP) { 331 if (i8254_timecounter) { 332 mode = MODE_PERIODIC; 333 new_count = 0x10000; 334 } else 335 new_count = -1; 336 } else { 337 new_count = min(((uint64_t)i8254_freq * period + 338 0x80000000LLU) >> 32, 0x10000); 339 } 340 if (new_count == timer0_period) 341 goto out; 342 i8254_max_count = ((new_count & ~0xffff) != 0) ? 0xffff : new_count; 343 timer0_period = (mode == MODE_PERIODIC) ? new_count : -1; 344 switch (mode) { 345 case MODE_STOP: 346 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT; 347 outb(TIMER_MODE, new_mode); 348 outb(TIMER_CNTR0, 0); 349 outb(TIMER_CNTR0, 0); 350 break; 351 case MODE_PERIODIC: 352 new_mode = TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT; 353 outb(TIMER_MODE, new_mode); 354 outb(TIMER_CNTR0, new_count & 0xff); 355 outb(TIMER_CNTR0, new_count >> 8); 356 break; 357 case MODE_ONESHOT: 358 if (new_count < 256 && timer0_last < 256) { 359 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_LSB; 360 if (new_mode != timer0_mode) 361 outb(TIMER_MODE, new_mode); 362 outb(TIMER_CNTR0, new_count & 0xff); 363 break; 364 } 365 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT; 366 if (new_mode != timer0_mode) 367 outb(TIMER_MODE, new_mode); 368 outb(TIMER_CNTR0, new_count & 0xff); 369 outb(TIMER_CNTR0, new_count >> 8); 370 break; 371 default: 372 panic("set_i8254_freq: unknown operational mode"); 373 } 374 timer0_mode = new_mode; 375 timer0_last = new_count; 376 out: 377 mtx_unlock_spin(&clock_lock); 378 } 379 380 static void 381 i8254_restore(void) 382 { 383 384 timer0_period = -2; 385 timer0_mode = 0xffff; 386 timer0_last = 0xffff; 387 if (attimer_sc != NULL) 388 set_i8254_freq(attimer_sc->mode, attimer_sc->period); 389 else 390 set_i8254_freq(MODE_STOP, 0); 391 } 392 393 /* This is separate from startrtclock() so that it can be called early. */ 394 void 395 i8254_init(void) 396 { 397 398 set_i8254_freq(MODE_STOP, 0); 399 } 400 401 void 402 startrtclock(void) 403 { 404 405 start_TSC(); 406 } 407 408 void 409 cpu_initclocks(void) 410 { 411 #ifdef EARLY_AP_STARTUP 412 struct thread *td; 413 int i; 414 415 td = curthread; 416 417 tsc_calibrate(); 418 lapic_calibrate_timer(); 419 cpu_initclocks_bsp(); 420 CPU_FOREACH(i) { 421 if (i == 0) 422 continue; 423 thread_lock(td); 424 sched_bind(td, i); 425 thread_unlock(td); 426 cpu_initclocks_ap(); 427 } 428 thread_lock(td); 429 if (sched_is_bound(td)) 430 sched_unbind(td); 431 thread_unlock(td); 432 #else 433 tsc_calibrate(); 434 lapic_calibrate_timer(); 435 cpu_initclocks_bsp(); 436 #endif 437 } 438 439 static int 440 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS) 441 { 442 int error; 443 u_int freq; 444 445 /* 446 * Use `i8254' instead of `timer' in external names because `timer' 447 * is too generic. Should use it everywhere. 448 */ 449 freq = i8254_freq; 450 error = sysctl_handle_int(oidp, &freq, 0, req); 451 if (error == 0 && req->newptr != NULL) { 452 i8254_freq = freq; 453 if (attimer_sc != NULL) { 454 set_i8254_freq(attimer_sc->mode, attimer_sc->period); 455 attimer_sc->tc.tc_frequency = freq; 456 } else { 457 set_i8254_freq(MODE_STOP, 0); 458 } 459 } 460 return (error); 461 } 462 463 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, 464 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, 465 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", 466 "i8254 timer frequency"); 467 468 static unsigned 469 i8254_get_timecount(struct timecounter *tc) 470 { 471 device_t dev = (device_t)tc->tc_priv; 472 struct attimer_softc *sc = device_get_softc(dev); 473 register_t flags; 474 uint16_t count; 475 u_int high, low; 476 477 if (sc->period == 0) 478 return (i8254_max_count - getit()); 479 480 #ifdef __amd64__ 481 flags = read_rflags(); 482 #else 483 flags = read_eflags(); 484 #endif 485 mtx_lock_spin(&clock_lock); 486 487 /* Select timer0 and latch counter value. */ 488 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 489 490 low = inb(TIMER_CNTR0); 491 high = inb(TIMER_CNTR0); 492 count = i8254_max_count - ((high << 8) | low); 493 if (count < i8254_lastcount || 494 (!i8254_ticked && (clkintr_pending || 495 ((count < 20 || (!(flags & PSL_I) && 496 count < i8254_max_count / 2u)) && 497 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) { 498 i8254_ticked = 1; 499 i8254_offset += i8254_max_count; 500 } 501 i8254_lastcount = count; 502 count += i8254_offset; 503 mtx_unlock_spin(&clock_lock); 504 return (count); 505 } 506 507 static int 508 attimer_start(struct eventtimer *et, sbintime_t first, sbintime_t period) 509 { 510 device_t dev = (device_t)et->et_priv; 511 struct attimer_softc *sc = device_get_softc(dev); 512 513 if (period != 0) { 514 sc->mode = MODE_PERIODIC; 515 sc->period = period; 516 } else { 517 sc->mode = MODE_ONESHOT; 518 sc->period = first; 519 } 520 if (!sc->intr_en) { 521 i8254_intsrc->is_pic->pic_enable_source(i8254_intsrc); 522 sc->intr_en = 1; 523 } 524 set_i8254_freq(sc->mode, sc->period); 525 return (0); 526 } 527 528 static int 529 attimer_stop(struct eventtimer *et) 530 { 531 device_t dev = (device_t)et->et_priv; 532 struct attimer_softc *sc = device_get_softc(dev); 533 534 sc->mode = MODE_STOP; 535 sc->period = 0; 536 set_i8254_freq(sc->mode, sc->period); 537 return (0); 538 } 539 540 #ifdef DEV_ISA 541 /* 542 * Attach to the ISA PnP descriptors for the timer 543 */ 544 static struct isa_pnp_id attimer_ids[] = { 545 { 0x0001d041 /* PNP0100 */, "AT timer" }, 546 { 0 } 547 }; 548 549 static int 550 attimer_probe(device_t dev) 551 { 552 int result; 553 554 result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids); 555 /* ENOENT means no PnP-ID, device is hinted. */ 556 if (result == ENOENT) { 557 device_set_desc(dev, "AT timer"); 558 return (BUS_PROBE_LOW_PRIORITY); 559 } 560 return (result); 561 } 562 563 static int 564 attimer_attach(device_t dev) 565 { 566 struct attimer_softc *sc; 567 rman_res_t s; 568 int i; 569 570 attimer_sc = sc = device_get_softc(dev); 571 bzero(sc, sizeof(struct attimer_softc)); 572 if (!(sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, 573 &sc->port_rid, IO_TIMER1, IO_TIMER1 + 3, 4, RF_ACTIVE))) 574 device_printf(dev,"Warning: Couldn't map I/O.\n"); 575 i8254_intsrc = intr_lookup_source(0); 576 if (i8254_intsrc != NULL) 577 i8254_pending = i8254_intsrc->is_pic->pic_source_pending; 578 resource_int_value(device_get_name(dev), device_get_unit(dev), 579 "timecounter", &i8254_timecounter); 580 set_i8254_freq(MODE_STOP, 0); 581 if (i8254_timecounter) { 582 sc->tc.tc_get_timecount = i8254_get_timecount; 583 sc->tc.tc_counter_mask = 0xffff; 584 sc->tc.tc_frequency = i8254_freq; 585 sc->tc.tc_name = "i8254"; 586 sc->tc.tc_quality = 0; 587 sc->tc.tc_priv = dev; 588 tc_init(&sc->tc); 589 } 590 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 591 "clock", &i) != 0 || i != 0) { 592 sc->intr_rid = 0; 593 while (bus_get_resource(dev, SYS_RES_IRQ, sc->intr_rid, 594 &s, NULL) == 0 && s != 0) 595 sc->intr_rid++; 596 if (!(sc->intr_res = bus_alloc_resource(dev, SYS_RES_IRQ, 597 &sc->intr_rid, 0, 0, 1, RF_ACTIVE))) { 598 device_printf(dev,"Can't map interrupt.\n"); 599 return (0); 600 } 601 /* Dirty hack, to make bus_setup_intr to not enable source. */ 602 i8254_intsrc->is_handlers++; 603 if ((bus_setup_intr(dev, sc->intr_res, 604 INTR_MPSAFE | INTR_TYPE_CLK, 605 (driver_filter_t *)clkintr, NULL, 606 sc, &sc->intr_handler))) { 607 device_printf(dev, "Can't setup interrupt.\n"); 608 i8254_intsrc->is_handlers--; 609 return (0); 610 } 611 i8254_intsrc->is_handlers--; 612 i8254_intsrc->is_pic->pic_enable_intr(i8254_intsrc); 613 sc->et.et_name = "i8254"; 614 sc->et.et_flags = ET_FLAGS_PERIODIC; 615 if (!i8254_timecounter) 616 sc->et.et_flags |= ET_FLAGS_ONESHOT; 617 sc->et.et_quality = 100; 618 sc->et.et_frequency = i8254_freq; 619 sc->et.et_min_period = (0x0002LLU << 32) / i8254_freq; 620 sc->et.et_max_period = (0xfffeLLU << 32) / i8254_freq; 621 sc->et.et_start = attimer_start; 622 sc->et.et_stop = attimer_stop; 623 sc->et.et_priv = dev; 624 et_register(&sc->et); 625 } 626 return(0); 627 } 628 629 static int 630 attimer_resume(device_t dev) 631 { 632 633 i8254_restore(); 634 return (0); 635 } 636 637 static device_method_t attimer_methods[] = { 638 /* Device interface */ 639 DEVMETHOD(device_probe, attimer_probe), 640 DEVMETHOD(device_attach, attimer_attach), 641 DEVMETHOD(device_detach, bus_generic_detach), 642 DEVMETHOD(device_shutdown, bus_generic_shutdown), 643 DEVMETHOD(device_suspend, bus_generic_suspend), 644 DEVMETHOD(device_resume, attimer_resume), 645 { 0, 0 } 646 }; 647 648 static driver_t attimer_driver = { 649 "attimer", 650 attimer_methods, 651 sizeof(struct attimer_softc), 652 }; 653 654 static devclass_t attimer_devclass; 655 656 DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0); 657 DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0); 658 ISA_PNP_INFO(attimer_ids); 659 660 #endif /* DEV_ISA */ 661