1 /*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * All rights reserved. 4 * 5 * This code is derived from software contributed to Berkeley by 6 * William Jolitz and Don Ahn. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 4. Neither the name of the University nor the names of its contributors 17 * may be used to endorse or promote products derived from this software 18 * without specific prior written permission. 19 * 20 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 21 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 22 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 23 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 24 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 25 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 26 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 27 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 28 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 29 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 30 * SUCH DAMAGE. 31 * 32 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 33 */ 34 35 #include <sys/cdefs.h> 36 __FBSDID("$FreeBSD$"); 37 38 /* 39 * Routines to handle clock hardware. 40 */ 41 42 #ifndef __amd64__ 43 #include "opt_apic.h" 44 #endif 45 #include "opt_clock.h" 46 #include "opt_kdtrace.h" 47 #include "opt_isa.h" 48 #include "opt_mca.h" 49 50 #include <sys/param.h> 51 #include <sys/systm.h> 52 #include <sys/bus.h> 53 #include <sys/lock.h> 54 #include <sys/kdb.h> 55 #include <sys/mutex.h> 56 #include <sys/proc.h> 57 #include <sys/timetc.h> 58 #include <sys/kernel.h> 59 #include <sys/module.h> 60 #include <sys/sched.h> 61 #include <sys/smp.h> 62 #include <sys/sysctl.h> 63 64 #include <machine/clock.h> 65 #include <machine/cpu.h> 66 #include <machine/intr_machdep.h> 67 #include <machine/md_var.h> 68 #include <machine/apicvar.h> 69 #include <machine/ppireg.h> 70 #include <machine/timerreg.h> 71 #include <machine/smp.h> 72 73 #include <isa/rtc.h> 74 #ifdef DEV_ISA 75 #include <isa/isareg.h> 76 #include <isa/isavar.h> 77 #endif 78 79 #ifdef DEV_MCA 80 #include <i386/bios/mca_machdep.h> 81 #endif 82 83 #ifdef KDTRACE_HOOKS 84 #include <sys/dtrace_bsd.h> 85 #endif 86 87 #define TIMER_DIV(x) ((i8254_freq + (x) / 2) / (x)) 88 89 int clkintr_pending; 90 #ifndef TIMER_FREQ 91 #define TIMER_FREQ 1193182 92 #endif 93 u_int i8254_freq = TIMER_FREQ; 94 TUNABLE_INT("hw.i8254.freq", &i8254_freq); 95 int i8254_max_count; 96 static int i8254_real_max_count; 97 98 static int lapic_allclocks = 1; 99 TUNABLE_INT("machdep.lapic_allclocks", &lapic_allclocks); 100 101 struct mtx clock_lock; 102 static struct intsrc *i8254_intsrc; 103 static u_int32_t i8254_lastcount; 104 static u_int32_t i8254_offset; 105 static int (*i8254_pending)(struct intsrc *); 106 static int i8254_ticked; 107 static int using_atrtc_timer; 108 static enum lapic_clock using_lapic_timer = LAPIC_CLOCK_NONE; 109 110 /* Values for timerX_state: */ 111 #define RELEASED 0 112 #define RELEASE_PENDING 1 113 #define ACQUIRED 2 114 #define ACQUIRE_PENDING 3 115 116 static u_char timer2_state; 117 118 static unsigned i8254_get_timecount(struct timecounter *tc); 119 static unsigned i8254_simple_get_timecount(struct timecounter *tc); 120 static void set_i8254_freq(u_int freq, int intr_freq); 121 122 static struct timecounter i8254_timecounter = { 123 i8254_get_timecount, /* get_timecount */ 124 0, /* no poll_pps */ 125 ~0u, /* counter_mask */ 126 0, /* frequency */ 127 "i8254", /* name */ 128 0 /* quality */ 129 }; 130 131 int 132 hardclockintr(struct trapframe *frame) 133 { 134 135 timer1clock(TRAPF_USERMODE(frame), TRAPF_PC(frame)); 136 return (FILTER_HANDLED); 137 } 138 139 int 140 statclockintr(struct trapframe *frame) 141 { 142 143 timer2clock(TRAPF_USERMODE(frame), TRAPF_PC(frame)); 144 return (FILTER_HANDLED); 145 } 146 147 static int 148 clkintr(struct trapframe *frame) 149 { 150 151 if (timecounter->tc_get_timecount == i8254_get_timecount) { 152 mtx_lock_spin(&clock_lock); 153 if (i8254_ticked) 154 i8254_ticked = 0; 155 else { 156 i8254_offset += i8254_max_count; 157 i8254_lastcount = 0; 158 } 159 clkintr_pending = 0; 160 mtx_unlock_spin(&clock_lock); 161 } 162 KASSERT(using_lapic_timer == LAPIC_CLOCK_NONE, 163 ("clk interrupt enabled with lapic timer")); 164 165 #ifdef KDTRACE_HOOKS 166 /* 167 * If the DTrace hooks are configured and a callback function 168 * has been registered, then call it to process the high speed 169 * timers. 170 */ 171 int cpu = PCPU_GET(cpuid); 172 if (cyclic_clock_func[cpu] != NULL) 173 (*cyclic_clock_func[cpu])(frame); 174 #endif 175 176 #ifdef SMP 177 if (smp_started) 178 ipi_all_but_self(IPI_HARDCLOCK); 179 #endif 180 hardclockintr(frame); 181 182 #ifdef DEV_MCA 183 /* Reset clock interrupt by asserting bit 7 of port 0x61 */ 184 if (MCA_system) 185 outb(0x61, inb(0x61) | 0x80); 186 #endif 187 return (FILTER_HANDLED); 188 } 189 190 int 191 timer_spkr_acquire(void) 192 { 193 int mode; 194 195 mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT; 196 197 if (timer2_state != RELEASED) 198 return (-1); 199 timer2_state = ACQUIRED; 200 201 /* 202 * This access to the timer registers is as atomic as possible 203 * because it is a single instruction. We could do better if we 204 * knew the rate. Use of splclock() limits glitches to 10-100us, 205 * and this is probably good enough for timer2, so we aren't as 206 * careful with it as with timer0. 207 */ 208 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f)); 209 ppi_spkr_on(); /* enable counter2 output to speaker */ 210 return (0); 211 } 212 213 int 214 timer_spkr_release(void) 215 { 216 217 if (timer2_state != ACQUIRED) 218 return (-1); 219 timer2_state = RELEASED; 220 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT); 221 ppi_spkr_off(); /* disable counter2 output to speaker */ 222 return (0); 223 } 224 225 void 226 timer_spkr_setfreq(int freq) 227 { 228 229 freq = i8254_freq / freq; 230 mtx_lock_spin(&clock_lock); 231 outb(TIMER_CNTR2, freq & 0xff); 232 outb(TIMER_CNTR2, freq >> 8); 233 mtx_unlock_spin(&clock_lock); 234 } 235 236 /* 237 * This routine receives statistical clock interrupts from the RTC. 238 * As explained above, these occur at 128 interrupts per second. 239 * When profiling, we receive interrupts at a rate of 1024 Hz. 240 * 241 * This does not actually add as much overhead as it sounds, because 242 * when the statistical clock is active, the hardclock driver no longer 243 * needs to keep (inaccurate) statistics on its own. This decouples 244 * statistics gathering from scheduling interrupts. 245 * 246 * The RTC chip requires that we read status register C (RTC_INTR) 247 * to acknowledge an interrupt, before it will generate the next one. 248 * Under high interrupt load, rtcintr() can be indefinitely delayed and 249 * the clock can tick immediately after the read from RTC_INTR. In this 250 * case, the mc146818A interrupt signal will not drop for long enough 251 * to register with the 8259 PIC. If an interrupt is missed, the stat 252 * clock will halt, considerably degrading system performance. This is 253 * why we use 'while' rather than a more straightforward 'if' below. 254 * Stat clock ticks can still be lost, causing minor loss of accuracy 255 * in the statistics, but the stat clock will no longer stop. 256 */ 257 static int 258 rtcintr(struct trapframe *frame) 259 { 260 int flag = 0; 261 262 while (rtcin(RTC_INTR) & RTCIR_PERIOD) { 263 flag = 1; 264 #ifdef SMP 265 if (smp_started) 266 ipi_all_but_self(IPI_STATCLOCK); 267 #endif 268 statclockintr(frame); 269 } 270 return(flag ? FILTER_HANDLED : FILTER_STRAY); 271 } 272 273 static int 274 getit(void) 275 { 276 int high, low; 277 278 mtx_lock_spin(&clock_lock); 279 280 /* Select timer0 and latch counter value. */ 281 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 282 283 low = inb(TIMER_CNTR0); 284 high = inb(TIMER_CNTR0); 285 286 mtx_unlock_spin(&clock_lock); 287 return ((high << 8) | low); 288 } 289 290 /* 291 * Wait "n" microseconds. 292 * Relies on timer 1 counting down from (i8254_freq / hz) 293 * Note: timer had better have been programmed before this is first used! 294 */ 295 void 296 DELAY(int n) 297 { 298 int delta, prev_tick, tick, ticks_left; 299 300 #ifdef DELAYDEBUG 301 int getit_calls = 1; 302 int n1; 303 static int state = 0; 304 #endif 305 306 if (tsc_freq != 0 && !tsc_is_broken) { 307 uint64_t start, end, now; 308 309 sched_pin(); 310 start = rdtsc(); 311 end = start + (tsc_freq * n) / 1000000; 312 do { 313 cpu_spinwait(); 314 now = rdtsc(); 315 } while (now < end || (now > start && end < start)); 316 sched_unpin(); 317 return; 318 } 319 #ifdef DELAYDEBUG 320 if (state == 0) { 321 state = 1; 322 for (n1 = 1; n1 <= 10000000; n1 *= 10) 323 DELAY(n1); 324 state = 2; 325 } 326 if (state == 1) 327 printf("DELAY(%d)...", n); 328 #endif 329 /* 330 * Read the counter first, so that the rest of the setup overhead is 331 * counted. Guess the initial overhead is 20 usec (on most systems it 332 * takes about 1.5 usec for each of the i/o's in getit(). The loop 333 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The 334 * multiplications and divisions to scale the count take a while). 335 * 336 * However, if ddb is active then use a fake counter since reading 337 * the i8254 counter involves acquiring a lock. ddb must not do 338 * locking for many reasons, but it calls here for at least atkbd 339 * input. 340 */ 341 #ifdef KDB 342 if (kdb_active) 343 prev_tick = 1; 344 else 345 #endif 346 prev_tick = getit(); 347 n -= 0; /* XXX actually guess no initial overhead */ 348 /* 349 * Calculate (n * (i8254_freq / 1e6)) without using floating point 350 * and without any avoidable overflows. 351 */ 352 if (n <= 0) 353 ticks_left = 0; 354 else if (n < 256) 355 /* 356 * Use fixed point to avoid a slow division by 1000000. 357 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest. 358 * 2^15 is the first power of 2 that gives exact results 359 * for n between 0 and 256. 360 */ 361 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15; 362 else 363 /* 364 * Don't bother using fixed point, although gcc-2.7.2 365 * generates particularly poor code for the long long 366 * division, since even the slow way will complete long 367 * before the delay is up (unless we're interrupted). 368 */ 369 ticks_left = ((u_int)n * (long long)i8254_freq + 999999) 370 / 1000000; 371 372 while (ticks_left > 0) { 373 #ifdef KDB 374 if (kdb_active) { 375 inb(0x84); 376 tick = prev_tick - 1; 377 if (tick <= 0) 378 tick = i8254_max_count; 379 } else 380 #endif 381 tick = getit(); 382 #ifdef DELAYDEBUG 383 ++getit_calls; 384 #endif 385 delta = prev_tick - tick; 386 prev_tick = tick; 387 if (delta < 0) { 388 delta += i8254_max_count; 389 /* 390 * Guard against i8254_max_count being wrong. 391 * This shouldn't happen in normal operation, 392 * but it may happen if set_i8254_freq() is 393 * traced. 394 */ 395 if (delta < 0) 396 delta = 0; 397 } 398 ticks_left -= delta; 399 } 400 #ifdef DELAYDEBUG 401 if (state == 1) 402 printf(" %d calls to getit() at %d usec each\n", 403 getit_calls, (n + 5) / getit_calls); 404 #endif 405 } 406 407 static void 408 set_i8254_freq(u_int freq, int intr_freq) 409 { 410 int new_i8254_real_max_count; 411 412 i8254_timecounter.tc_frequency = freq; 413 mtx_lock_spin(&clock_lock); 414 i8254_freq = freq; 415 if (using_lapic_timer != LAPIC_CLOCK_NONE) 416 new_i8254_real_max_count = 0x10000; 417 else 418 new_i8254_real_max_count = TIMER_DIV(intr_freq); 419 if (new_i8254_real_max_count != i8254_real_max_count) { 420 i8254_real_max_count = new_i8254_real_max_count; 421 if (i8254_real_max_count == 0x10000) 422 i8254_max_count = 0xffff; 423 else 424 i8254_max_count = i8254_real_max_count; 425 outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); 426 outb(TIMER_CNTR0, i8254_real_max_count & 0xff); 427 outb(TIMER_CNTR0, i8254_real_max_count >> 8); 428 } 429 mtx_unlock_spin(&clock_lock); 430 } 431 432 static void 433 i8254_restore(void) 434 { 435 436 mtx_lock_spin(&clock_lock); 437 outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); 438 outb(TIMER_CNTR0, i8254_real_max_count & 0xff); 439 outb(TIMER_CNTR0, i8254_real_max_count >> 8); 440 mtx_unlock_spin(&clock_lock); 441 } 442 443 #ifndef __amd64__ 444 /* 445 * Restore all the timers non-atomically (XXX: should be atomically). 446 * 447 * This function is called from pmtimer_resume() to restore all the timers. 448 * This should not be necessary, but there are broken laptops that do not 449 * restore all the timers on resume. 450 * As long as pmtimer is not part of amd64 suport, skip this for the amd64 451 * case. 452 */ 453 void 454 timer_restore(void) 455 { 456 457 i8254_restore(); /* restore i8254_freq and hz */ 458 atrtc_restore(); /* reenable RTC interrupts */ 459 } 460 #endif 461 462 /* This is separate from startrtclock() so that it can be called early. */ 463 void 464 i8254_init(void) 465 { 466 467 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE); 468 set_i8254_freq(i8254_freq, hz); 469 } 470 471 void 472 startrtclock() 473 { 474 475 atrtc_start(); 476 477 set_i8254_freq(i8254_freq, hz); 478 tc_init(&i8254_timecounter); 479 480 init_TSC(); 481 } 482 483 /* 484 * Start both clocks running. 485 */ 486 void 487 cpu_initclocks() 488 { 489 #if defined(__amd64__) || defined(DEV_APIC) 490 enum lapic_clock tlsca; 491 #endif 492 int tasc; 493 494 /* Initialize RTC. */ 495 atrtc_start(); 496 tasc = atrtc_setup_clock(); 497 498 /* 499 * If the atrtc successfully initialized and the users didn't force 500 * otherwise use the LAPIC in order to cater hardclock only, otherwise 501 * take in charge all the clock sources. 502 */ 503 #if defined(__amd64__) || defined(DEV_APIC) 504 tlsca = (lapic_allclocks == 0 && tasc != 0) ? LAPIC_CLOCK_HARDCLOCK : 505 LAPIC_CLOCK_ALL; 506 using_lapic_timer = lapic_setup_clock(tlsca); 507 #endif 508 /* 509 * If we aren't using the local APIC timer to drive the kernel 510 * clocks, setup the interrupt handler for the 8254 timer 0 so 511 * that it can drive hardclock(). Otherwise, change the 8254 512 * timecounter to user a simpler algorithm. 513 */ 514 if (using_lapic_timer == LAPIC_CLOCK_NONE) { 515 timer1hz = hz; 516 intr_add_handler("clk", 0, (driver_filter_t *)clkintr, NULL, 517 NULL, INTR_TYPE_CLK, NULL); 518 i8254_intsrc = intr_lookup_source(0); 519 if (i8254_intsrc != NULL) 520 i8254_pending = 521 i8254_intsrc->is_pic->pic_source_pending; 522 } else { 523 i8254_timecounter.tc_get_timecount = 524 i8254_simple_get_timecount; 525 i8254_timecounter.tc_counter_mask = 0xffff; 526 set_i8254_freq(i8254_freq, hz); 527 } 528 529 /* 530 * If the separate statistics clock hasn't been explicility disabled 531 * and we aren't already using the local APIC timer to drive the 532 * kernel clocks, then setup the RTC to periodically interrupt to 533 * drive statclock() and profclock(). 534 */ 535 if (using_lapic_timer != LAPIC_CLOCK_ALL) { 536 using_atrtc_timer = tasc; 537 if (using_atrtc_timer) { 538 timer2hz = RTC_NOPROFRATE; 539 /* Enable periodic interrupts from the RTC. */ 540 intr_add_handler("rtc", 8, 541 (driver_filter_t *)rtcintr, NULL, NULL, 542 INTR_TYPE_CLK, NULL); 543 atrtc_enable_intr(); 544 } else { 545 profhz = hz; 546 if (hz < 128) 547 stathz = hz; 548 else 549 stathz = hz / (hz / 128); 550 timer2hz = 0; 551 } 552 } 553 554 init_TSC_tc(); 555 } 556 557 void 558 cpu_startprofclock(void) 559 { 560 561 if (using_lapic_timer == LAPIC_CLOCK_ALL || !using_atrtc_timer) 562 return; 563 atrtc_rate(RTCSA_PROF); 564 timer2hz = RTC_PROFRATE; 565 } 566 567 void 568 cpu_stopprofclock(void) 569 { 570 571 if (using_lapic_timer == LAPIC_CLOCK_ALL || !using_atrtc_timer) 572 return; 573 atrtc_rate(RTCSA_NOPROF); 574 timer2hz = RTC_NOPROFRATE; 575 } 576 577 static int 578 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS) 579 { 580 int error; 581 u_int freq; 582 583 /* 584 * Use `i8254' instead of `timer' in external names because `timer' 585 * is is too generic. Should use it everywhere. 586 */ 587 freq = i8254_freq; 588 error = sysctl_handle_int(oidp, &freq, 0, req); 589 if (error == 0 && req->newptr != NULL) 590 set_i8254_freq(freq, hz); 591 return (error); 592 } 593 594 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW, 595 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", ""); 596 597 static unsigned 598 i8254_simple_get_timecount(struct timecounter *tc) 599 { 600 601 return (i8254_max_count - getit()); 602 } 603 604 static unsigned 605 i8254_get_timecount(struct timecounter *tc) 606 { 607 register_t flags; 608 u_int count; 609 u_int high, low; 610 611 #ifdef __amd64__ 612 flags = read_rflags(); 613 #else 614 flags = read_eflags(); 615 #endif 616 mtx_lock_spin(&clock_lock); 617 618 /* Select timer0 and latch counter value. */ 619 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 620 621 low = inb(TIMER_CNTR0); 622 high = inb(TIMER_CNTR0); 623 count = i8254_max_count - ((high << 8) | low); 624 if (count < i8254_lastcount || 625 (!i8254_ticked && (clkintr_pending || 626 ((count < 20 || (!(flags & PSL_I) && 627 count < i8254_max_count / 2u)) && 628 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) { 629 i8254_ticked = 1; 630 i8254_offset += i8254_max_count; 631 } 632 i8254_lastcount = count; 633 count += i8254_offset; 634 mtx_unlock_spin(&clock_lock); 635 return (count); 636 } 637 638 #ifdef DEV_ISA 639 /* 640 * Attach to the ISA PnP descriptors for the timer 641 */ 642 static struct isa_pnp_id attimer_ids[] = { 643 { 0x0001d041 /* PNP0100 */, "AT timer" }, 644 { 0 } 645 }; 646 647 static int 648 attimer_probe(device_t dev) 649 { 650 int result; 651 652 result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids); 653 if (result <= 0) 654 device_quiet(dev); 655 return(result); 656 } 657 658 static int 659 attimer_attach(device_t dev) 660 { 661 return(0); 662 } 663 664 static int 665 attimer_resume(device_t dev) 666 { 667 668 i8254_restore(); 669 return (0); 670 } 671 672 static device_method_t attimer_methods[] = { 673 /* Device interface */ 674 DEVMETHOD(device_probe, attimer_probe), 675 DEVMETHOD(device_attach, attimer_attach), 676 DEVMETHOD(device_detach, bus_generic_detach), 677 DEVMETHOD(device_shutdown, bus_generic_shutdown), 678 DEVMETHOD(device_suspend, bus_generic_suspend), 679 DEVMETHOD(device_resume, attimer_resume), 680 { 0, 0 } 681 }; 682 683 static driver_t attimer_driver = { 684 "attimer", 685 attimer_methods, 686 1, /* no softc */ 687 }; 688 689 static devclass_t attimer_devclass; 690 691 DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0); 692 DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0); 693 694 #endif /* DEV_ISA */ 695