1 /*- 2 * Copyright (c) 1990 The Regents of the University of California. 3 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org> 4 * All rights reserved. 5 * 6 * This code is derived from software contributed to Berkeley by 7 * William Jolitz and Don Ahn. 8 * 9 * Redistribution and use in source and binary forms, with or without 10 * modification, are permitted provided that the following conditions 11 * are met: 12 * 1. Redistributions of source code must retain the above copyright 13 * notice, this list of conditions and the following disclaimer. 14 * 2. Redistributions in binary form must reproduce the above copyright 15 * notice, this list of conditions and the following disclaimer in the 16 * documentation and/or other materials provided with the distribution. 17 * 4. Neither the name of the University nor the names of its contributors 18 * may be used to endorse or promote products derived from this software 19 * without specific prior written permission. 20 * 21 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 * 33 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 34 */ 35 36 #include <sys/cdefs.h> 37 __FBSDID("$FreeBSD$"); 38 39 /* 40 * Routines to handle clock hardware. 41 */ 42 43 #include "opt_clock.h" 44 #include "opt_isa.h" 45 #include "opt_mca.h" 46 47 #include <sys/param.h> 48 #include <sys/systm.h> 49 #include <sys/bus.h> 50 #include <sys/lock.h> 51 #include <sys/kdb.h> 52 #include <sys/mutex.h> 53 #include <sys/proc.h> 54 #include <sys/kernel.h> 55 #include <sys/module.h> 56 #include <sys/rman.h> 57 #include <sys/sched.h> 58 #include <sys/smp.h> 59 #include <sys/sysctl.h> 60 #include <sys/timeet.h> 61 #include <sys/timetc.h> 62 63 #include <machine/clock.h> 64 #include <machine/cpu.h> 65 #include <machine/intr_machdep.h> 66 #include <machine/ppireg.h> 67 #include <machine/timerreg.h> 68 69 #ifdef PC98 70 #include <pc98/pc98/pc98_machdep.h> 71 #else 72 #include <isa/rtc.h> 73 #endif 74 #ifdef DEV_ISA 75 #ifdef PC98 76 #include <pc98/cbus/cbus.h> 77 #else 78 #include <isa/isareg.h> 79 #endif 80 #include <isa/isavar.h> 81 #endif 82 83 #ifdef DEV_MCA 84 #include <i386/bios/mca_machdep.h> 85 #endif 86 87 int clkintr_pending; 88 #ifndef TIMER_FREQ 89 #ifdef PC98 90 #define TIMER_FREQ 2457600 91 #else 92 #define TIMER_FREQ 1193182 93 #endif 94 #endif 95 u_int i8254_freq = TIMER_FREQ; 96 TUNABLE_INT("hw.i8254.freq", &i8254_freq); 97 int i8254_max_count; 98 static int i8254_timecounter = 1; 99 100 struct mtx clock_lock; 101 static struct intsrc *i8254_intsrc; 102 static uint16_t i8254_lastcount; 103 static uint16_t i8254_offset; 104 static int (*i8254_pending)(struct intsrc *); 105 static int i8254_ticked; 106 107 struct attimer_softc { 108 int intr_en; 109 int port_rid, intr_rid; 110 struct resource *port_res; 111 struct resource *intr_res; 112 #ifdef PC98 113 int port_rid2; 114 struct resource *port_res2; 115 #endif 116 void *intr_handler; 117 struct timecounter tc; 118 struct eventtimer et; 119 int mode; 120 #define MODE_STOP 0 121 #define MODE_PERIODIC 1 122 #define MODE_ONESHOT 2 123 uint32_t period; 124 }; 125 static struct attimer_softc *attimer_sc = NULL; 126 127 static int timer0_period = -2; 128 129 /* Values for timerX_state: */ 130 #define RELEASED 0 131 #define RELEASE_PENDING 1 132 #define ACQUIRED 2 133 #define ACQUIRE_PENDING 3 134 135 static u_char timer2_state; 136 137 static unsigned i8254_get_timecount(struct timecounter *tc); 138 static void set_i8254_freq(int mode, uint32_t period); 139 140 static int 141 clkintr(void *arg) 142 { 143 struct attimer_softc *sc = (struct attimer_softc *)arg; 144 145 if (i8254_timecounter && sc->period != 0) { 146 mtx_lock_spin(&clock_lock); 147 if (i8254_ticked) 148 i8254_ticked = 0; 149 else { 150 i8254_offset += i8254_max_count; 151 i8254_lastcount = 0; 152 } 153 clkintr_pending = 0; 154 mtx_unlock_spin(&clock_lock); 155 } 156 157 if (sc && sc->et.et_active && sc->mode != MODE_STOP) 158 sc->et.et_event_cb(&sc->et, sc->et.et_arg); 159 160 #ifdef DEV_MCA 161 /* Reset clock interrupt by asserting bit 7 of port 0x61 */ 162 if (MCA_system) 163 outb(0x61, inb(0x61) | 0x80); 164 #endif 165 return (FILTER_HANDLED); 166 } 167 168 int 169 timer_spkr_acquire(void) 170 { 171 int mode; 172 173 #ifdef PC98 174 mode = TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT; 175 #else 176 mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT; 177 #endif 178 179 if (timer2_state != RELEASED) 180 return (-1); 181 timer2_state = ACQUIRED; 182 183 /* 184 * This access to the timer registers is as atomic as possible 185 * because it is a single instruction. We could do better if we 186 * knew the rate. Use of splclock() limits glitches to 10-100us, 187 * and this is probably good enough for timer2, so we aren't as 188 * careful with it as with timer0. 189 */ 190 #ifdef PC98 191 outb(TIMER_MODE, TIMER_SEL1 | (mode & 0x3f)); 192 #else 193 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f)); 194 #endif 195 ppi_spkr_on(); /* enable counter2 output to speaker */ 196 return (0); 197 } 198 199 int 200 timer_spkr_release(void) 201 { 202 203 if (timer2_state != ACQUIRED) 204 return (-1); 205 timer2_state = RELEASED; 206 #ifdef PC98 207 outb(TIMER_MODE, TIMER_SEL1 | TIMER_SQWAVE | TIMER_16BIT); 208 #else 209 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT); 210 #endif 211 ppi_spkr_off(); /* disable counter2 output to speaker */ 212 return (0); 213 } 214 215 void 216 timer_spkr_setfreq(int freq) 217 { 218 219 freq = i8254_freq / freq; 220 mtx_lock_spin(&clock_lock); 221 #ifdef PC98 222 outb(TIMER_CNTR1, freq & 0xff); 223 outb(TIMER_CNTR1, freq >> 8); 224 #else 225 outb(TIMER_CNTR2, freq & 0xff); 226 outb(TIMER_CNTR2, freq >> 8); 227 #endif 228 mtx_unlock_spin(&clock_lock); 229 } 230 231 static int 232 getit(void) 233 { 234 int high, low; 235 236 mtx_lock_spin(&clock_lock); 237 238 /* Select timer0 and latch counter value. */ 239 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 240 241 low = inb(TIMER_CNTR0); 242 high = inb(TIMER_CNTR0); 243 244 mtx_unlock_spin(&clock_lock); 245 return ((high << 8) | low); 246 } 247 248 static __inline void 249 delay_tsc(int n) 250 { 251 uint64_t start, end, now; 252 253 sched_pin(); 254 start = rdtsc(); 255 end = start + (tsc_freq * n) / 1000000; 256 do { 257 cpu_spinwait(); 258 now = rdtsc(); 259 } while (now < end || (now > start && end < start)); 260 sched_unpin(); 261 } 262 263 static __inline void 264 delay_timecounter(struct timecounter *tc, int n) 265 { 266 uint64_t end, now; 267 u_int last, mask, u; 268 269 mask = tc->tc_counter_mask; 270 last = tc->tc_get_timecount(tc) & mask; 271 end = tc->tc_frequency * n / 1000000; 272 now = 0; 273 do { 274 cpu_spinwait(); 275 u = tc->tc_get_timecount(tc) & mask; 276 if (u < last) 277 now += mask - last + u + 1; 278 else 279 now += u - last; 280 last = u; 281 } while (now < end); 282 } 283 284 /* 285 * Wait "n" microseconds. 286 * Relies on timer 1 counting down from (i8254_freq / hz) 287 * Note: timer had better have been programmed before this is first used! 288 */ 289 void 290 DELAY(int n) 291 { 292 struct timecounter *tc; 293 int delta, prev_tick, tick, ticks_left; 294 295 #ifdef DELAYDEBUG 296 int getit_calls = 1; 297 int n1; 298 static int state = 0; 299 #endif 300 301 if (tsc_freq != 0) { 302 delay_tsc(n); 303 return; 304 } 305 tc = timecounter; 306 if (tc->tc_quality > 0) { 307 delay_timecounter(tc, n); 308 return; 309 } 310 #ifdef DELAYDEBUG 311 if (state == 0) { 312 state = 1; 313 for (n1 = 1; n1 <= 10000000; n1 *= 10) 314 DELAY(n1); 315 state = 2; 316 } 317 if (state == 1) 318 printf("DELAY(%d)...", n); 319 #endif 320 /* 321 * Read the counter first, so that the rest of the setup overhead is 322 * counted. Guess the initial overhead is 20 usec (on most systems it 323 * takes about 1.5 usec for each of the i/o's in getit(). The loop 324 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The 325 * multiplications and divisions to scale the count take a while). 326 * 327 * However, if ddb is active then use a fake counter since reading 328 * the i8254 counter involves acquiring a lock. ddb must not do 329 * locking for many reasons, but it calls here for at least atkbd 330 * input. 331 */ 332 #ifdef KDB 333 if (kdb_active) 334 prev_tick = 1; 335 else 336 #endif 337 prev_tick = getit(); 338 n -= 0; /* XXX actually guess no initial overhead */ 339 /* 340 * Calculate (n * (i8254_freq / 1e6)) without using floating point 341 * and without any avoidable overflows. 342 */ 343 if (n <= 0) 344 ticks_left = 0; 345 else if (n < 256) 346 /* 347 * Use fixed point to avoid a slow division by 1000000. 348 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest. 349 * 2^15 is the first power of 2 that gives exact results 350 * for n between 0 and 256. 351 */ 352 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15; 353 else 354 /* 355 * Don't bother using fixed point, although gcc-2.7.2 356 * generates particularly poor code for the long long 357 * division, since even the slow way will complete long 358 * before the delay is up (unless we're interrupted). 359 */ 360 ticks_left = ((u_int)n * (long long)i8254_freq + 999999) 361 / 1000000; 362 363 while (ticks_left > 0) { 364 #ifdef KDB 365 if (kdb_active) { 366 #ifdef PC98 367 outb(0x5f, 0); 368 #else 369 inb(0x84); 370 #endif 371 tick = prev_tick - 1; 372 if (tick <= 0) 373 tick = i8254_max_count; 374 } else 375 #endif 376 tick = getit(); 377 #ifdef DELAYDEBUG 378 ++getit_calls; 379 #endif 380 delta = prev_tick - tick; 381 prev_tick = tick; 382 if (delta < 0) { 383 delta += i8254_max_count; 384 /* 385 * Guard against i8254_max_count being wrong. 386 * This shouldn't happen in normal operation, 387 * but it may happen if set_i8254_freq() is 388 * traced. 389 */ 390 if (delta < 0) 391 delta = 0; 392 } 393 ticks_left -= delta; 394 } 395 #ifdef DELAYDEBUG 396 if (state == 1) 397 printf(" %d calls to getit() at %d usec each\n", 398 getit_calls, (n + 5) / getit_calls); 399 #endif 400 } 401 402 static void 403 set_i8254_freq(int mode, uint32_t period) 404 { 405 int new_count; 406 407 mtx_lock_spin(&clock_lock); 408 if (mode == MODE_STOP) { 409 if (i8254_timecounter) { 410 mode = MODE_PERIODIC; 411 new_count = 0x10000; 412 } else 413 new_count = -1; 414 } else { 415 new_count = min(((uint64_t)i8254_freq * period + 416 0x80000000LLU) >> 32, 0x10000); 417 } 418 if (new_count == timer0_period) 419 goto out; 420 i8254_max_count = ((new_count & ~0xffff) != 0) ? 0xffff : new_count; 421 timer0_period = (mode == MODE_PERIODIC) ? new_count : -1; 422 switch (mode) { 423 case MODE_STOP: 424 outb(TIMER_MODE, TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT); 425 outb(TIMER_CNTR0, 0); 426 outb(TIMER_CNTR0, 0); 427 break; 428 case MODE_PERIODIC: 429 outb(TIMER_MODE, TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT); 430 outb(TIMER_CNTR0, new_count & 0xff); 431 outb(TIMER_CNTR0, new_count >> 8); 432 break; 433 case MODE_ONESHOT: 434 outb(TIMER_MODE, TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT); 435 outb(TIMER_CNTR0, new_count & 0xff); 436 outb(TIMER_CNTR0, new_count >> 8); 437 break; 438 } 439 out: 440 mtx_unlock_spin(&clock_lock); 441 } 442 443 static void 444 i8254_restore(void) 445 { 446 447 timer0_period = -2; 448 if (attimer_sc != NULL) 449 set_i8254_freq(attimer_sc->mode, attimer_sc->period); 450 else 451 set_i8254_freq(0, 0); 452 } 453 454 #ifndef __amd64__ 455 /* 456 * Restore all the timers non-atomically (XXX: should be atomically). 457 * 458 * This function is called from pmtimer_resume() to restore all the timers. 459 * This should not be necessary, but there are broken laptops that do not 460 * restore all the timers on resume. 461 * As long as pmtimer is not part of amd64 suport, skip this for the amd64 462 * case. 463 */ 464 void 465 timer_restore(void) 466 { 467 468 i8254_restore(); /* restore i8254_freq and hz */ 469 #ifndef PC98 470 atrtc_restore(); /* reenable RTC interrupts */ 471 #endif 472 } 473 #endif 474 475 /* This is separate from startrtclock() so that it can be called early. */ 476 void 477 i8254_init(void) 478 { 479 480 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE); 481 #ifdef PC98 482 if (pc98_machine_type & M_8M) 483 i8254_freq = 1996800L; /* 1.9968 MHz */ 484 #endif 485 set_i8254_freq(0, 0); 486 } 487 488 void 489 startrtclock() 490 { 491 492 init_TSC(); 493 } 494 495 void 496 cpu_initclocks(void) 497 { 498 499 init_TSC_tc(); 500 cpu_initclocks_bsp(); 501 } 502 503 static int 504 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS) 505 { 506 int error; 507 u_int freq; 508 509 /* 510 * Use `i8254' instead of `timer' in external names because `timer' 511 * is too generic. Should use it everywhere. 512 */ 513 freq = i8254_freq; 514 error = sysctl_handle_int(oidp, &freq, 0, req); 515 if (error == 0 && req->newptr != NULL) { 516 i8254_freq = freq; 517 if (attimer_sc != NULL) { 518 set_i8254_freq(attimer_sc->mode, attimer_sc->period); 519 attimer_sc->tc.tc_frequency = freq; 520 } else { 521 set_i8254_freq(0, 0); 522 } 523 } 524 return (error); 525 } 526 527 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW, 528 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", ""); 529 530 static unsigned 531 i8254_get_timecount(struct timecounter *tc) 532 { 533 device_t dev = (device_t)tc->tc_priv; 534 struct attimer_softc *sc = device_get_softc(dev); 535 register_t flags; 536 uint16_t count; 537 u_int high, low; 538 539 if (sc->period == 0) 540 return (i8254_max_count - getit()); 541 542 #ifdef __amd64__ 543 flags = read_rflags(); 544 #else 545 flags = read_eflags(); 546 #endif 547 mtx_lock_spin(&clock_lock); 548 549 /* Select timer0 and latch counter value. */ 550 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 551 552 low = inb(TIMER_CNTR0); 553 high = inb(TIMER_CNTR0); 554 count = i8254_max_count - ((high << 8) | low); 555 if (count < i8254_lastcount || 556 (!i8254_ticked && (clkintr_pending || 557 ((count < 20 || (!(flags & PSL_I) && 558 count < i8254_max_count / 2u)) && 559 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) { 560 i8254_ticked = 1; 561 i8254_offset += i8254_max_count; 562 } 563 i8254_lastcount = count; 564 count += i8254_offset; 565 mtx_unlock_spin(&clock_lock); 566 return (count); 567 } 568 569 static int 570 attimer_start(struct eventtimer *et, 571 struct bintime *first, struct bintime *period) 572 { 573 device_t dev = (device_t)et->et_priv; 574 struct attimer_softc *sc = device_get_softc(dev); 575 576 if (period != NULL) { 577 sc->mode = MODE_PERIODIC; 578 sc->period = period->frac >> 32; 579 } else { 580 sc->mode = MODE_ONESHOT; 581 sc->period = first->frac >> 32; 582 } 583 if (!sc->intr_en) { 584 i8254_intsrc->is_pic->pic_enable_source(i8254_intsrc); 585 sc->intr_en = 1; 586 } 587 set_i8254_freq(sc->mode, sc->period); 588 return (0); 589 } 590 591 static int 592 attimer_stop(struct eventtimer *et) 593 { 594 device_t dev = (device_t)et->et_priv; 595 struct attimer_softc *sc = device_get_softc(dev); 596 597 sc->mode = MODE_STOP; 598 sc->period = 0; 599 set_i8254_freq(sc->mode, sc->period); 600 return (0); 601 } 602 603 #ifdef DEV_ISA 604 /* 605 * Attach to the ISA PnP descriptors for the timer 606 */ 607 static struct isa_pnp_id attimer_ids[] = { 608 { 0x0001d041 /* PNP0100 */, "AT timer" }, 609 { 0 } 610 }; 611 612 #ifdef PC98 613 static void 614 pc98_alloc_resource(device_t dev) 615 { 616 static bus_addr_t iat1[] = {0, 2, 4, 6}; 617 static bus_addr_t iat2[] = {0, 4}; 618 struct attimer_softc *sc; 619 620 sc = device_get_softc(dev); 621 622 sc->port_rid = 0; 623 bus_set_resource(dev, SYS_RES_IOPORT, sc->port_rid, IO_TIMER1, 1); 624 sc->port_res = isa_alloc_resourcev(dev, SYS_RES_IOPORT, 625 &sc->port_rid, iat1, 4, RF_ACTIVE); 626 if (sc->port_res == NULL) 627 device_printf(dev, "Warning: Couldn't map I/O.\n"); 628 else 629 isa_load_resourcev(sc->port_res, iat1, 4); 630 631 sc->port_rid2 = 4; 632 bus_set_resource(dev, SYS_RES_IOPORT, sc->port_rid2, TIMER_CNTR1, 1); 633 sc->port_res2 = isa_alloc_resourcev(dev, SYS_RES_IOPORT, 634 &sc->port_rid2, iat2, 2, RF_ACTIVE); 635 if (sc->port_res2 == NULL) 636 device_printf(dev, "Warning: Couldn't map I/O.\n"); 637 else 638 isa_load_resourcev(sc->port_res2, iat2, 2); 639 } 640 641 static void 642 pc98_release_resource(device_t dev) 643 { 644 struct attimer_softc *sc; 645 646 sc = device_get_softc(dev); 647 648 if (sc->port_res) 649 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid, 650 sc->port_res); 651 if (sc->port_res2) 652 bus_release_resource(dev, SYS_RES_IOPORT, sc->port_rid2, 653 sc->port_res2); 654 } 655 #endif 656 657 static int 658 attimer_probe(device_t dev) 659 { 660 int result; 661 662 result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids); 663 /* ENOENT means no PnP-ID, device is hinted. */ 664 if (result == ENOENT) { 665 device_set_desc(dev, "AT timer"); 666 #ifdef PC98 667 /* To print resources correctly. */ 668 pc98_alloc_resource(dev); 669 pc98_release_resource(dev); 670 #endif 671 return (BUS_PROBE_LOW_PRIORITY); 672 } 673 return (result); 674 } 675 676 static int 677 attimer_attach(device_t dev) 678 { 679 struct attimer_softc *sc; 680 u_long s; 681 int i; 682 683 attimer_sc = sc = device_get_softc(dev); 684 bzero(sc, sizeof(struct attimer_softc)); 685 #ifdef PC98 686 pc98_alloc_resource(dev); 687 #else 688 if (!(sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, 689 &sc->port_rid, IO_TIMER1, IO_TIMER1 + 3, 4, RF_ACTIVE))) 690 device_printf(dev,"Warning: Couldn't map I/O.\n"); 691 #endif 692 i8254_intsrc = intr_lookup_source(0); 693 if (i8254_intsrc != NULL) 694 i8254_pending = i8254_intsrc->is_pic->pic_source_pending; 695 resource_int_value(device_get_name(dev), device_get_unit(dev), 696 "timecounter", &i8254_timecounter); 697 set_i8254_freq(0, 0); 698 if (i8254_timecounter) { 699 sc->tc.tc_get_timecount = i8254_get_timecount; 700 sc->tc.tc_counter_mask = 0xffff; 701 sc->tc.tc_frequency = i8254_freq; 702 sc->tc.tc_name = "i8254"; 703 sc->tc.tc_quality = 0; 704 sc->tc.tc_priv = dev; 705 tc_init(&sc->tc); 706 } 707 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 708 "clock", &i) != 0 || i != 0) { 709 sc->intr_rid = 0; 710 while (bus_get_resource(dev, SYS_RES_IRQ, sc->intr_rid, 711 &s, NULL) == 0 && s != 0) 712 sc->intr_rid++; 713 if (!(sc->intr_res = bus_alloc_resource(dev, SYS_RES_IRQ, 714 &sc->intr_rid, 0, 0, 1, RF_ACTIVE))) { 715 device_printf(dev,"Can't map interrupt.\n"); 716 return (0); 717 } 718 /* Dirty hack, to make bus_setup_intr to not enable source. */ 719 i8254_intsrc->is_handlers++; 720 if ((bus_setup_intr(dev, sc->intr_res, 721 INTR_MPSAFE | INTR_TYPE_CLK, 722 (driver_filter_t *)clkintr, NULL, 723 sc, &sc->intr_handler))) { 724 device_printf(dev, "Can't setup interrupt.\n"); 725 i8254_intsrc->is_handlers--; 726 return (0); 727 } 728 i8254_intsrc->is_handlers--; 729 i8254_intsrc->is_pic->pic_enable_intr(i8254_intsrc); 730 sc->et.et_name = "i8254"; 731 sc->et.et_flags = ET_FLAGS_PERIODIC; 732 if (!i8254_timecounter) 733 sc->et.et_flags |= ET_FLAGS_ONESHOT; 734 sc->et.et_quality = 100; 735 sc->et.et_frequency = i8254_freq; 736 sc->et.et_min_period.sec = 0; 737 sc->et.et_min_period.frac = 738 ((0x0002LLU << 48) / i8254_freq) << 16; 739 sc->et.et_max_period.sec = 0xffff / i8254_freq; 740 sc->et.et_max_period.frac = 741 ((0xfffeLLU << 48) / i8254_freq) << 16; 742 sc->et.et_start = attimer_start; 743 sc->et.et_stop = attimer_stop; 744 sc->et.et_priv = dev; 745 et_register(&sc->et); 746 } 747 return(0); 748 } 749 750 static int 751 attimer_resume(device_t dev) 752 { 753 754 i8254_restore(); 755 return (0); 756 } 757 758 static device_method_t attimer_methods[] = { 759 /* Device interface */ 760 DEVMETHOD(device_probe, attimer_probe), 761 DEVMETHOD(device_attach, attimer_attach), 762 DEVMETHOD(device_detach, bus_generic_detach), 763 DEVMETHOD(device_shutdown, bus_generic_shutdown), 764 DEVMETHOD(device_suspend, bus_generic_suspend), 765 DEVMETHOD(device_resume, attimer_resume), 766 { 0, 0 } 767 }; 768 769 static driver_t attimer_driver = { 770 "attimer", 771 attimer_methods, 772 sizeof(struct attimer_softc), 773 }; 774 775 static devclass_t attimer_devclass; 776 777 DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0); 778 DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0); 779 780 #endif /* DEV_ISA */ 781