1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 1990 The Regents of the University of California. 5 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org> 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz and Don Ahn. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 */ 35 36 #include <sys/cdefs.h> 37 /* 38 * Routines to handle clock hardware. 39 */ 40 41 #ifdef __amd64__ 42 #define DEV_APIC 43 #else 44 #include "opt_apic.h" 45 #endif 46 #include "opt_clock.h" 47 #include "opt_isa.h" 48 49 #include <sys/param.h> 50 #include <sys/systm.h> 51 #include <sys/bus.h> 52 #include <sys/lock.h> 53 #include <sys/kdb.h> 54 #include <sys/mutex.h> 55 #include <sys/proc.h> 56 #include <sys/kernel.h> 57 #include <sys/module.h> 58 #include <sys/rman.h> 59 #include <sys/sched.h> 60 #include <sys/smp.h> 61 #include <sys/sysctl.h> 62 #include <sys/timeet.h> 63 #include <sys/timetc.h> 64 65 #include <machine/clock.h> 66 #include <machine/cpu.h> 67 #include <machine/intr_machdep.h> 68 #include <x86/apicvar.h> 69 #include <x86/init.h> 70 #include <x86/ppireg.h> 71 #include <x86/timerreg.h> 72 73 #include <isa/rtc.h> 74 #ifdef DEV_ISA 75 #include <isa/isareg.h> 76 #include <isa/isavar.h> 77 #endif 78 79 int clkintr_pending; 80 #ifndef TIMER_FREQ 81 #define TIMER_FREQ 1193182 82 #endif 83 u_int i8254_freq = TIMER_FREQ; 84 TUNABLE_INT("hw.i8254.freq", &i8254_freq); 85 int i8254_max_count; 86 static int i8254_timecounter = 1; 87 88 static struct mtx clock_lock; 89 static struct intsrc *i8254_intsrc; 90 static uint16_t i8254_lastcount; 91 static uint16_t i8254_offset; 92 static int (*i8254_pending)(struct intsrc *); 93 static int i8254_ticked; 94 95 struct attimer_softc { 96 int intr_en; 97 int port_rid, intr_rid; 98 struct resource *port_res; 99 struct resource *intr_res; 100 void *intr_handler; 101 struct timecounter tc; 102 struct eventtimer et; 103 int mode; 104 #define MODE_STOP 0 105 #define MODE_PERIODIC 1 106 #define MODE_ONESHOT 2 107 uint32_t period; 108 }; 109 static struct attimer_softc *attimer_sc = NULL; 110 111 static int timer0_period = -2; 112 static int timer0_mode = 0xffff; 113 static int timer0_last = 0xffff; 114 115 /* Values for timerX_state: */ 116 #define RELEASED 0 117 #define RELEASE_PENDING 1 118 #define ACQUIRED 2 119 #define ACQUIRE_PENDING 3 120 121 static u_char timer2_state; 122 123 static unsigned i8254_get_timecount(struct timecounter *tc); 124 static void set_i8254_freq(int mode, uint32_t period); 125 126 void 127 clock_init(void) 128 { 129 /* Init the clock lock */ 130 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE); 131 /* Init the clock in order to use DELAY */ 132 init_ops.early_clock_source_init(); 133 tsc_init(); 134 } 135 136 static int 137 clkintr(void *arg) 138 { 139 struct attimer_softc *sc = (struct attimer_softc *)arg; 140 141 if (i8254_timecounter && sc->period != 0) { 142 mtx_lock_spin(&clock_lock); 143 if (i8254_ticked) 144 i8254_ticked = 0; 145 else { 146 i8254_offset += i8254_max_count; 147 i8254_lastcount = 0; 148 } 149 clkintr_pending = 0; 150 mtx_unlock_spin(&clock_lock); 151 } 152 153 if (sc->et.et_active && sc->mode != MODE_STOP) 154 sc->et.et_event_cb(&sc->et, sc->et.et_arg); 155 156 return (FILTER_HANDLED); 157 } 158 159 int 160 timer_spkr_acquire(void) 161 { 162 int mode; 163 164 mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT; 165 166 if (timer2_state != RELEASED) 167 return (-1); 168 timer2_state = ACQUIRED; 169 170 /* 171 * This access to the timer registers is as atomic as possible 172 * because it is a single instruction. We could do better if we 173 * knew the rate. Use of splclock() limits glitches to 10-100us, 174 * and this is probably good enough for timer2, so we aren't as 175 * careful with it as with timer0. 176 */ 177 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f)); 178 179 ppi_spkr_on(); /* enable counter2 output to speaker */ 180 return (0); 181 } 182 183 int 184 timer_spkr_release(void) 185 { 186 187 if (timer2_state != ACQUIRED) 188 return (-1); 189 timer2_state = RELEASED; 190 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT); 191 192 ppi_spkr_off(); /* disable counter2 output to speaker */ 193 return (0); 194 } 195 196 void 197 timer_spkr_setfreq(int freq) 198 { 199 200 freq = i8254_freq / freq; 201 mtx_lock_spin(&clock_lock); 202 outb(TIMER_CNTR2, freq & 0xff); 203 outb(TIMER_CNTR2, freq >> 8); 204 mtx_unlock_spin(&clock_lock); 205 } 206 207 static int 208 getit(void) 209 { 210 int high, low; 211 212 mtx_lock_spin(&clock_lock); 213 214 /* Select timer0 and latch counter value. */ 215 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 216 217 low = inb(TIMER_CNTR0); 218 high = inb(TIMER_CNTR0); 219 220 mtx_unlock_spin(&clock_lock); 221 return ((high << 8) | low); 222 } 223 224 /* 225 * Wait "n" microseconds. 226 * Relies on timer 1 counting down from (i8254_freq / hz) 227 * Note: timer had better have been programmed before this is first used! 228 */ 229 void 230 i8254_delay(int n) 231 { 232 int delta, prev_tick, tick, ticks_left; 233 #ifdef DELAYDEBUG 234 int getit_calls = 1; 235 int n1; 236 static int state = 0; 237 238 if (state == 0) { 239 state = 1; 240 for (n1 = 1; n1 <= 10000000; n1 *= 10) 241 DELAY(n1); 242 state = 2; 243 } 244 if (state == 1) 245 printf("DELAY(%d)...", n); 246 #endif 247 /* 248 * Read the counter first, so that the rest of the setup overhead is 249 * counted. Guess the initial overhead is 20 usec (on most systems it 250 * takes about 1.5 usec for each of the i/o's in getit(). The loop 251 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The 252 * multiplications and divisions to scale the count take a while). 253 * 254 * However, if ddb is active then use a fake counter since reading 255 * the i8254 counter involves acquiring a lock. ddb must not do 256 * locking for many reasons, but it calls here for at least atkbd 257 * input. 258 */ 259 #ifdef KDB 260 if (kdb_active) 261 prev_tick = 1; 262 else 263 #endif 264 prev_tick = getit(); 265 n -= 0; /* XXX actually guess no initial overhead */ 266 /* 267 * Calculate (n * (i8254_freq / 1e6)) without using floating point 268 * and without any avoidable overflows. 269 */ 270 if (n <= 0) 271 ticks_left = 0; 272 else if (n < 256) 273 /* 274 * Use fixed point to avoid a slow division by 1000000. 275 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest. 276 * 2^15 is the first power of 2 that gives exact results 277 * for n between 0 and 256. 278 */ 279 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15; 280 else 281 /* 282 * Don't bother using fixed point, although gcc-2.7.2 283 * generates particularly poor code for the long long 284 * division, since even the slow way will complete long 285 * before the delay is up (unless we're interrupted). 286 */ 287 ticks_left = ((u_int)n * (long long)i8254_freq + 999999) 288 / 1000000; 289 290 while (ticks_left > 0) { 291 #ifdef KDB 292 if (kdb_active) { 293 inb(0x84); 294 tick = prev_tick - 1; 295 if (tick <= 0) 296 tick = i8254_max_count; 297 } else 298 #endif 299 tick = getit(); 300 #ifdef DELAYDEBUG 301 ++getit_calls; 302 #endif 303 delta = prev_tick - tick; 304 prev_tick = tick; 305 if (delta < 0) { 306 delta += i8254_max_count; 307 /* 308 * Guard against i8254_max_count being wrong. 309 * This shouldn't happen in normal operation, 310 * but it may happen if set_i8254_freq() is 311 * traced. 312 */ 313 if (delta < 0) 314 delta = 0; 315 } 316 ticks_left -= delta; 317 } 318 #ifdef DELAYDEBUG 319 if (state == 1) 320 printf(" %d calls to getit() at %d usec each\n", 321 getit_calls, (n + 5) / getit_calls); 322 #endif 323 } 324 325 static void 326 set_i8254_freq(int mode, uint32_t period) 327 { 328 int new_count, new_mode; 329 330 mtx_lock_spin(&clock_lock); 331 if (mode == MODE_STOP) { 332 if (i8254_timecounter) { 333 mode = MODE_PERIODIC; 334 new_count = 0x10000; 335 } else 336 new_count = -1; 337 } else { 338 new_count = min(((uint64_t)i8254_freq * period + 339 0x80000000LLU) >> 32, 0x10000); 340 } 341 if (new_count == timer0_period) 342 goto out; 343 i8254_max_count = ((new_count & ~0xffff) != 0) ? 0xffff : new_count; 344 timer0_period = (mode == MODE_PERIODIC) ? new_count : -1; 345 switch (mode) { 346 case MODE_STOP: 347 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT; 348 outb(TIMER_MODE, new_mode); 349 outb(TIMER_CNTR0, 0); 350 outb(TIMER_CNTR0, 0); 351 break; 352 case MODE_PERIODIC: 353 new_mode = TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT; 354 outb(TIMER_MODE, new_mode); 355 outb(TIMER_CNTR0, new_count & 0xff); 356 outb(TIMER_CNTR0, new_count >> 8); 357 break; 358 case MODE_ONESHOT: 359 if (new_count < 256 && timer0_last < 256) { 360 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_LSB; 361 if (new_mode != timer0_mode) 362 outb(TIMER_MODE, new_mode); 363 outb(TIMER_CNTR0, new_count & 0xff); 364 break; 365 } 366 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT; 367 if (new_mode != timer0_mode) 368 outb(TIMER_MODE, new_mode); 369 outb(TIMER_CNTR0, new_count & 0xff); 370 outb(TIMER_CNTR0, new_count >> 8); 371 break; 372 default: 373 panic("set_i8254_freq: unknown operational mode"); 374 } 375 timer0_mode = new_mode; 376 timer0_last = new_count; 377 out: 378 mtx_unlock_spin(&clock_lock); 379 } 380 381 static void 382 i8254_restore(void) 383 { 384 385 timer0_period = -2; 386 timer0_mode = 0xffff; 387 timer0_last = 0xffff; 388 if (attimer_sc != NULL) 389 set_i8254_freq(attimer_sc->mode, attimer_sc->period); 390 else 391 set_i8254_freq(MODE_STOP, 0); 392 } 393 394 /* This is separate from startrtclock() so that it can be called early. */ 395 void 396 i8254_init(void) 397 { 398 399 set_i8254_freq(MODE_STOP, 0); 400 } 401 402 void 403 startrtclock(void) 404 { 405 406 start_TSC(); 407 } 408 409 void 410 cpu_initclocks(void) 411 { 412 struct thread *td; 413 int i; 414 415 td = curthread; 416 417 tsc_calibrate(); 418 #ifdef DEV_APIC 419 lapic_calibrate_timer(); 420 #endif 421 cpu_initclocks_bsp(); 422 CPU_FOREACH(i) { 423 if (i == 0) 424 continue; 425 thread_lock(td); 426 sched_bind(td, i); 427 thread_unlock(td); 428 cpu_initclocks_ap(); 429 } 430 thread_lock(td); 431 if (sched_is_bound(td)) 432 sched_unbind(td); 433 thread_unlock(td); 434 } 435 436 static int 437 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS) 438 { 439 int error; 440 u_int freq; 441 442 /* 443 * Use `i8254' instead of `timer' in external names because `timer' 444 * is too generic. Should use it everywhere. 445 */ 446 freq = i8254_freq; 447 error = sysctl_handle_int(oidp, &freq, 0, req); 448 if (error == 0 && req->newptr != NULL) { 449 i8254_freq = freq; 450 if (attimer_sc != NULL) { 451 set_i8254_freq(attimer_sc->mode, attimer_sc->period); 452 attimer_sc->tc.tc_frequency = freq; 453 } else { 454 set_i8254_freq(MODE_STOP, 0); 455 } 456 } 457 return (error); 458 } 459 460 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, 461 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, 462 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", 463 "i8254 timer frequency"); 464 465 static unsigned 466 i8254_get_timecount(struct timecounter *tc) 467 { 468 device_t dev = (device_t)tc->tc_priv; 469 struct attimer_softc *sc = device_get_softc(dev); 470 register_t flags; 471 uint16_t count; 472 u_int high, low; 473 474 if (sc->period == 0) 475 return (i8254_max_count - getit()); 476 477 #ifdef __amd64__ 478 flags = read_rflags(); 479 #else 480 flags = read_eflags(); 481 #endif 482 mtx_lock_spin(&clock_lock); 483 484 /* Select timer0 and latch counter value. */ 485 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 486 487 low = inb(TIMER_CNTR0); 488 high = inb(TIMER_CNTR0); 489 count = i8254_max_count - ((high << 8) | low); 490 if (count < i8254_lastcount || 491 (!i8254_ticked && (clkintr_pending || 492 ((count < 20 || (!(flags & PSL_I) && 493 count < i8254_max_count / 2u)) && 494 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) { 495 i8254_ticked = 1; 496 i8254_offset += i8254_max_count; 497 } 498 i8254_lastcount = count; 499 count += i8254_offset; 500 mtx_unlock_spin(&clock_lock); 501 return (count); 502 } 503 504 static int 505 attimer_start(struct eventtimer *et, sbintime_t first, sbintime_t period) 506 { 507 device_t dev = (device_t)et->et_priv; 508 struct attimer_softc *sc = device_get_softc(dev); 509 510 if (period != 0) { 511 sc->mode = MODE_PERIODIC; 512 sc->period = period; 513 } else { 514 sc->mode = MODE_ONESHOT; 515 sc->period = first; 516 } 517 if (!sc->intr_en) { 518 i8254_intsrc->is_pic->pic_enable_source(i8254_intsrc); 519 sc->intr_en = 1; 520 } 521 set_i8254_freq(sc->mode, sc->period); 522 return (0); 523 } 524 525 static int 526 attimer_stop(struct eventtimer *et) 527 { 528 device_t dev = (device_t)et->et_priv; 529 struct attimer_softc *sc = device_get_softc(dev); 530 531 sc->mode = MODE_STOP; 532 sc->period = 0; 533 set_i8254_freq(sc->mode, sc->period); 534 return (0); 535 } 536 537 #ifdef DEV_ISA 538 /* 539 * Attach to the ISA PnP descriptors for the timer 540 */ 541 static struct isa_pnp_id attimer_ids[] = { 542 { 0x0001d041 /* PNP0100 */, "AT timer" }, 543 { 0 } 544 }; 545 546 static int 547 attimer_probe(device_t dev) 548 { 549 int result; 550 551 result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids); 552 /* ENOENT means no PnP-ID, device is hinted. */ 553 if (result == ENOENT) { 554 device_set_desc(dev, "AT timer"); 555 return (BUS_PROBE_LOW_PRIORITY); 556 } 557 return (result); 558 } 559 560 static int 561 attimer_attach(device_t dev) 562 { 563 struct attimer_softc *sc; 564 rman_res_t s; 565 int i; 566 567 attimer_sc = sc = device_get_softc(dev); 568 bzero(sc, sizeof(struct attimer_softc)); 569 if (!(sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, 570 &sc->port_rid, IO_TIMER1, IO_TIMER1 + 3, 4, RF_ACTIVE))) 571 device_printf(dev,"Warning: Couldn't map I/O.\n"); 572 i8254_intsrc = intr_lookup_source(0); 573 if (i8254_intsrc != NULL) 574 i8254_pending = i8254_intsrc->is_pic->pic_source_pending; 575 resource_int_value(device_get_name(dev), device_get_unit(dev), 576 "timecounter", &i8254_timecounter); 577 set_i8254_freq(MODE_STOP, 0); 578 if (i8254_timecounter) { 579 sc->tc.tc_get_timecount = i8254_get_timecount; 580 sc->tc.tc_counter_mask = 0xffff; 581 sc->tc.tc_frequency = i8254_freq; 582 sc->tc.tc_name = "i8254"; 583 sc->tc.tc_quality = 0; 584 sc->tc.tc_priv = dev; 585 tc_init(&sc->tc); 586 } 587 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 588 "clock", &i) != 0 || i != 0) { 589 sc->intr_rid = 0; 590 while (bus_get_resource(dev, SYS_RES_IRQ, sc->intr_rid, 591 &s, NULL) == 0 && s != 0) 592 sc->intr_rid++; 593 if (!(sc->intr_res = bus_alloc_resource(dev, SYS_RES_IRQ, 594 &sc->intr_rid, 0, 0, 1, RF_ACTIVE))) { 595 device_printf(dev,"Can't map interrupt.\n"); 596 return (0); 597 } 598 /* Dirty hack, to make bus_setup_intr to not enable source. */ 599 i8254_intsrc->is_handlers++; 600 if ((bus_setup_intr(dev, sc->intr_res, 601 INTR_MPSAFE | INTR_TYPE_CLK, 602 (driver_filter_t *)clkintr, NULL, 603 sc, &sc->intr_handler))) { 604 device_printf(dev, "Can't setup interrupt.\n"); 605 i8254_intsrc->is_handlers--; 606 return (0); 607 } 608 i8254_intsrc->is_handlers--; 609 i8254_intsrc->is_pic->pic_enable_intr(i8254_intsrc); 610 sc->et.et_name = "i8254"; 611 sc->et.et_flags = ET_FLAGS_PERIODIC; 612 if (!i8254_timecounter) 613 sc->et.et_flags |= ET_FLAGS_ONESHOT; 614 sc->et.et_quality = 100; 615 sc->et.et_frequency = i8254_freq; 616 sc->et.et_min_period = (0x0002LLU << 32) / i8254_freq; 617 sc->et.et_max_period = (0xfffeLLU << 32) / i8254_freq; 618 sc->et.et_start = attimer_start; 619 sc->et.et_stop = attimer_stop; 620 sc->et.et_priv = dev; 621 et_register(&sc->et); 622 } 623 return(0); 624 } 625 626 static int 627 attimer_resume(device_t dev) 628 { 629 630 i8254_restore(); 631 return (0); 632 } 633 634 static device_method_t attimer_methods[] = { 635 /* Device interface */ 636 DEVMETHOD(device_probe, attimer_probe), 637 DEVMETHOD(device_attach, attimer_attach), 638 DEVMETHOD(device_detach, bus_generic_detach), 639 DEVMETHOD(device_shutdown, bus_generic_shutdown), 640 DEVMETHOD(device_suspend, bus_generic_suspend), 641 DEVMETHOD(device_resume, attimer_resume), 642 { 0, 0 } 643 }; 644 645 static driver_t attimer_driver = { 646 "attimer", 647 attimer_methods, 648 sizeof(struct attimer_softc), 649 }; 650 651 DRIVER_MODULE(attimer, isa, attimer_driver, 0, 0); 652 DRIVER_MODULE(attimer, acpi, attimer_driver, 0, 0); 653 ISA_PNP_INFO(attimer_ids); 654 655 #endif /* DEV_ISA */ 656