xref: /freebsd/sys/x86/isa/clock.c (revision 405c3050f102b8c74782f0366c8ead927bd07b68)
1 /*-
2  * SPDX-License-Identifier: BSD-3-Clause
3  *
4  * Copyright (c) 1990 The Regents of the University of California.
5  * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org>
6  * All rights reserved.
7  *
8  * This code is derived from software contributed to Berkeley by
9  * William Jolitz and Don Ahn.
10  *
11  * Redistribution and use in source and binary forms, with or without
12  * modification, are permitted provided that the following conditions
13  * are met:
14  * 1. Redistributions of source code must retain the above copyright
15  *    notice, this list of conditions and the following disclaimer.
16  * 2. Redistributions in binary form must reproduce the above copyright
17  *    notice, this list of conditions and the following disclaimer in the
18  *    documentation and/or other materials provided with the distribution.
19  * 3. Neither the name of the University nor the names of its contributors
20  *    may be used to endorse or promote products derived from this software
21  *    without specific prior written permission.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  *
35  *	from: @(#)clock.c	7.2 (Berkeley) 5/12/91
36  */
37 
38 #include <sys/cdefs.h>
39 __FBSDID("$FreeBSD$");
40 
41 /*
42  * Routines to handle clock hardware.
43  */
44 
45 #include "opt_clock.h"
46 #include "opt_isa.h"
47 
48 #include <sys/param.h>
49 #include <sys/systm.h>
50 #include <sys/bus.h>
51 #include <sys/lock.h>
52 #include <sys/kdb.h>
53 #include <sys/mutex.h>
54 #include <sys/proc.h>
55 #include <sys/kernel.h>
56 #include <sys/module.h>
57 #include <sys/rman.h>
58 #include <sys/sched.h>
59 #include <sys/smp.h>
60 #include <sys/sysctl.h>
61 #include <sys/timeet.h>
62 #include <sys/timetc.h>
63 
64 #include <machine/clock.h>
65 #include <machine/cpu.h>
66 #include <machine/intr_machdep.h>
67 #include <machine/ppireg.h>
68 #include <machine/timerreg.h>
69 #include <x86/init.h>
70 
71 #include <isa/rtc.h>
72 #ifdef DEV_ISA
73 #include <isa/isareg.h>
74 #include <isa/isavar.h>
75 #endif
76 
77 int	clkintr_pending;
78 #ifndef TIMER_FREQ
79 #define TIMER_FREQ   1193182
80 #endif
81 u_int	i8254_freq = TIMER_FREQ;
82 TUNABLE_INT("hw.i8254.freq", &i8254_freq);
83 int	i8254_max_count;
84 static int i8254_timecounter = 1;
85 
86 static	struct mtx clock_lock;
87 static	struct intsrc *i8254_intsrc;
88 static	uint16_t i8254_lastcount;
89 static	uint16_t i8254_offset;
90 static	int	(*i8254_pending)(struct intsrc *);
91 static	int	i8254_ticked;
92 
93 struct attimer_softc {
94 	int intr_en;
95 	int port_rid, intr_rid;
96 	struct resource *port_res;
97 	struct resource *intr_res;
98 	void *intr_handler;
99 	struct timecounter tc;
100 	struct eventtimer et;
101 	int		mode;
102 #define	MODE_STOP	0
103 #define	MODE_PERIODIC	1
104 #define	MODE_ONESHOT	2
105 	uint32_t	period;
106 };
107 static struct attimer_softc *attimer_sc = NULL;
108 
109 static int timer0_period = -2;
110 static int timer0_mode = 0xffff;
111 static int timer0_last = 0xffff;
112 
113 /* Values for timerX_state: */
114 #define	RELEASED	0
115 #define	RELEASE_PENDING	1
116 #define	ACQUIRED	2
117 #define	ACQUIRE_PENDING	3
118 
119 static	u_char	timer2_state;
120 
121 static	unsigned i8254_get_timecount(struct timecounter *tc);
122 static	void	set_i8254_freq(int mode, uint32_t period);
123 
124 void
125 clock_init(void)
126 {
127 	/* Init the clock lock */
128 	mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE);
129 	/* Init the clock in order to use DELAY */
130 	init_ops.early_clock_source_init();
131 }
132 
133 static int
134 clkintr(void *arg)
135 {
136 	struct attimer_softc *sc = (struct attimer_softc *)arg;
137 
138 	if (i8254_timecounter && sc->period != 0) {
139 		mtx_lock_spin(&clock_lock);
140 		if (i8254_ticked)
141 			i8254_ticked = 0;
142 		else {
143 			i8254_offset += i8254_max_count;
144 			i8254_lastcount = 0;
145 		}
146 		clkintr_pending = 0;
147 		mtx_unlock_spin(&clock_lock);
148 	}
149 
150 	if (sc->et.et_active && sc->mode != MODE_STOP)
151 		sc->et.et_event_cb(&sc->et, sc->et.et_arg);
152 
153 	return (FILTER_HANDLED);
154 }
155 
156 int
157 timer_spkr_acquire(void)
158 {
159 	int mode;
160 
161 	mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT;
162 
163 	if (timer2_state != RELEASED)
164 		return (-1);
165 	timer2_state = ACQUIRED;
166 
167 	/*
168 	 * This access to the timer registers is as atomic as possible
169 	 * because it is a single instruction.  We could do better if we
170 	 * knew the rate.  Use of splclock() limits glitches to 10-100us,
171 	 * and this is probably good enough for timer2, so we aren't as
172 	 * careful with it as with timer0.
173 	 */
174 	outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f));
175 
176 	ppi_spkr_on();		/* enable counter2 output to speaker */
177 	return (0);
178 }
179 
180 int
181 timer_spkr_release(void)
182 {
183 
184 	if (timer2_state != ACQUIRED)
185 		return (-1);
186 	timer2_state = RELEASED;
187 	outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT);
188 
189 	ppi_spkr_off();		/* disable counter2 output to speaker */
190 	return (0);
191 }
192 
193 void
194 timer_spkr_setfreq(int freq)
195 {
196 
197 	freq = i8254_freq / freq;
198 	mtx_lock_spin(&clock_lock);
199 	outb(TIMER_CNTR2, freq & 0xff);
200 	outb(TIMER_CNTR2, freq >> 8);
201 	mtx_unlock_spin(&clock_lock);
202 }
203 
204 static int
205 getit(void)
206 {
207 	int high, low;
208 
209 	mtx_lock_spin(&clock_lock);
210 
211 	/* Select timer0 and latch counter value. */
212 	outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
213 
214 	low = inb(TIMER_CNTR0);
215 	high = inb(TIMER_CNTR0);
216 
217 	mtx_unlock_spin(&clock_lock);
218 	return ((high << 8) | low);
219 }
220 
221 /*
222  * Wait "n" microseconds.
223  * Relies on timer 1 counting down from (i8254_freq / hz)
224  * Note: timer had better have been programmed before this is first used!
225  */
226 void
227 i8254_delay(int n)
228 {
229 	int delta, prev_tick, tick, ticks_left;
230 #ifdef DELAYDEBUG
231 	int getit_calls = 1;
232 	int n1;
233 	static int state = 0;
234 
235 	if (state == 0) {
236 		state = 1;
237 		for (n1 = 1; n1 <= 10000000; n1 *= 10)
238 			DELAY(n1);
239 		state = 2;
240 	}
241 	if (state == 1)
242 		printf("DELAY(%d)...", n);
243 #endif
244 	/*
245 	 * Read the counter first, so that the rest of the setup overhead is
246 	 * counted.  Guess the initial overhead is 20 usec (on most systems it
247 	 * takes about 1.5 usec for each of the i/o's in getit().  The loop
248 	 * takes about 6 usec on a 486/33 and 13 usec on a 386/20.  The
249 	 * multiplications and divisions to scale the count take a while).
250 	 *
251 	 * However, if ddb is active then use a fake counter since reading
252 	 * the i8254 counter involves acquiring a lock.  ddb must not do
253 	 * locking for many reasons, but it calls here for at least atkbd
254 	 * input.
255 	 */
256 #ifdef KDB
257 	if (kdb_active)
258 		prev_tick = 1;
259 	else
260 #endif
261 		prev_tick = getit();
262 	n -= 0;			/* XXX actually guess no initial overhead */
263 	/*
264 	 * Calculate (n * (i8254_freq / 1e6)) without using floating point
265 	 * and without any avoidable overflows.
266 	 */
267 	if (n <= 0)
268 		ticks_left = 0;
269 	else if (n < 256)
270 		/*
271 		 * Use fixed point to avoid a slow division by 1000000.
272 		 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest.
273 		 * 2^15 is the first power of 2 that gives exact results
274 		 * for n between 0 and 256.
275 		 */
276 		ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15;
277 	else
278 		/*
279 		 * Don't bother using fixed point, although gcc-2.7.2
280 		 * generates particularly poor code for the long long
281 		 * division, since even the slow way will complete long
282 		 * before the delay is up (unless we're interrupted).
283 		 */
284 		ticks_left = ((u_int)n * (long long)i8254_freq + 999999)
285 			     / 1000000;
286 
287 	while (ticks_left > 0) {
288 #ifdef KDB
289 		if (kdb_active) {
290 			inb(0x84);
291 			tick = prev_tick - 1;
292 			if (tick <= 0)
293 				tick = i8254_max_count;
294 		} else
295 #endif
296 			tick = getit();
297 #ifdef DELAYDEBUG
298 		++getit_calls;
299 #endif
300 		delta = prev_tick - tick;
301 		prev_tick = tick;
302 		if (delta < 0) {
303 			delta += i8254_max_count;
304 			/*
305 			 * Guard against i8254_max_count being wrong.
306 			 * This shouldn't happen in normal operation,
307 			 * but it may happen if set_i8254_freq() is
308 			 * traced.
309 			 */
310 			if (delta < 0)
311 				delta = 0;
312 		}
313 		ticks_left -= delta;
314 	}
315 #ifdef DELAYDEBUG
316 	if (state == 1)
317 		printf(" %d calls to getit() at %d usec each\n",
318 		       getit_calls, (n + 5) / getit_calls);
319 #endif
320 }
321 
322 static void
323 set_i8254_freq(int mode, uint32_t period)
324 {
325 	int new_count, new_mode;
326 
327 	mtx_lock_spin(&clock_lock);
328 	if (mode == MODE_STOP) {
329 		if (i8254_timecounter) {
330 			mode = MODE_PERIODIC;
331 			new_count = 0x10000;
332 		} else
333 			new_count = -1;
334 	} else {
335 		new_count = min(((uint64_t)i8254_freq * period +
336 		    0x80000000LLU) >> 32, 0x10000);
337 	}
338 	if (new_count == timer0_period)
339 		goto out;
340 	i8254_max_count = ((new_count & ~0xffff) != 0) ? 0xffff : new_count;
341 	timer0_period = (mode == MODE_PERIODIC) ? new_count : -1;
342 	switch (mode) {
343 	case MODE_STOP:
344 		new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT;
345 		outb(TIMER_MODE, new_mode);
346 		outb(TIMER_CNTR0, 0);
347 		outb(TIMER_CNTR0, 0);
348 		break;
349 	case MODE_PERIODIC:
350 		new_mode = TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT;
351 		outb(TIMER_MODE, new_mode);
352 		outb(TIMER_CNTR0, new_count & 0xff);
353 		outb(TIMER_CNTR0, new_count >> 8);
354 		break;
355 	case MODE_ONESHOT:
356 		if (new_count < 256 && timer0_last < 256) {
357 			new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_LSB;
358 			if (new_mode != timer0_mode)
359 				outb(TIMER_MODE, new_mode);
360 			outb(TIMER_CNTR0, new_count & 0xff);
361 			break;
362 		}
363 		new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT;
364 		if (new_mode != timer0_mode)
365 			outb(TIMER_MODE, new_mode);
366 		outb(TIMER_CNTR0, new_count & 0xff);
367 		outb(TIMER_CNTR0, new_count >> 8);
368 		break;
369 	default:
370 		panic("set_i8254_freq: unknown operational mode");
371 	}
372 	timer0_mode = new_mode;
373 	timer0_last = new_count;
374 out:
375 	mtx_unlock_spin(&clock_lock);
376 }
377 
378 static void
379 i8254_restore(void)
380 {
381 
382 	timer0_period = -2;
383 	timer0_mode = 0xffff;
384 	timer0_last = 0xffff;
385 	if (attimer_sc != NULL)
386 		set_i8254_freq(attimer_sc->mode, attimer_sc->period);
387 	else
388 		set_i8254_freq(MODE_STOP, 0);
389 }
390 
391 #ifndef __amd64__
392 /*
393  * Restore all the timers non-atomically (XXX: should be atomically).
394  *
395  * This function is called from pmtimer_resume() to restore all the timers.
396  * This should not be necessary, but there are broken laptops that do not
397  * restore all the timers on resume. The APM spec was at best vague on the
398  * subject.
399  * pmtimer is used only with the old APM power management, and not with
400  * acpi, which is required for amd64, so skip it in that case.
401  */
402 void
403 timer_restore(void)
404 {
405 
406 	i8254_restore();		/* restore i8254_freq and hz */
407 	atrtc_restore();		/* reenable RTC interrupts */
408 }
409 #endif
410 
411 /* This is separate from startrtclock() so that it can be called early. */
412 void
413 i8254_init(void)
414 {
415 
416 	set_i8254_freq(MODE_STOP, 0);
417 }
418 
419 void
420 startrtclock()
421 {
422 
423 	init_TSC();
424 }
425 
426 void
427 cpu_initclocks(void)
428 {
429 #ifdef EARLY_AP_STARTUP
430 	struct thread *td;
431 	int i;
432 
433 	td = curthread;
434 	cpu_initclocks_bsp();
435 	CPU_FOREACH(i) {
436 		if (i == 0)
437 			continue;
438 		thread_lock(td);
439 		sched_bind(td, i);
440 		thread_unlock(td);
441 		cpu_initclocks_ap();
442 	}
443 	thread_lock(td);
444 	if (sched_is_bound(td))
445 		sched_unbind(td);
446 	thread_unlock(td);
447 #else
448 	cpu_initclocks_bsp();
449 #endif
450 }
451 
452 static int
453 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS)
454 {
455 	int error;
456 	u_int freq;
457 
458 	/*
459 	 * Use `i8254' instead of `timer' in external names because `timer'
460 	 * is too generic.  Should use it everywhere.
461 	 */
462 	freq = i8254_freq;
463 	error = sysctl_handle_int(oidp, &freq, 0, req);
464 	if (error == 0 && req->newptr != NULL) {
465 		i8254_freq = freq;
466 		if (attimer_sc != NULL) {
467 			set_i8254_freq(attimer_sc->mode, attimer_sc->period);
468 			attimer_sc->tc.tc_frequency = freq;
469 		} else {
470 			set_i8254_freq(MODE_STOP, 0);
471 		}
472 	}
473 	return (error);
474 }
475 
476 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, CTLTYPE_INT | CTLFLAG_RW,
477     0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU",
478     "i8254 timer frequency");
479 
480 static unsigned
481 i8254_get_timecount(struct timecounter *tc)
482 {
483 	device_t dev = (device_t)tc->tc_priv;
484 	struct attimer_softc *sc = device_get_softc(dev);
485 	register_t flags;
486 	uint16_t count;
487 	u_int high, low;
488 
489 	if (sc->period == 0)
490 		return (i8254_max_count - getit());
491 
492 #ifdef __amd64__
493 	flags = read_rflags();
494 #else
495 	flags = read_eflags();
496 #endif
497 	mtx_lock_spin(&clock_lock);
498 
499 	/* Select timer0 and latch counter value. */
500 	outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH);
501 
502 	low = inb(TIMER_CNTR0);
503 	high = inb(TIMER_CNTR0);
504 	count = i8254_max_count - ((high << 8) | low);
505 	if (count < i8254_lastcount ||
506 	    (!i8254_ticked && (clkintr_pending ||
507 	    ((count < 20 || (!(flags & PSL_I) &&
508 	    count < i8254_max_count / 2u)) &&
509 	    i8254_pending != NULL && i8254_pending(i8254_intsrc))))) {
510 		i8254_ticked = 1;
511 		i8254_offset += i8254_max_count;
512 	}
513 	i8254_lastcount = count;
514 	count += i8254_offset;
515 	mtx_unlock_spin(&clock_lock);
516 	return (count);
517 }
518 
519 static int
520 attimer_start(struct eventtimer *et, sbintime_t first, sbintime_t period)
521 {
522 	device_t dev = (device_t)et->et_priv;
523 	struct attimer_softc *sc = device_get_softc(dev);
524 
525 	if (period != 0) {
526 		sc->mode = MODE_PERIODIC;
527 		sc->period = period;
528 	} else {
529 		sc->mode = MODE_ONESHOT;
530 		sc->period = first;
531 	}
532 	if (!sc->intr_en) {
533 		i8254_intsrc->is_pic->pic_enable_source(i8254_intsrc);
534 		sc->intr_en = 1;
535 	}
536 	set_i8254_freq(sc->mode, sc->period);
537 	return (0);
538 }
539 
540 static int
541 attimer_stop(struct eventtimer *et)
542 {
543 	device_t dev = (device_t)et->et_priv;
544 	struct attimer_softc *sc = device_get_softc(dev);
545 
546 	sc->mode = MODE_STOP;
547 	sc->period = 0;
548 	set_i8254_freq(sc->mode, sc->period);
549 	return (0);
550 }
551 
552 #ifdef DEV_ISA
553 /*
554  * Attach to the ISA PnP descriptors for the timer
555  */
556 static struct isa_pnp_id attimer_ids[] = {
557 	{ 0x0001d041 /* PNP0100 */, "AT timer" },
558 	{ 0 }
559 };
560 
561 static int
562 attimer_probe(device_t dev)
563 {
564 	int result;
565 
566 	result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids);
567 	/* ENOENT means no PnP-ID, device is hinted. */
568 	if (result == ENOENT) {
569 		device_set_desc(dev, "AT timer");
570 		return (BUS_PROBE_LOW_PRIORITY);
571 	}
572 	return (result);
573 }
574 
575 static int
576 attimer_attach(device_t dev)
577 {
578 	struct attimer_softc *sc;
579 	rman_res_t s;
580 	int i;
581 
582 	attimer_sc = sc = device_get_softc(dev);
583 	bzero(sc, sizeof(struct attimer_softc));
584 	if (!(sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT,
585 	    &sc->port_rid, IO_TIMER1, IO_TIMER1 + 3, 4, RF_ACTIVE)))
586 		device_printf(dev,"Warning: Couldn't map I/O.\n");
587 	i8254_intsrc = intr_lookup_source(0);
588 	if (i8254_intsrc != NULL)
589 		i8254_pending = i8254_intsrc->is_pic->pic_source_pending;
590 	resource_int_value(device_get_name(dev), device_get_unit(dev),
591 	    "timecounter", &i8254_timecounter);
592 	set_i8254_freq(MODE_STOP, 0);
593 	if (i8254_timecounter) {
594 		sc->tc.tc_get_timecount = i8254_get_timecount;
595 		sc->tc.tc_counter_mask = 0xffff;
596 		sc->tc.tc_frequency = i8254_freq;
597 		sc->tc.tc_name = "i8254";
598 		sc->tc.tc_quality = 0;
599 		sc->tc.tc_priv = dev;
600 		tc_init(&sc->tc);
601 	}
602 	if (resource_int_value(device_get_name(dev), device_get_unit(dev),
603 	    "clock", &i) != 0 || i != 0) {
604 	    	sc->intr_rid = 0;
605 		while (bus_get_resource(dev, SYS_RES_IRQ, sc->intr_rid,
606 		    &s, NULL) == 0 && s != 0)
607 			sc->intr_rid++;
608 		if (!(sc->intr_res = bus_alloc_resource(dev, SYS_RES_IRQ,
609 		    &sc->intr_rid, 0, 0, 1, RF_ACTIVE))) {
610 			device_printf(dev,"Can't map interrupt.\n");
611 			return (0);
612 		}
613 		/* Dirty hack, to make bus_setup_intr to not enable source. */
614 		i8254_intsrc->is_handlers++;
615 		if ((bus_setup_intr(dev, sc->intr_res,
616 		    INTR_MPSAFE | INTR_TYPE_CLK,
617 		    (driver_filter_t *)clkintr, NULL,
618 		    sc, &sc->intr_handler))) {
619 			device_printf(dev, "Can't setup interrupt.\n");
620 			i8254_intsrc->is_handlers--;
621 			return (0);
622 		}
623 		i8254_intsrc->is_handlers--;
624 		i8254_intsrc->is_pic->pic_enable_intr(i8254_intsrc);
625 		sc->et.et_name = "i8254";
626 		sc->et.et_flags = ET_FLAGS_PERIODIC;
627 		if (!i8254_timecounter)
628 			sc->et.et_flags |= ET_FLAGS_ONESHOT;
629 		sc->et.et_quality = 100;
630 		sc->et.et_frequency = i8254_freq;
631 		sc->et.et_min_period = (0x0002LLU << 32) / i8254_freq;
632 		sc->et.et_max_period = (0xfffeLLU << 32) / i8254_freq;
633 		sc->et.et_start = attimer_start;
634 		sc->et.et_stop = attimer_stop;
635 		sc->et.et_priv = dev;
636 		et_register(&sc->et);
637 	}
638 	return(0);
639 }
640 
641 static int
642 attimer_resume(device_t dev)
643 {
644 
645 	i8254_restore();
646 	return (0);
647 }
648 
649 static device_method_t attimer_methods[] = {
650 	/* Device interface */
651 	DEVMETHOD(device_probe,		attimer_probe),
652 	DEVMETHOD(device_attach,	attimer_attach),
653 	DEVMETHOD(device_detach,	bus_generic_detach),
654 	DEVMETHOD(device_shutdown,	bus_generic_shutdown),
655 	DEVMETHOD(device_suspend,	bus_generic_suspend),
656 	DEVMETHOD(device_resume,	attimer_resume),
657 	{ 0, 0 }
658 };
659 
660 static driver_t attimer_driver = {
661 	"attimer",
662 	attimer_methods,
663 	sizeof(struct attimer_softc),
664 };
665 
666 static devclass_t attimer_devclass;
667 
668 DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0);
669 DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0);
670 ISA_PNP_INFO(attimer_ids);
671 
672 #endif /* DEV_ISA */
673