1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright (c) 1990 The Regents of the University of California. 5 * Copyright (c) 2010 Alexander Motin <mav@FreeBSD.org> 6 * All rights reserved. 7 * 8 * This code is derived from software contributed to Berkeley by 9 * William Jolitz and Don Ahn. 10 * 11 * Redistribution and use in source and binary forms, with or without 12 * modification, are permitted provided that the following conditions 13 * are met: 14 * 1. Redistributions of source code must retain the above copyright 15 * notice, this list of conditions and the following disclaimer. 16 * 2. Redistributions in binary form must reproduce the above copyright 17 * notice, this list of conditions and the following disclaimer in the 18 * documentation and/or other materials provided with the distribution. 19 * 3. Neither the name of the University nor the names of its contributors 20 * may be used to endorse or promote products derived from this software 21 * without specific prior written permission. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * from: @(#)clock.c 7.2 (Berkeley) 5/12/91 36 */ 37 38 #include <sys/cdefs.h> 39 __FBSDID("$FreeBSD$"); 40 41 /* 42 * Routines to handle clock hardware. 43 */ 44 45 #include "opt_clock.h" 46 #include "opt_isa.h" 47 48 #include <sys/param.h> 49 #include <sys/systm.h> 50 #include <sys/bus.h> 51 #include <sys/lock.h> 52 #include <sys/kdb.h> 53 #include <sys/mutex.h> 54 #include <sys/proc.h> 55 #include <sys/kernel.h> 56 #include <sys/module.h> 57 #include <sys/rman.h> 58 #include <sys/sched.h> 59 #include <sys/smp.h> 60 #include <sys/sysctl.h> 61 #include <sys/timeet.h> 62 #include <sys/timetc.h> 63 64 #include <machine/clock.h> 65 #include <machine/cpu.h> 66 #include <machine/intr_machdep.h> 67 #include <machine/ppireg.h> 68 #include <machine/timerreg.h> 69 #include <x86/apicvar.h> 70 #include <x86/init.h> 71 72 #include <isa/rtc.h> 73 #ifdef DEV_ISA 74 #include <isa/isareg.h> 75 #include <isa/isavar.h> 76 #endif 77 78 int clkintr_pending; 79 #ifndef TIMER_FREQ 80 #define TIMER_FREQ 1193182 81 #endif 82 u_int i8254_freq = TIMER_FREQ; 83 TUNABLE_INT("hw.i8254.freq", &i8254_freq); 84 int i8254_max_count; 85 static int i8254_timecounter = 1; 86 87 static struct mtx clock_lock; 88 static struct intsrc *i8254_intsrc; 89 static uint16_t i8254_lastcount; 90 static uint16_t i8254_offset; 91 static int (*i8254_pending)(struct intsrc *); 92 static int i8254_ticked; 93 94 struct attimer_softc { 95 int intr_en; 96 int port_rid, intr_rid; 97 struct resource *port_res; 98 struct resource *intr_res; 99 void *intr_handler; 100 struct timecounter tc; 101 struct eventtimer et; 102 int mode; 103 #define MODE_STOP 0 104 #define MODE_PERIODIC 1 105 #define MODE_ONESHOT 2 106 uint32_t period; 107 }; 108 static struct attimer_softc *attimer_sc = NULL; 109 110 static int timer0_period = -2; 111 static int timer0_mode = 0xffff; 112 static int timer0_last = 0xffff; 113 114 /* Values for timerX_state: */ 115 #define RELEASED 0 116 #define RELEASE_PENDING 1 117 #define ACQUIRED 2 118 #define ACQUIRE_PENDING 3 119 120 static u_char timer2_state; 121 122 static unsigned i8254_get_timecount(struct timecounter *tc); 123 static void set_i8254_freq(int mode, uint32_t period); 124 125 void 126 clock_init(void) 127 { 128 /* Init the clock lock */ 129 mtx_init(&clock_lock, "clk", NULL, MTX_SPIN | MTX_NOPROFILE); 130 /* Init the clock in order to use DELAY */ 131 init_ops.early_clock_source_init(); 132 } 133 134 static int 135 clkintr(void *arg) 136 { 137 struct attimer_softc *sc = (struct attimer_softc *)arg; 138 139 if (i8254_timecounter && sc->period != 0) { 140 mtx_lock_spin(&clock_lock); 141 if (i8254_ticked) 142 i8254_ticked = 0; 143 else { 144 i8254_offset += i8254_max_count; 145 i8254_lastcount = 0; 146 } 147 clkintr_pending = 0; 148 mtx_unlock_spin(&clock_lock); 149 } 150 151 if (sc->et.et_active && sc->mode != MODE_STOP) 152 sc->et.et_event_cb(&sc->et, sc->et.et_arg); 153 154 return (FILTER_HANDLED); 155 } 156 157 int 158 timer_spkr_acquire(void) 159 { 160 int mode; 161 162 mode = TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT; 163 164 if (timer2_state != RELEASED) 165 return (-1); 166 timer2_state = ACQUIRED; 167 168 /* 169 * This access to the timer registers is as atomic as possible 170 * because it is a single instruction. We could do better if we 171 * knew the rate. Use of splclock() limits glitches to 10-100us, 172 * and this is probably good enough for timer2, so we aren't as 173 * careful with it as with timer0. 174 */ 175 outb(TIMER_MODE, TIMER_SEL2 | (mode & 0x3f)); 176 177 ppi_spkr_on(); /* enable counter2 output to speaker */ 178 return (0); 179 } 180 181 int 182 timer_spkr_release(void) 183 { 184 185 if (timer2_state != ACQUIRED) 186 return (-1); 187 timer2_state = RELEASED; 188 outb(TIMER_MODE, TIMER_SEL2 | TIMER_SQWAVE | TIMER_16BIT); 189 190 ppi_spkr_off(); /* disable counter2 output to speaker */ 191 return (0); 192 } 193 194 void 195 timer_spkr_setfreq(int freq) 196 { 197 198 freq = i8254_freq / freq; 199 mtx_lock_spin(&clock_lock); 200 outb(TIMER_CNTR2, freq & 0xff); 201 outb(TIMER_CNTR2, freq >> 8); 202 mtx_unlock_spin(&clock_lock); 203 } 204 205 static int 206 getit(void) 207 { 208 int high, low; 209 210 mtx_lock_spin(&clock_lock); 211 212 /* Select timer0 and latch counter value. */ 213 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 214 215 low = inb(TIMER_CNTR0); 216 high = inb(TIMER_CNTR0); 217 218 mtx_unlock_spin(&clock_lock); 219 return ((high << 8) | low); 220 } 221 222 /* 223 * Wait "n" microseconds. 224 * Relies on timer 1 counting down from (i8254_freq / hz) 225 * Note: timer had better have been programmed before this is first used! 226 */ 227 void 228 i8254_delay(int n) 229 { 230 int delta, prev_tick, tick, ticks_left; 231 #ifdef DELAYDEBUG 232 int getit_calls = 1; 233 int n1; 234 static int state = 0; 235 236 if (state == 0) { 237 state = 1; 238 for (n1 = 1; n1 <= 10000000; n1 *= 10) 239 DELAY(n1); 240 state = 2; 241 } 242 if (state == 1) 243 printf("DELAY(%d)...", n); 244 #endif 245 /* 246 * Read the counter first, so that the rest of the setup overhead is 247 * counted. Guess the initial overhead is 20 usec (on most systems it 248 * takes about 1.5 usec for each of the i/o's in getit(). The loop 249 * takes about 6 usec on a 486/33 and 13 usec on a 386/20. The 250 * multiplications and divisions to scale the count take a while). 251 * 252 * However, if ddb is active then use a fake counter since reading 253 * the i8254 counter involves acquiring a lock. ddb must not do 254 * locking for many reasons, but it calls here for at least atkbd 255 * input. 256 */ 257 #ifdef KDB 258 if (kdb_active) 259 prev_tick = 1; 260 else 261 #endif 262 prev_tick = getit(); 263 n -= 0; /* XXX actually guess no initial overhead */ 264 /* 265 * Calculate (n * (i8254_freq / 1e6)) without using floating point 266 * and without any avoidable overflows. 267 */ 268 if (n <= 0) 269 ticks_left = 0; 270 else if (n < 256) 271 /* 272 * Use fixed point to avoid a slow division by 1000000. 273 * 39099 = 1193182 * 2^15 / 10^6 rounded to nearest. 274 * 2^15 is the first power of 2 that gives exact results 275 * for n between 0 and 256. 276 */ 277 ticks_left = ((u_int)n * 39099 + (1 << 15) - 1) >> 15; 278 else 279 /* 280 * Don't bother using fixed point, although gcc-2.7.2 281 * generates particularly poor code for the long long 282 * division, since even the slow way will complete long 283 * before the delay is up (unless we're interrupted). 284 */ 285 ticks_left = ((u_int)n * (long long)i8254_freq + 999999) 286 / 1000000; 287 288 while (ticks_left > 0) { 289 #ifdef KDB 290 if (kdb_active) { 291 inb(0x84); 292 tick = prev_tick - 1; 293 if (tick <= 0) 294 tick = i8254_max_count; 295 } else 296 #endif 297 tick = getit(); 298 #ifdef DELAYDEBUG 299 ++getit_calls; 300 #endif 301 delta = prev_tick - tick; 302 prev_tick = tick; 303 if (delta < 0) { 304 delta += i8254_max_count; 305 /* 306 * Guard against i8254_max_count being wrong. 307 * This shouldn't happen in normal operation, 308 * but it may happen if set_i8254_freq() is 309 * traced. 310 */ 311 if (delta < 0) 312 delta = 0; 313 } 314 ticks_left -= delta; 315 } 316 #ifdef DELAYDEBUG 317 if (state == 1) 318 printf(" %d calls to getit() at %d usec each\n", 319 getit_calls, (n + 5) / getit_calls); 320 #endif 321 } 322 323 static void 324 set_i8254_freq(int mode, uint32_t period) 325 { 326 int new_count, new_mode; 327 328 mtx_lock_spin(&clock_lock); 329 if (mode == MODE_STOP) { 330 if (i8254_timecounter) { 331 mode = MODE_PERIODIC; 332 new_count = 0x10000; 333 } else 334 new_count = -1; 335 } else { 336 new_count = min(((uint64_t)i8254_freq * period + 337 0x80000000LLU) >> 32, 0x10000); 338 } 339 if (new_count == timer0_period) 340 goto out; 341 i8254_max_count = ((new_count & ~0xffff) != 0) ? 0xffff : new_count; 342 timer0_period = (mode == MODE_PERIODIC) ? new_count : -1; 343 switch (mode) { 344 case MODE_STOP: 345 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT; 346 outb(TIMER_MODE, new_mode); 347 outb(TIMER_CNTR0, 0); 348 outb(TIMER_CNTR0, 0); 349 break; 350 case MODE_PERIODIC: 351 new_mode = TIMER_SEL0 | TIMER_RATEGEN | TIMER_16BIT; 352 outb(TIMER_MODE, new_mode); 353 outb(TIMER_CNTR0, new_count & 0xff); 354 outb(TIMER_CNTR0, new_count >> 8); 355 break; 356 case MODE_ONESHOT: 357 if (new_count < 256 && timer0_last < 256) { 358 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_LSB; 359 if (new_mode != timer0_mode) 360 outb(TIMER_MODE, new_mode); 361 outb(TIMER_CNTR0, new_count & 0xff); 362 break; 363 } 364 new_mode = TIMER_SEL0 | TIMER_INTTC | TIMER_16BIT; 365 if (new_mode != timer0_mode) 366 outb(TIMER_MODE, new_mode); 367 outb(TIMER_CNTR0, new_count & 0xff); 368 outb(TIMER_CNTR0, new_count >> 8); 369 break; 370 default: 371 panic("set_i8254_freq: unknown operational mode"); 372 } 373 timer0_mode = new_mode; 374 timer0_last = new_count; 375 out: 376 mtx_unlock_spin(&clock_lock); 377 } 378 379 static void 380 i8254_restore(void) 381 { 382 383 timer0_period = -2; 384 timer0_mode = 0xffff; 385 timer0_last = 0xffff; 386 if (attimer_sc != NULL) 387 set_i8254_freq(attimer_sc->mode, attimer_sc->period); 388 else 389 set_i8254_freq(MODE_STOP, 0); 390 } 391 392 /* This is separate from startrtclock() so that it can be called early. */ 393 void 394 i8254_init(void) 395 { 396 397 set_i8254_freq(MODE_STOP, 0); 398 } 399 400 void 401 startrtclock() 402 { 403 404 init_TSC(); 405 } 406 407 void 408 cpu_initclocks(void) 409 { 410 #ifdef EARLY_AP_STARTUP 411 struct thread *td; 412 int i; 413 414 td = curthread; 415 416 tsc_calibrate(); 417 lapic_calibrate_timer(); 418 cpu_initclocks_bsp(); 419 CPU_FOREACH(i) { 420 if (i == 0) 421 continue; 422 thread_lock(td); 423 sched_bind(td, i); 424 thread_unlock(td); 425 cpu_initclocks_ap(); 426 } 427 thread_lock(td); 428 if (sched_is_bound(td)) 429 sched_unbind(td); 430 thread_unlock(td); 431 #else 432 tsc_calibrate(); 433 lapic_calibrate_timer(); 434 cpu_initclocks_bsp(); 435 #endif 436 } 437 438 static int 439 sysctl_machdep_i8254_freq(SYSCTL_HANDLER_ARGS) 440 { 441 int error; 442 u_int freq; 443 444 /* 445 * Use `i8254' instead of `timer' in external names because `timer' 446 * is too generic. Should use it everywhere. 447 */ 448 freq = i8254_freq; 449 error = sysctl_handle_int(oidp, &freq, 0, req); 450 if (error == 0 && req->newptr != NULL) { 451 i8254_freq = freq; 452 if (attimer_sc != NULL) { 453 set_i8254_freq(attimer_sc->mode, attimer_sc->period); 454 attimer_sc->tc.tc_frequency = freq; 455 } else { 456 set_i8254_freq(MODE_STOP, 0); 457 } 458 } 459 return (error); 460 } 461 462 SYSCTL_PROC(_machdep, OID_AUTO, i8254_freq, 463 CTLTYPE_INT | CTLFLAG_RW | CTLFLAG_MPSAFE, 464 0, sizeof(u_int), sysctl_machdep_i8254_freq, "IU", 465 "i8254 timer frequency"); 466 467 static unsigned 468 i8254_get_timecount(struct timecounter *tc) 469 { 470 device_t dev = (device_t)tc->tc_priv; 471 struct attimer_softc *sc = device_get_softc(dev); 472 register_t flags; 473 uint16_t count; 474 u_int high, low; 475 476 if (sc->period == 0) 477 return (i8254_max_count - getit()); 478 479 #ifdef __amd64__ 480 flags = read_rflags(); 481 #else 482 flags = read_eflags(); 483 #endif 484 mtx_lock_spin(&clock_lock); 485 486 /* Select timer0 and latch counter value. */ 487 outb(TIMER_MODE, TIMER_SEL0 | TIMER_LATCH); 488 489 low = inb(TIMER_CNTR0); 490 high = inb(TIMER_CNTR0); 491 count = i8254_max_count - ((high << 8) | low); 492 if (count < i8254_lastcount || 493 (!i8254_ticked && (clkintr_pending || 494 ((count < 20 || (!(flags & PSL_I) && 495 count < i8254_max_count / 2u)) && 496 i8254_pending != NULL && i8254_pending(i8254_intsrc))))) { 497 i8254_ticked = 1; 498 i8254_offset += i8254_max_count; 499 } 500 i8254_lastcount = count; 501 count += i8254_offset; 502 mtx_unlock_spin(&clock_lock); 503 return (count); 504 } 505 506 static int 507 attimer_start(struct eventtimer *et, sbintime_t first, sbintime_t period) 508 { 509 device_t dev = (device_t)et->et_priv; 510 struct attimer_softc *sc = device_get_softc(dev); 511 512 if (period != 0) { 513 sc->mode = MODE_PERIODIC; 514 sc->period = period; 515 } else { 516 sc->mode = MODE_ONESHOT; 517 sc->period = first; 518 } 519 if (!sc->intr_en) { 520 i8254_intsrc->is_pic->pic_enable_source(i8254_intsrc); 521 sc->intr_en = 1; 522 } 523 set_i8254_freq(sc->mode, sc->period); 524 return (0); 525 } 526 527 static int 528 attimer_stop(struct eventtimer *et) 529 { 530 device_t dev = (device_t)et->et_priv; 531 struct attimer_softc *sc = device_get_softc(dev); 532 533 sc->mode = MODE_STOP; 534 sc->period = 0; 535 set_i8254_freq(sc->mode, sc->period); 536 return (0); 537 } 538 539 #ifdef DEV_ISA 540 /* 541 * Attach to the ISA PnP descriptors for the timer 542 */ 543 static struct isa_pnp_id attimer_ids[] = { 544 { 0x0001d041 /* PNP0100 */, "AT timer" }, 545 { 0 } 546 }; 547 548 static int 549 attimer_probe(device_t dev) 550 { 551 int result; 552 553 result = ISA_PNP_PROBE(device_get_parent(dev), dev, attimer_ids); 554 /* ENOENT means no PnP-ID, device is hinted. */ 555 if (result == ENOENT) { 556 device_set_desc(dev, "AT timer"); 557 return (BUS_PROBE_LOW_PRIORITY); 558 } 559 return (result); 560 } 561 562 static int 563 attimer_attach(device_t dev) 564 { 565 struct attimer_softc *sc; 566 rman_res_t s; 567 int i; 568 569 attimer_sc = sc = device_get_softc(dev); 570 bzero(sc, sizeof(struct attimer_softc)); 571 if (!(sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, 572 &sc->port_rid, IO_TIMER1, IO_TIMER1 + 3, 4, RF_ACTIVE))) 573 device_printf(dev,"Warning: Couldn't map I/O.\n"); 574 i8254_intsrc = intr_lookup_source(0); 575 if (i8254_intsrc != NULL) 576 i8254_pending = i8254_intsrc->is_pic->pic_source_pending; 577 resource_int_value(device_get_name(dev), device_get_unit(dev), 578 "timecounter", &i8254_timecounter); 579 set_i8254_freq(MODE_STOP, 0); 580 if (i8254_timecounter) { 581 sc->tc.tc_get_timecount = i8254_get_timecount; 582 sc->tc.tc_counter_mask = 0xffff; 583 sc->tc.tc_frequency = i8254_freq; 584 sc->tc.tc_name = "i8254"; 585 sc->tc.tc_quality = 0; 586 sc->tc.tc_priv = dev; 587 tc_init(&sc->tc); 588 } 589 if (resource_int_value(device_get_name(dev), device_get_unit(dev), 590 "clock", &i) != 0 || i != 0) { 591 sc->intr_rid = 0; 592 while (bus_get_resource(dev, SYS_RES_IRQ, sc->intr_rid, 593 &s, NULL) == 0 && s != 0) 594 sc->intr_rid++; 595 if (!(sc->intr_res = bus_alloc_resource(dev, SYS_RES_IRQ, 596 &sc->intr_rid, 0, 0, 1, RF_ACTIVE))) { 597 device_printf(dev,"Can't map interrupt.\n"); 598 return (0); 599 } 600 /* Dirty hack, to make bus_setup_intr to not enable source. */ 601 i8254_intsrc->is_handlers++; 602 if ((bus_setup_intr(dev, sc->intr_res, 603 INTR_MPSAFE | INTR_TYPE_CLK, 604 (driver_filter_t *)clkintr, NULL, 605 sc, &sc->intr_handler))) { 606 device_printf(dev, "Can't setup interrupt.\n"); 607 i8254_intsrc->is_handlers--; 608 return (0); 609 } 610 i8254_intsrc->is_handlers--; 611 i8254_intsrc->is_pic->pic_enable_intr(i8254_intsrc); 612 sc->et.et_name = "i8254"; 613 sc->et.et_flags = ET_FLAGS_PERIODIC; 614 if (!i8254_timecounter) 615 sc->et.et_flags |= ET_FLAGS_ONESHOT; 616 sc->et.et_quality = 100; 617 sc->et.et_frequency = i8254_freq; 618 sc->et.et_min_period = (0x0002LLU << 32) / i8254_freq; 619 sc->et.et_max_period = (0xfffeLLU << 32) / i8254_freq; 620 sc->et.et_start = attimer_start; 621 sc->et.et_stop = attimer_stop; 622 sc->et.et_priv = dev; 623 et_register(&sc->et); 624 } 625 return(0); 626 } 627 628 static int 629 attimer_resume(device_t dev) 630 { 631 632 i8254_restore(); 633 return (0); 634 } 635 636 static device_method_t attimer_methods[] = { 637 /* Device interface */ 638 DEVMETHOD(device_probe, attimer_probe), 639 DEVMETHOD(device_attach, attimer_attach), 640 DEVMETHOD(device_detach, bus_generic_detach), 641 DEVMETHOD(device_shutdown, bus_generic_shutdown), 642 DEVMETHOD(device_suspend, bus_generic_suspend), 643 DEVMETHOD(device_resume, attimer_resume), 644 { 0, 0 } 645 }; 646 647 static driver_t attimer_driver = { 648 "attimer", 649 attimer_methods, 650 sizeof(struct attimer_softc), 651 }; 652 653 static devclass_t attimer_devclass; 654 655 DRIVER_MODULE(attimer, isa, attimer_driver, attimer_devclass, 0, 0); 656 DRIVER_MODULE(attimer, acpi, attimer_driver, attimer_devclass, 0, 0); 657 ISA_PNP_INFO(attimer_ids); 658 659 #endif /* DEV_ISA */ 660