xref: /freebsd/sys/x86/include/x86_var.h (revision d0b2dbfa0ecf2bbc9709efc5e20baf8e4b44bbbf)
1 /*-
2  * Copyright (c) 1995 Bruce D. Evans.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  * 3. Neither the name of the author nor the names of contributors
14  *    may be used to endorse or promote products derived from this software
15  *    without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
18  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
19  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
20  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
21  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
22  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
23  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
24  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
25  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
26  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
27  * SUCH DAMAGE.
28  */
29 
30 #ifndef _X86_X86_VAR_H_
31 #define	_X86_X86_VAR_H_
32 
33 /*
34  * Miscellaneous machine-dependent declarations.
35  */
36 
37 extern	long	Maxmem;
38 extern	u_int	basemem;
39 extern	u_int	cpu_exthigh;
40 extern	u_int	cpu_feature;
41 extern	u_int	cpu_feature2;
42 extern	u_int	amd_feature;
43 extern	u_int	amd_feature2;
44 extern	u_int	amd_rascap;
45 extern	u_int	amd_pminfo;
46 extern	u_int	amd_extended_feature_extensions;
47 extern	u_int	via_feature_rng;
48 extern	u_int	via_feature_xcrypt;
49 extern	u_int	cpu_clflush_line_size;
50 extern	u_int	cpu_stdext_feature;
51 extern	u_int	cpu_stdext_feature2;
52 extern	u_int	cpu_stdext_feature3;
53 extern	uint64_t cpu_ia32_arch_caps;
54 extern	u_int	cpu_high;
55 extern	u_int	cpu_id;
56 extern	u_int	cpu_max_ext_state_size;
57 extern	u_int	cpu_mxcsr_mask;
58 extern	u_int	cpu_procinfo;
59 extern	u_int	cpu_procinfo2;
60 extern	char	cpu_vendor[];
61 extern	u_int	cpu_vendor_id;
62 extern	u_int	cpu_mon_mwait_flags;
63 extern	u_int	cpu_mon_min_size;
64 extern	u_int	cpu_mon_max_size;
65 extern	u_int	cpu_maxphyaddr;
66 extern	u_int	cpu_power_eax;
67 extern	u_int	cpu_power_ebx;
68 extern	u_int	cpu_power_ecx;
69 extern	u_int	cpu_power_edx;
70 extern	u_int	hv_base;
71 extern	u_int	hv_high;
72 extern	char	hv_vendor[];
73 extern	char	kstack[];
74 extern	char	sigcode[];
75 extern	int	szsigcode;
76 extern	int	workaround_erratum383;
77 extern	int	_udatasel;
78 extern	int	_ucodesel;
79 extern	int	_ucode32sel;
80 extern	int	_ufssel;
81 extern	int	_ugssel;
82 extern	int	use_xsave;
83 extern	uint64_t xsave_mask;
84 extern	u_int	max_apic_id;
85 extern	int	i386_read_exec;
86 extern	int	pti;
87 extern	int	hw_ibrs_ibpb_active;
88 extern	int	hw_mds_disable;
89 extern	int	hw_ssb_active;
90 extern	int	x86_taa_enable;
91 extern	int	cpu_flush_rsb_ctxsw;
92 extern	int	x86_rngds_mitg_enable;
93 extern	int	cpu_amdc1e_bug;
94 extern	char	bootmethod[16];
95 
96 struct	pcb;
97 struct	thread;
98 struct	reg;
99 struct	fpreg;
100 struct  dbreg;
101 struct	dumperinfo;
102 struct	trapframe;
103 struct	minidumpstate;
104 
105 /*
106  * The interface type of the interrupt handler entry point cannot be
107  * expressed in C.  Use simplest non-variadic function type as an
108  * approximation.
109  */
110 typedef void alias_for_inthand_t(void);
111 
112 bool	acpi_get_fadt_bootflags(uint16_t *flagsp);
113 void	*alloc_fpusave(int flags);
114 u_int	cpu_auxmsr(void);
115 vm_paddr_t cpu_getmaxphyaddr(void);
116 bool	cpu_mwait_usable(void);
117 void	cpu_probe_amdc1e(void);
118 void	cpu_setregs(void);
119 int	dbreg_set_watchpoint(vm_offset_t addr, vm_size_t size, int access);
120 int	dbreg_clr_watchpoint(vm_offset_t addr, vm_size_t size);
121 void	dbreg_list_watchpoints(void);
122 void	x86_clear_dbregs(struct pcb *pcb);
123 bool	disable_wp(void);
124 void	restore_wp(bool old_wp);
125 void	finishidentcpu(void);
126 void	identify_cpu1(void);
127 void	identify_cpu2(void);
128 void	identify_cpu_ext_features(void);
129 void	identify_cpu_fixup_bsp(void);
130 void	identify_hypervisor(void);
131 void	initializecpu(void);
132 void	initializecpucache(void);
133 bool	fix_cpuid(void);
134 void	fillw(int /*u_short*/ pat, void *base, size_t cnt);
135 int	isa_nmi(int cd);
136 void	handle_ibrs_entry(void);
137 void	handle_ibrs_exit(void);
138 void	hw_ibrs_recalculate(bool all_cpus);
139 void	hw_mds_recalculate(void);
140 void	hw_ssb_recalculate(bool all_cpus);
141 void	x86_taa_recalculate(void);
142 void	x86_rngds_mitg_recalculate(bool all_cpus);
143 void	nmi_call_kdb(u_int cpu, u_int type, struct trapframe *frame);
144 void	nmi_call_kdb_smp(u_int type, struct trapframe *frame);
145 void	nmi_handle_intr(u_int type, struct trapframe *frame);
146 void	pagecopy(void *from, void *to);
147 void	printcpuinfo(void);
148 int	pti_get_default(void);
149 int	user_dbreg_trap(register_t dr6);
150 int	cpu_minidumpsys(struct dumperinfo *, const struct minidumpstate *);
151 struct pcb *get_pcb_td(struct thread *td);
152 void	x86_set_fork_retval(struct thread *td);
153 uint64_t rdtsc_ordered(void);
154 
155 /*
156  * MSR ops for x86_msr_op()
157  */
158 #define	MSR_OP_ANDNOT		0x00000001
159 #define	MSR_OP_OR		0x00000002
160 #define	MSR_OP_WRITE		0x00000003
161 #define	MSR_OP_READ		0x00000004
162 
163 /*
164  * Where and which execution mode
165  */
166 #define	MSR_OP_LOCAL		0x10000000
167 #define	MSR_OP_SCHED_ALL	0x20000000
168 #define	MSR_OP_SCHED_ONE	0x30000000
169 #define	MSR_OP_RENDEZVOUS_ALL	0x40000000
170 #define	MSR_OP_RENDEZVOUS_ONE	0x50000000
171 #define	MSR_OP_CPUID(id)	((id) << 8)
172 
173 void x86_msr_op(u_int msr, u_int op, uint64_t arg1, uint64_t *res);
174 
175 #if defined(__i386__) && defined(INVARIANTS)
176 void	trap_check_kstack(void);
177 #else
178 #define	trap_check_kstack()
179 #endif
180 
181 #endif
182