xref: /freebsd/sys/x86/include/x86_ieeefp.h (revision 29363fb446372cb3f10bc98664e9767c53fbb457)
1*2a9b4076SNagaChaitanya Vellanki /*-
2*2a9b4076SNagaChaitanya Vellanki  * SPDX-License-Identifier: BSD-4-Clause
3*2a9b4076SNagaChaitanya Vellanki  *
4*2a9b4076SNagaChaitanya Vellanki  * Copyright (c) 2003 Peter Wemm.
5*2a9b4076SNagaChaitanya Vellanki  * Copyright (c) 1990 Andrew Moore, Talke Studio
6*2a9b4076SNagaChaitanya Vellanki  * All rights reserved.
7*2a9b4076SNagaChaitanya Vellanki  *
8*2a9b4076SNagaChaitanya Vellanki  * Redistribution and use in source and binary forms, with or without
9*2a9b4076SNagaChaitanya Vellanki  * modification, are permitted provided that the following conditions
10*2a9b4076SNagaChaitanya Vellanki  * are met:
11*2a9b4076SNagaChaitanya Vellanki  * 1. Redistributions of source code must retain the above copyright
12*2a9b4076SNagaChaitanya Vellanki  *    notice, this list of conditions and the following disclaimer.
13*2a9b4076SNagaChaitanya Vellanki  * 2. Redistributions in binary form must reproduce the above copyright
14*2a9b4076SNagaChaitanya Vellanki  *    notice, this list of conditions and the following disclaimer in the
15*2a9b4076SNagaChaitanya Vellanki  *    documentation and/or other materials provided with the distribution.
16*2a9b4076SNagaChaitanya Vellanki  * 3. All advertising materials mentioning features or use of this software
17*2a9b4076SNagaChaitanya Vellanki  *    must display the following acknowledgement:
18*2a9b4076SNagaChaitanya Vellanki  *	This product includes software developed by the University of
19*2a9b4076SNagaChaitanya Vellanki  *	California, Berkeley and its contributors.
20*2a9b4076SNagaChaitanya Vellanki  * 4. Neither the name of the University nor the names of its contributors
21*2a9b4076SNagaChaitanya Vellanki  *    may be used to endorse or promote products derived from this software
22*2a9b4076SNagaChaitanya Vellanki  *    without specific prior written permission.
23*2a9b4076SNagaChaitanya Vellanki  *
24*2a9b4076SNagaChaitanya Vellanki  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
25*2a9b4076SNagaChaitanya Vellanki  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
26*2a9b4076SNagaChaitanya Vellanki  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
27*2a9b4076SNagaChaitanya Vellanki  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
28*2a9b4076SNagaChaitanya Vellanki  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
29*2a9b4076SNagaChaitanya Vellanki  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
30*2a9b4076SNagaChaitanya Vellanki  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
31*2a9b4076SNagaChaitanya Vellanki  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
32*2a9b4076SNagaChaitanya Vellanki  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
33*2a9b4076SNagaChaitanya Vellanki  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
34*2a9b4076SNagaChaitanya Vellanki  * SUCH DAMAGE.
35*2a9b4076SNagaChaitanya Vellanki  */
36*2a9b4076SNagaChaitanya Vellanki 
37*2a9b4076SNagaChaitanya Vellanki #ifndef _X86_X86_IEEEFP_H_
38*2a9b4076SNagaChaitanya Vellanki #define _X86_X86_IEEEFP_H_
39*2a9b4076SNagaChaitanya Vellanki 
40*2a9b4076SNagaChaitanya Vellanki /* Deprecated historical FPU control interface */
41*2a9b4076SNagaChaitanya Vellanki 
42*2a9b4076SNagaChaitanya Vellanki /*
43*2a9b4076SNagaChaitanya Vellanki  * IEEE floating point type, constant and function definitions.
44*2a9b4076SNagaChaitanya Vellanki  * XXX: {FP,SSE}*FLD and {FP,SSE}*OFF are undocumented pollution.
45*2a9b4076SNagaChaitanya Vellanki  */
46*2a9b4076SNagaChaitanya Vellanki 
47*2a9b4076SNagaChaitanya Vellanki /*
48*2a9b4076SNagaChaitanya Vellanki  * Rounding modes.
49*2a9b4076SNagaChaitanya Vellanki  */
50*2a9b4076SNagaChaitanya Vellanki typedef enum {
51*2a9b4076SNagaChaitanya Vellanki 	FP_RN=0,	/* round to nearest */
52*2a9b4076SNagaChaitanya Vellanki 	FP_RM,		/* round down towards minus infinity */
53*2a9b4076SNagaChaitanya Vellanki 	FP_RP,		/* round up towards plus infinity */
54*2a9b4076SNagaChaitanya Vellanki 	FP_RZ		/* truncate */
55*2a9b4076SNagaChaitanya Vellanki } fp_rnd_t;
56*2a9b4076SNagaChaitanya Vellanki 
57*2a9b4076SNagaChaitanya Vellanki /*
58*2a9b4076SNagaChaitanya Vellanki  * Precision (i.e., rounding precision) modes.
59*2a9b4076SNagaChaitanya Vellanki  */
60*2a9b4076SNagaChaitanya Vellanki typedef enum {
61*2a9b4076SNagaChaitanya Vellanki 	FP_PS=0,	/* 24 bit (single-precision) */
62*2a9b4076SNagaChaitanya Vellanki 	FP_PRS,		/* reserved */
63*2a9b4076SNagaChaitanya Vellanki 	FP_PD,		/* 53 bit (double-precision) */
64*2a9b4076SNagaChaitanya Vellanki 	FP_PE		/* 64 bit (extended-precision) */
65*2a9b4076SNagaChaitanya Vellanki } fp_prec_t;
66*2a9b4076SNagaChaitanya Vellanki 
67*2a9b4076SNagaChaitanya Vellanki #define fp_except_t	int
68*2a9b4076SNagaChaitanya Vellanki 
69*2a9b4076SNagaChaitanya Vellanki /*
70*2a9b4076SNagaChaitanya Vellanki  * Exception bit masks.
71*2a9b4076SNagaChaitanya Vellanki  */
72*2a9b4076SNagaChaitanya Vellanki #define FP_X_INV	0x01	/* invalid operation */
73*2a9b4076SNagaChaitanya Vellanki #define FP_X_DNML	0x02	/* denormal */
74*2a9b4076SNagaChaitanya Vellanki #define FP_X_DZ		0x04	/* zero divide */
75*2a9b4076SNagaChaitanya Vellanki #define FP_X_OFL	0x08	/* overflow */
76*2a9b4076SNagaChaitanya Vellanki #define FP_X_UFL	0x10	/* underflow */
77*2a9b4076SNagaChaitanya Vellanki #define FP_X_IMP	0x20	/* (im)precision */
78*2a9b4076SNagaChaitanya Vellanki #define FP_X_STK	0x40	/* stack fault */
79*2a9b4076SNagaChaitanya Vellanki 
80*2a9b4076SNagaChaitanya Vellanki /*
81*2a9b4076SNagaChaitanya Vellanki  * FPU control word bit-field masks.
82*2a9b4076SNagaChaitanya Vellanki  */
83*2a9b4076SNagaChaitanya Vellanki #define FP_MSKS_FLD	0x3f	/* exception masks field */
84*2a9b4076SNagaChaitanya Vellanki #define FP_PRC_FLD	0x300	/* precision control field */
85*2a9b4076SNagaChaitanya Vellanki #define	FP_RND_FLD	0xc00	/* rounding control field */
86*2a9b4076SNagaChaitanya Vellanki 
87*2a9b4076SNagaChaitanya Vellanki /*
88*2a9b4076SNagaChaitanya Vellanki  * FPU status word bit-field masks.
89*2a9b4076SNagaChaitanya Vellanki  */
90*2a9b4076SNagaChaitanya Vellanki #define FP_STKY_FLD	0x3f	/* sticky flags field */
91*2a9b4076SNagaChaitanya Vellanki 
92*2a9b4076SNagaChaitanya Vellanki /*
93*2a9b4076SNagaChaitanya Vellanki  * FPU control word bit-field offsets (shift counts).
94*2a9b4076SNagaChaitanya Vellanki  */
95*2a9b4076SNagaChaitanya Vellanki #define FP_MSKS_OFF	0	/* exception masks offset */
96*2a9b4076SNagaChaitanya Vellanki #define FP_PRC_OFF	8	/* precision control offset */
97*2a9b4076SNagaChaitanya Vellanki #define	FP_RND_OFF	10	/* rounding control offset */
98*2a9b4076SNagaChaitanya Vellanki 
99*2a9b4076SNagaChaitanya Vellanki /*
100*2a9b4076SNagaChaitanya Vellanki  * FPU status word bit-field offsets (shift counts).
101*2a9b4076SNagaChaitanya Vellanki  */
102*2a9b4076SNagaChaitanya Vellanki #define FP_STKY_OFF	0	/* sticky flags offset */
103*2a9b4076SNagaChaitanya Vellanki 
104*2a9b4076SNagaChaitanya Vellanki #define	__fldcw(addr)	__asm __volatile("fldcw %0" : : "m" (*(addr)))
105*2a9b4076SNagaChaitanya Vellanki #define	__fldenv(addr)	__asm __volatile("fldenv %0" : : "m" (*(addr)))
106*2a9b4076SNagaChaitanya Vellanki #define	__fnclex()	__asm __volatile("fnclex")
107*2a9b4076SNagaChaitanya Vellanki #define	__fnstcw(addr)	__asm __volatile("fnstcw %0" : "=m" (*(addr)))
108*2a9b4076SNagaChaitanya Vellanki #define	__fnstenv(addr)	__asm __volatile("fnstenv %0" : "=m" (*(addr)))
109*2a9b4076SNagaChaitanya Vellanki #define	__fnstsw(addr)	__asm __volatile("fnstsw %0" : "=m" (*(addr)))
110*2a9b4076SNagaChaitanya Vellanki #define	__ldmxcsr(addr)	__asm __volatile("ldmxcsr %0" : : "m" (*(addr)))
111*2a9b4076SNagaChaitanya Vellanki #define	__stmxcsr(addr)	__asm __volatile("stmxcsr %0" : "=m" (*(addr)))
112*2a9b4076SNagaChaitanya Vellanki 
113*2a9b4076SNagaChaitanya Vellanki /*
114*2a9b4076SNagaChaitanya Vellanki  * Load the control word.  Be careful not to trap if there is a currently
115*2a9b4076SNagaChaitanya Vellanki  * unmasked exception (ones that will become freshly unmasked are not a
116*2a9b4076SNagaChaitanya Vellanki  * problem).  This case must be handled by a save/restore of the
117*2a9b4076SNagaChaitanya Vellanki  * environment or even of the full x87 state.  Accessing the environment
118*2a9b4076SNagaChaitanya Vellanki  * is very inefficient, so only do it when necessary.
119*2a9b4076SNagaChaitanya Vellanki  */
120*2a9b4076SNagaChaitanya Vellanki static __inline void
__fnldcw(unsigned short _cw,unsigned short _newcw)121*2a9b4076SNagaChaitanya Vellanki __fnldcw(unsigned short _cw, unsigned short _newcw)
122*2a9b4076SNagaChaitanya Vellanki {
123*2a9b4076SNagaChaitanya Vellanki 	struct {
124*2a9b4076SNagaChaitanya Vellanki 		unsigned _cw;
125*2a9b4076SNagaChaitanya Vellanki 		unsigned _other[6];
126*2a9b4076SNagaChaitanya Vellanki 	} _env;
127*2a9b4076SNagaChaitanya Vellanki 	unsigned short _sw;
128*2a9b4076SNagaChaitanya Vellanki 
129*2a9b4076SNagaChaitanya Vellanki 	if ((_cw & FP_MSKS_FLD) != FP_MSKS_FLD) {
130*2a9b4076SNagaChaitanya Vellanki 		__fnstsw(&_sw);
131*2a9b4076SNagaChaitanya Vellanki 		if (((_sw & ~_cw) & FP_STKY_FLD) != 0) {
132*2a9b4076SNagaChaitanya Vellanki 			__fnstenv(&_env);
133*2a9b4076SNagaChaitanya Vellanki 			_env._cw = _newcw;
134*2a9b4076SNagaChaitanya Vellanki 			__fldenv(&_env);
135*2a9b4076SNagaChaitanya Vellanki 			return;
136*2a9b4076SNagaChaitanya Vellanki 		}
137*2a9b4076SNagaChaitanya Vellanki 	}
138*2a9b4076SNagaChaitanya Vellanki 	__fldcw(&_newcw);
139*2a9b4076SNagaChaitanya Vellanki }
140*2a9b4076SNagaChaitanya Vellanki 
141*2a9b4076SNagaChaitanya Vellanki #endif/* _X86_X86_IEEEFP_H_ */
142