xref: /freebsd/sys/x86/include/timerreg.h (revision 95ee2897e98f5d444f26ed2334cc7c439f9c16c6)
1de4da6cdSDmitry Chagin /*-
2*4d846d26SWarner Losh  * SPDX-License-Identifier: BSD-2-Clause
3de4da6cdSDmitry Chagin  *
4de4da6cdSDmitry Chagin  * Copyright (C) 2005 TAKAHASHI Yoshihiro. All rights reserved.
5de4da6cdSDmitry Chagin  *
6de4da6cdSDmitry Chagin  * Redistribution and use in source and binary forms, with or without
7de4da6cdSDmitry Chagin  * modification, are permitted provided that the following conditions
8de4da6cdSDmitry Chagin  * are met:
9de4da6cdSDmitry Chagin  * 1. Redistributions of source code must retain the above copyright
10de4da6cdSDmitry Chagin  *    notice, this list of conditions and the following disclaimer.
11de4da6cdSDmitry Chagin  * 2. Redistributions in binary form must reproduce the above copyright
12de4da6cdSDmitry Chagin  *    notice, this list of conditions and the following disclaimer in the
13de4da6cdSDmitry Chagin  *    documentation and/or other materials provided with the distribution.
14de4da6cdSDmitry Chagin  *
15de4da6cdSDmitry Chagin  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
16de4da6cdSDmitry Chagin  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
17de4da6cdSDmitry Chagin  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
18de4da6cdSDmitry Chagin  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
19de4da6cdSDmitry Chagin  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
20de4da6cdSDmitry Chagin  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
21de4da6cdSDmitry Chagin  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
22de4da6cdSDmitry Chagin  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
23de4da6cdSDmitry Chagin  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
24de4da6cdSDmitry Chagin  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
25de4da6cdSDmitry Chagin  * SUCH DAMAGE.
26de4da6cdSDmitry Chagin  */
27de4da6cdSDmitry Chagin 
28de4da6cdSDmitry Chagin /*
29de4da6cdSDmitry Chagin  * The outputs of the three timers are connected as follows:
30de4da6cdSDmitry Chagin  *
31de4da6cdSDmitry Chagin  *	 timer 0 -> irq 0
32de4da6cdSDmitry Chagin  *	 timer 1 -> dma chan 0 (for dram refresh)
33de4da6cdSDmitry Chagin  * 	 timer 2 -> speaker (via keyboard controller)
34de4da6cdSDmitry Chagin  *
35de4da6cdSDmitry Chagin  * Timer 0 is used to call hardclock.
36de4da6cdSDmitry Chagin  * Timer 2 is used to generate console beeps.
37de4da6cdSDmitry Chagin  */
38de4da6cdSDmitry Chagin 
39de4da6cdSDmitry Chagin #ifndef _MACHINE_TIMERREG_H_
40de4da6cdSDmitry Chagin #define _MACHINE_TIMERREG_H_
41de4da6cdSDmitry Chagin 
42de4da6cdSDmitry Chagin #ifdef _KERNEL
43de4da6cdSDmitry Chagin 
44de4da6cdSDmitry Chagin #include <dev/ic/i8253reg.h>
45de4da6cdSDmitry Chagin 
46de4da6cdSDmitry Chagin #define	IO_TIMER1	0x40		/* 8253 Timer #1 */
47de4da6cdSDmitry Chagin #define	TIMER_CNTR0	(IO_TIMER1 + TIMER_REG_CNTR0)
48de4da6cdSDmitry Chagin #define	TIMER_CNTR1	(IO_TIMER1 + TIMER_REG_CNTR1)
49de4da6cdSDmitry Chagin #define	TIMER_CNTR2	(IO_TIMER1 + TIMER_REG_CNTR2)
50de4da6cdSDmitry Chagin #define	TIMER_MODE	(IO_TIMER1 + TIMER_REG_MODE)
51de4da6cdSDmitry Chagin 
52de4da6cdSDmitry Chagin #endif /* _KERNEL */
53de4da6cdSDmitry Chagin 
54de4da6cdSDmitry Chagin #endif /* _MACHINE_TIMERREG_H_ */
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