1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (c) 2005 Bruno Ducrot 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 /* 28 * This driver is based upon information found by examining speedstep-0.5 29 * from Marc Lehman, which includes all the reverse engineering effort of 30 * Malik Martin (function 1 and 2 of the GSI). 31 * 32 * The correct way for the OS to take ownership from the BIOS was found by 33 * Hiroshi Miura (function 0 of the GSI). 34 * 35 * Finally, the int 15h call interface was (partially) documented by Intel. 36 * 37 * Many thanks to Jon Noack for testing and debugging this driver. 38 */ 39 40 #include <sys/cdefs.h> 41 __FBSDID("$FreeBSD$"); 42 43 #include <sys/param.h> 44 #include <sys/bus.h> 45 #include <sys/cpu.h> 46 #include <sys/kernel.h> 47 #include <sys/module.h> 48 #include <sys/mutex.h> 49 #include <sys/systm.h> 50 51 #include <machine/bus.h> 52 #include <machine/cputypes.h> 53 #include <machine/md_var.h> 54 #include <machine/vm86.h> 55 56 #include <dev/pci/pcivar.h> 57 #include <dev/pci/pcireg.h> 58 59 #include <vm/vm.h> 60 #include <vm/pmap.h> 61 62 #include "cpufreq_if.h" 63 64 #if 0 65 #define DPRINT(dev, x...) device_printf(dev, x) 66 #else 67 #define DPRINT(dev, x...) 68 #endif 69 70 struct smist_softc { 71 device_t dev; 72 int smi_cmd; 73 int smi_data; 74 int command; 75 int flags; 76 struct cf_setting sets[2]; /* Only two settings. */ 77 }; 78 79 static char smist_magic[] = "Copyright (c) 1999 Intel Corporation"; 80 81 static void smist_identify(driver_t *driver, device_t parent); 82 static int smist_probe(device_t dev); 83 static int smist_attach(device_t dev); 84 static int smist_detach(device_t dev); 85 static int smist_settings(device_t dev, struct cf_setting *sets, 86 int *count); 87 static int smist_set(device_t dev, const struct cf_setting *set); 88 static int smist_get(device_t dev, struct cf_setting *set); 89 static int smist_type(device_t dev, int *type); 90 91 static device_method_t smist_methods[] = { 92 /* Device interface */ 93 DEVMETHOD(device_identify, smist_identify), 94 DEVMETHOD(device_probe, smist_probe), 95 DEVMETHOD(device_attach, smist_attach), 96 DEVMETHOD(device_detach, smist_detach), 97 98 /* cpufreq interface */ 99 DEVMETHOD(cpufreq_drv_set, smist_set), 100 DEVMETHOD(cpufreq_drv_get, smist_get), 101 DEVMETHOD(cpufreq_drv_type, smist_type), 102 DEVMETHOD(cpufreq_drv_settings, smist_settings), 103 104 {0, 0} 105 }; 106 107 static driver_t smist_driver = { 108 "smist", smist_methods, sizeof(struct smist_softc) 109 }; 110 static devclass_t smist_devclass; 111 DRIVER_MODULE(smist, cpu, smist_driver, smist_devclass, 0, 0); 112 113 struct piix4_pci_device { 114 uint16_t vendor; 115 uint16_t device; 116 char *desc; 117 }; 118 119 static struct piix4_pci_device piix4_pci_devices[] = { 120 {0x8086, 0x7113, "Intel PIIX4 ISA bridge"}, 121 {0x8086, 0x719b, "Intel PIIX4 ISA bridge (embedded in MX440 chipset)"}, 122 123 {0, 0, NULL}, 124 }; 125 126 #define SET_OWNERSHIP 0 127 #define GET_STATE 1 128 #define SET_STATE 2 129 130 static int 131 int15_gsic_call(int *sig, int *smi_cmd, int *command, int *smi_data, int *flags) 132 { 133 struct vm86frame vmf; 134 135 bzero(&vmf, sizeof(vmf)); 136 vmf.vmf_eax = 0x0000E980; /* IST support */ 137 vmf.vmf_edx = 0x47534943; /* 'GSIC' in ASCII */ 138 vm86_intcall(0x15, &vmf); 139 140 if (vmf.vmf_eax == 0x47534943) { 141 *sig = vmf.vmf_eax; 142 *smi_cmd = vmf.vmf_ebx & 0xff; 143 *command = (vmf.vmf_ebx >> 16) & 0xff; 144 *smi_data = vmf.vmf_ecx; 145 *flags = vmf.vmf_edx; 146 } else { 147 *sig = -1; 148 *smi_cmd = -1; 149 *command = -1; 150 *smi_data = -1; 151 *flags = -1; 152 } 153 154 return (0); 155 } 156 157 /* Temporary structure to hold mapped page and status. */ 158 struct set_ownership_data { 159 int smi_cmd; 160 int command; 161 int result; 162 void *buf; 163 }; 164 165 /* Perform actual SMI call to enable SpeedStep. */ 166 static void 167 set_ownership_cb(void *arg, bus_dma_segment_t *segs, int nsegs, int error) 168 { 169 struct set_ownership_data *data; 170 171 data = arg; 172 if (error) { 173 data->result = error; 174 return; 175 } 176 177 /* Copy in the magic string and send it by writing to the SMI port. */ 178 strlcpy(data->buf, smist_magic, PAGE_SIZE); 179 __asm __volatile( 180 "movl $-1, %%edi\n\t" 181 "out %%al, (%%dx)\n" 182 : "=D" (data->result) 183 : "a" (data->command), 184 "b" (0), 185 "c" (0), 186 "d" (data->smi_cmd), 187 "S" ((uint32_t)segs[0].ds_addr) 188 ); 189 } 190 191 static int 192 set_ownership(device_t dev) 193 { 194 struct smist_softc *sc; 195 struct set_ownership_data cb_data; 196 bus_dma_tag_t tag; 197 bus_dmamap_t map; 198 199 /* 200 * Specify the region to store the magic string. Since its address is 201 * passed to the BIOS in a 32-bit register, we have to make sure it is 202 * located in a physical page below 4 GB (i.e., for PAE.) 203 */ 204 sc = device_get_softc(dev); 205 if (bus_dma_tag_create(/*parent*/ NULL, 206 /*alignment*/ PAGE_SIZE, /*no boundary*/ 0, 207 /*lowaddr*/ BUS_SPACE_MAXADDR_32BIT, /*highaddr*/ BUS_SPACE_MAXADDR, 208 NULL, NULL, /*maxsize*/ PAGE_SIZE, /*segments*/ 1, 209 /*maxsegsize*/ PAGE_SIZE, 0, busdma_lock_mutex, &Giant, 210 &tag) != 0) { 211 device_printf(dev, "can't create mem tag\n"); 212 return (ENXIO); 213 } 214 if (bus_dmamem_alloc(tag, &cb_data.buf, BUS_DMA_NOWAIT, &map) != 0) { 215 bus_dma_tag_destroy(tag); 216 device_printf(dev, "can't alloc mapped mem\n"); 217 return (ENXIO); 218 } 219 220 /* Load the physical page map and take ownership in the callback. */ 221 cb_data.smi_cmd = sc->smi_cmd; 222 cb_data.command = sc->command; 223 if (bus_dmamap_load(tag, map, cb_data.buf, PAGE_SIZE, set_ownership_cb, 224 &cb_data, BUS_DMA_NOWAIT) != 0) { 225 bus_dmamem_free(tag, cb_data.buf, map); 226 bus_dma_tag_destroy(tag); 227 device_printf(dev, "can't load mem\n"); 228 return (ENXIO); 229 } 230 DPRINT(dev, "taking ownership over BIOS return %d\n", cb_data.result); 231 bus_dmamap_unload(tag, map); 232 bus_dmamem_free(tag, cb_data.buf, map); 233 bus_dma_tag_destroy(tag); 234 return (cb_data.result ? ENXIO : 0); 235 } 236 237 static int 238 getset_state(struct smist_softc *sc, int *state, int function) 239 { 240 int new_state; 241 int result; 242 int eax; 243 244 if (!sc) 245 return (ENXIO); 246 247 if (function != GET_STATE && function != SET_STATE) 248 return (EINVAL); 249 250 DPRINT(sc->dev, "calling GSI\n"); 251 252 __asm __volatile( 253 "movl $-1, %%edi\n\t" 254 "out %%al, (%%dx)\n" 255 : "=a" (eax), 256 "=b" (new_state), 257 "=D" (result) 258 : "a" (sc->command), 259 "b" (function), 260 "c" (*state), 261 "d" (sc->smi_cmd) 262 ); 263 264 DPRINT(sc->dev, "GSI returned: eax %.8x ebx %.8x edi %.8x\n", 265 eax, new_state, result); 266 267 *state = new_state & 1; 268 269 switch (function) { 270 case GET_STATE: 271 if (eax) 272 return (ENXIO); 273 break; 274 case SET_STATE: 275 if (result) 276 return (ENXIO); 277 break; 278 } 279 return (0); 280 } 281 282 static void 283 smist_identify(driver_t *driver, device_t parent) 284 { 285 struct piix4_pci_device *id; 286 device_t piix4 = NULL; 287 288 if (resource_disabled("ichst", 0)) 289 return; 290 291 /* Check for a supported processor */ 292 if (cpu_vendor_id != CPU_VENDOR_INTEL) 293 return; 294 switch (cpu_id & 0xff0) { 295 case 0x680: /* Pentium III [coppermine] */ 296 case 0x6a0: /* Pentium III [Tualatin] */ 297 break; 298 default: 299 return; 300 } 301 302 /* Check for a supported PCI-ISA bridge */ 303 for (id = piix4_pci_devices; id->desc != NULL; ++id) { 304 if ((piix4 = pci_find_device(id->vendor, id->device)) != NULL) 305 break; 306 } 307 if (!piix4) 308 return; 309 310 if (bootverbose) 311 printf("smist: found supported isa bridge %s\n", id->desc); 312 313 if (device_find_child(parent, "smist", -1) != NULL) 314 return; 315 if (BUS_ADD_CHILD(parent, 30, "smist", -1) == NULL) 316 device_printf(parent, "smist: add child failed\n"); 317 } 318 319 static int 320 smist_probe(device_t dev) 321 { 322 struct smist_softc *sc; 323 device_t ichss_dev, perf_dev; 324 int sig, smi_cmd, command, smi_data, flags; 325 int type; 326 int rv; 327 328 if (resource_disabled("smist", 0)) 329 return (ENXIO); 330 331 sc = device_get_softc(dev); 332 333 /* 334 * If the ACPI perf or ICH SpeedStep drivers have attached and not 335 * just offering info, let them manage things. 336 */ 337 perf_dev = device_find_child(device_get_parent(dev), "acpi_perf", -1); 338 if (perf_dev && device_is_attached(perf_dev)) { 339 rv = CPUFREQ_DRV_TYPE(perf_dev, &type); 340 if (rv == 0 && (type & CPUFREQ_FLAG_INFO_ONLY) == 0) 341 return (ENXIO); 342 } 343 ichss_dev = device_find_child(device_get_parent(dev), "ichss", -1); 344 if (ichss_dev && device_is_attached(ichss_dev)) 345 return (ENXIO); 346 347 int15_gsic_call(&sig, &smi_cmd, &command, &smi_data, &flags); 348 if (bootverbose) 349 device_printf(dev, "sig %.8x smi_cmd %.4x command %.2x " 350 "smi_data %.4x flags %.8x\n", 351 sig, smi_cmd, command, smi_data, flags); 352 353 if (sig != -1) { 354 sc->smi_cmd = smi_cmd; 355 sc->smi_data = smi_data; 356 357 /* 358 * Sometimes int 15h 'GSIC' returns 0x80 for command, when 359 * it is actually 0x82. The Windows driver will overwrite 360 * this value given by the registry. 361 */ 362 if (command == 0x80) { 363 device_printf(dev, 364 "GSIC returned cmd 0x80, should be 0x82\n"); 365 command = 0x82; 366 } 367 sc->command = (sig & 0xffffff00) | (command & 0xff); 368 sc->flags = flags; 369 } else { 370 /* Give some default values */ 371 sc->smi_cmd = 0xb2; 372 sc->smi_data = 0xb3; 373 sc->command = 0x47534982; 374 sc->flags = 0; 375 } 376 377 device_set_desc(dev, "SpeedStep SMI"); 378 379 return (-1500); 380 } 381 382 static int 383 smist_attach(device_t dev) 384 { 385 struct smist_softc *sc; 386 387 sc = device_get_softc(dev); 388 sc->dev = dev; 389 390 /* If we can't take ownership over BIOS, then bail out */ 391 if (set_ownership(dev) != 0) 392 return (ENXIO); 393 394 /* Setup some defaults for our exported settings. */ 395 sc->sets[0].freq = CPUFREQ_VAL_UNKNOWN; 396 sc->sets[0].volts = CPUFREQ_VAL_UNKNOWN; 397 sc->sets[0].power = CPUFREQ_VAL_UNKNOWN; 398 sc->sets[0].lat = 1000; 399 sc->sets[0].dev = dev; 400 sc->sets[1] = sc->sets[0]; 401 402 cpufreq_register(dev); 403 404 return (0); 405 } 406 407 static int 408 smist_detach(device_t dev) 409 { 410 411 return (cpufreq_unregister(dev)); 412 } 413 414 static int 415 smist_settings(device_t dev, struct cf_setting *sets, int *count) 416 { 417 struct smist_softc *sc; 418 struct cf_setting set; 419 int first, i; 420 421 if (sets == NULL || count == NULL) 422 return (EINVAL); 423 if (*count < 2) { 424 *count = 2; 425 return (E2BIG); 426 } 427 sc = device_get_softc(dev); 428 429 /* 430 * Estimate frequencies for both levels, temporarily switching to 431 * the other one if we haven't calibrated it yet. 432 */ 433 for (i = 0; i < 2; i++) { 434 if (sc->sets[i].freq == CPUFREQ_VAL_UNKNOWN) { 435 first = (i == 0) ? 1 : 0; 436 smist_set(dev, &sc->sets[i]); 437 smist_get(dev, &set); 438 smist_set(dev, &sc->sets[first]); 439 } 440 } 441 442 bcopy(sc->sets, sets, sizeof(sc->sets)); 443 *count = 2; 444 445 return (0); 446 } 447 448 static int 449 smist_set(device_t dev, const struct cf_setting *set) 450 { 451 struct smist_softc *sc; 452 int rv, state, req_state, try; 453 454 /* Look up appropriate bit value based on frequency. */ 455 sc = device_get_softc(dev); 456 if (CPUFREQ_CMP(set->freq, sc->sets[0].freq)) 457 req_state = 0; 458 else if (CPUFREQ_CMP(set->freq, sc->sets[1].freq)) 459 req_state = 1; 460 else 461 return (EINVAL); 462 463 DPRINT(dev, "requested setting %d\n", req_state); 464 465 rv = getset_state(sc, &state, GET_STATE); 466 if (state == req_state) 467 return (0); 468 469 try = 3; 470 do { 471 rv = getset_state(sc, &req_state, SET_STATE); 472 473 /* Sleep for 200 microseconds. This value is just a guess. */ 474 if (rv) 475 DELAY(200); 476 } while (rv && --try); 477 DPRINT(dev, "set_state return %d, tried %d times\n", 478 rv, 4 - try); 479 480 return (rv); 481 } 482 483 static int 484 smist_get(device_t dev, struct cf_setting *set) 485 { 486 struct smist_softc *sc; 487 uint64_t rate; 488 int state; 489 int rv; 490 491 sc = device_get_softc(dev); 492 rv = getset_state(sc, &state, GET_STATE); 493 if (rv != 0) 494 return (rv); 495 496 /* If we haven't changed settings yet, estimate the current value. */ 497 if (sc->sets[state].freq == CPUFREQ_VAL_UNKNOWN) { 498 cpu_est_clockrate(0, &rate); 499 sc->sets[state].freq = rate / 1000000; 500 DPRINT(dev, "get calibrated new rate of %d\n", 501 sc->sets[state].freq); 502 } 503 *set = sc->sets[state]; 504 505 return (0); 506 } 507 508 static int 509 smist_type(device_t dev, int *type) 510 { 511 512 if (type == NULL) 513 return (EINVAL); 514 515 *type = CPUFREQ_TYPE_ABSOLUTE; 516 return (0); 517 } 518