1 /*- 2 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/bus.h> 33 #include <sys/kernel.h> 34 #include <sys/limits.h> 35 #include <sys/malloc.h> 36 #include <sys/smp.h> 37 #include <vm/vm.h> 38 #include <vm/pmap.h> 39 40 #include <x86/apicreg.h> 41 #include <machine/intr_machdep.h> 42 #include <x86/apicvar.h> 43 #include <machine/md_var.h> 44 #include <x86/vmware.h> 45 46 #include <contrib/dev/acpica/include/acpi.h> 47 #include <contrib/dev/acpica/include/actables.h> 48 49 #include <dev/acpica/acpivar.h> 50 #include <dev/pci/pcivar.h> 51 52 /* These two arrays are indexed by APIC IDs. */ 53 static struct { 54 void *io_apic; 55 UINT32 io_vector; 56 } *ioapics; 57 58 static struct lapic_info { 59 u_int la_enabled:1; 60 u_int la_acpi_id:8; 61 } lapics[MAX_APIC_ID + 1]; 62 63 int madt_found_sci_override; 64 static ACPI_TABLE_MADT *madt; 65 static vm_paddr_t madt_physaddr; 66 static vm_offset_t madt_length; 67 68 static MALLOC_DEFINE(M_MADT, "madt_table", "ACPI MADT Table Items"); 69 70 static enum intr_polarity interrupt_polarity(UINT16 IntiFlags, UINT8 Source); 71 static enum intr_trigger interrupt_trigger(UINT16 IntiFlags, UINT8 Source); 72 static int madt_find_cpu(u_int acpi_id, u_int *apic_id); 73 static int madt_find_interrupt(int intr, void **apic, u_int *pin); 74 static void madt_parse_apics(ACPI_SUBTABLE_HEADER *entry, void *arg); 75 static void madt_parse_interrupt_override( 76 ACPI_MADT_INTERRUPT_OVERRIDE *intr); 77 static void madt_parse_ints(ACPI_SUBTABLE_HEADER *entry, 78 void *arg __unused); 79 static void madt_parse_local_nmi(ACPI_MADT_LOCAL_APIC_NMI *nmi); 80 static void madt_parse_nmi(ACPI_MADT_NMI_SOURCE *nmi); 81 static int madt_probe(void); 82 static int madt_probe_cpus(void); 83 static void madt_probe_cpus_handler(ACPI_SUBTABLE_HEADER *entry, 84 void *arg __unused); 85 static void madt_register(void *dummy); 86 static int madt_setup_local(void); 87 static int madt_setup_io(void); 88 static void madt_walk_table(acpi_subtable_handler *handler, void *arg); 89 90 static struct apic_enumerator madt_enumerator = { 91 "MADT", 92 madt_probe, 93 madt_probe_cpus, 94 madt_setup_local, 95 madt_setup_io 96 }; 97 98 /* 99 * Look for an ACPI Multiple APIC Description Table ("APIC") 100 */ 101 static int 102 madt_probe(void) 103 { 104 105 madt_physaddr = acpi_find_table(ACPI_SIG_MADT); 106 if (madt_physaddr == 0) 107 return (ENXIO); 108 return (-50); 109 } 110 111 /* 112 * Run through the MP table enumerating CPUs. 113 */ 114 static int 115 madt_probe_cpus(void) 116 { 117 118 madt = acpi_map_table(madt_physaddr, ACPI_SIG_MADT); 119 madt_length = madt->Header.Length; 120 KASSERT(madt != NULL, ("Unable to re-map MADT")); 121 madt_walk_table(madt_probe_cpus_handler, NULL); 122 acpi_unmap_table(madt); 123 madt = NULL; 124 return (0); 125 } 126 127 /* 128 * Initialize the local APIC on the BSP. 129 */ 130 static int 131 madt_setup_local(void) 132 { 133 ACPI_TABLE_DMAR *dmartbl; 134 vm_paddr_t dmartbl_physaddr; 135 u_int p[4]; 136 137 madt = pmap_mapbios(madt_physaddr, madt_length); 138 if ((cpu_feature2 & CPUID2_X2APIC) != 0) { 139 x2apic_mode = 1; 140 dmartbl_physaddr = acpi_find_table(ACPI_SIG_DMAR); 141 if (dmartbl_physaddr != 0) { 142 dmartbl = acpi_map_table(dmartbl_physaddr, 143 ACPI_SIG_DMAR); 144 if ((dmartbl->Flags & ACPI_DMAR_X2APIC_OPT_OUT) != 0) { 145 x2apic_mode = 0; 146 if (bootverbose) 147 printf( 148 "x2APIC available but disabled by DMAR table\n"); 149 } 150 acpi_unmap_table(dmartbl); 151 } 152 if (vm_guest == VM_GUEST_VMWARE) { 153 vmware_hvcall(VMW_HVCMD_GETVCPU_INFO, p); 154 if ((p[0] & VMW_VCPUINFO_VCPU_RESERVED) != 0 || 155 (p[0] & VMW_VCPUINFO_LEGACY_X2APIC) == 0) { 156 x2apic_mode = 0; 157 if (bootverbose) 158 printf( 159 "x2APIC available but disabled inside VMWare without intr redirection\n"); 160 } 161 } 162 TUNABLE_INT_FETCH("hw.x2apic_enable", &x2apic_mode); 163 } 164 165 lapic_init(madt->Address); 166 printf("ACPI APIC Table: <%.*s %.*s>\n", 167 (int)sizeof(madt->Header.OemId), madt->Header.OemId, 168 (int)sizeof(madt->Header.OemTableId), madt->Header.OemTableId); 169 170 /* 171 * We ignore 64-bit local APIC override entries. Should we 172 * perhaps emit a warning here if we find one? 173 */ 174 return (0); 175 } 176 177 /* 178 * Enumerate I/O APICs and setup interrupt sources. 179 */ 180 static int 181 madt_setup_io(void) 182 { 183 void *ioapic; 184 u_int pin; 185 int i; 186 187 /* Try to initialize ACPI so that we can access the FADT. */ 188 i = acpi_Startup(); 189 if (ACPI_FAILURE(i)) { 190 printf("MADT: ACPI Startup failed with %s\n", 191 AcpiFormatException(i)); 192 printf("Try disabling either ACPI or apic support.\n"); 193 panic("Using MADT but ACPI doesn't work"); 194 } 195 196 ioapics = malloc(sizeof(*ioapics) * (MAX_APIC_ID + 1), M_MADT, 197 M_WAITOK | M_ZERO); 198 199 /* First, we run through adding I/O APIC's. */ 200 madt_walk_table(madt_parse_apics, NULL); 201 202 /* Second, we run through the table tweaking interrupt sources. */ 203 madt_walk_table(madt_parse_ints, NULL); 204 205 /* 206 * If there was not an explicit override entry for the SCI, 207 * force it to use level trigger and active-low polarity. 208 */ 209 if (!madt_found_sci_override) { 210 if (madt_find_interrupt(AcpiGbl_FADT.SciInterrupt, &ioapic, 211 &pin) != 0) 212 printf("MADT: Could not find APIC for SCI IRQ %u\n", 213 AcpiGbl_FADT.SciInterrupt); 214 else { 215 printf( 216 "MADT: Forcing active-low polarity and level trigger for SCI\n"); 217 ioapic_set_polarity(ioapic, pin, INTR_POLARITY_LOW); 218 ioapic_set_triggermode(ioapic, pin, INTR_TRIGGER_LEVEL); 219 } 220 } 221 222 /* Third, we register all the I/O APIC's. */ 223 for (i = 0; i <= MAX_APIC_ID; i++) 224 if (ioapics[i].io_apic != NULL) 225 ioapic_register(ioapics[i].io_apic); 226 227 /* Finally, we throw the switch to enable the I/O APIC's. */ 228 acpi_SetDefaultIntrModel(ACPI_INTR_APIC); 229 230 free(ioapics, M_MADT); 231 ioapics = NULL; 232 233 return (0); 234 } 235 236 static void 237 madt_register(void *dummy __unused) 238 { 239 240 apic_register_enumerator(&madt_enumerator); 241 } 242 SYSINIT(madt_register, SI_SUB_TUNABLES - 1, SI_ORDER_FIRST, madt_register, NULL); 243 244 /* 245 * Call the handler routine for each entry in the MADT table. 246 */ 247 static void 248 madt_walk_table(acpi_subtable_handler *handler, void *arg) 249 { 250 251 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length, 252 handler, arg); 253 } 254 255 static void 256 madt_probe_cpus_handler(ACPI_SUBTABLE_HEADER *entry, void *arg) 257 { 258 ACPI_MADT_LOCAL_APIC *proc; 259 struct lapic_info *la; 260 261 switch (entry->Type) { 262 case ACPI_MADT_TYPE_LOCAL_APIC: 263 /* 264 * The MADT does not include a BSP flag, so we have to 265 * let the MP code figure out which CPU is the BSP on 266 * its own. 267 */ 268 proc = (ACPI_MADT_LOCAL_APIC *)entry; 269 if (bootverbose) 270 printf("MADT: Found CPU APIC ID %u ACPI ID %u: %s\n", 271 proc->Id, proc->ProcessorId, 272 (proc->LapicFlags & ACPI_MADT_ENABLED) ? 273 "enabled" : "disabled"); 274 if (!(proc->LapicFlags & ACPI_MADT_ENABLED)) 275 break; 276 if (proc->Id > MAX_APIC_ID) 277 panic("%s: CPU ID %u too high", __func__, proc->Id); 278 la = &lapics[proc->Id]; 279 KASSERT(la->la_enabled == 0, 280 ("Duplicate local APIC ID %u", proc->Id)); 281 la->la_enabled = 1; 282 la->la_acpi_id = proc->ProcessorId; 283 lapic_create(proc->Id, 0); 284 break; 285 } 286 } 287 288 289 /* 290 * Add an I/O APIC from an entry in the table. 291 */ 292 static void 293 madt_parse_apics(ACPI_SUBTABLE_HEADER *entry, void *arg __unused) 294 { 295 ACPI_MADT_IO_APIC *apic; 296 297 switch (entry->Type) { 298 case ACPI_MADT_TYPE_IO_APIC: 299 apic = (ACPI_MADT_IO_APIC *)entry; 300 if (bootverbose) 301 printf( 302 "MADT: Found IO APIC ID %u, Interrupt %u at %p\n", 303 apic->Id, apic->GlobalIrqBase, 304 (void *)(uintptr_t)apic->Address); 305 if (apic->Id > MAX_APIC_ID) 306 panic("%s: I/O APIC ID %u too high", __func__, 307 apic->Id); 308 if (ioapics[apic->Id].io_apic != NULL) 309 panic("%s: Double APIC ID %u", __func__, apic->Id); 310 if (apic->GlobalIrqBase >= FIRST_MSI_INT) { 311 printf("MADT: Ignoring bogus I/O APIC ID %u", apic->Id); 312 break; 313 } 314 ioapics[apic->Id].io_apic = ioapic_create(apic->Address, 315 apic->Id, apic->GlobalIrqBase); 316 ioapics[apic->Id].io_vector = apic->GlobalIrqBase; 317 break; 318 default: 319 break; 320 } 321 } 322 323 /* 324 * Determine properties of an interrupt source. Note that for ACPI these 325 * functions are only used for ISA interrupts, so we assume ISA bus values 326 * (Active Hi, Edge Triggered) for conforming values except for the ACPI 327 * SCI for which we use Active Lo, Level Triggered. 328 */ 329 static enum intr_polarity 330 interrupt_polarity(UINT16 IntiFlags, UINT8 Source) 331 { 332 333 switch (IntiFlags & ACPI_MADT_POLARITY_MASK) { 334 default: 335 printf("WARNING: Bogus Interrupt Polarity. Assume CONFORMS\n"); 336 /* FALLTHROUGH*/ 337 case ACPI_MADT_POLARITY_CONFORMS: 338 if (Source == AcpiGbl_FADT.SciInterrupt) 339 return (INTR_POLARITY_LOW); 340 else 341 return (INTR_POLARITY_HIGH); 342 case ACPI_MADT_POLARITY_ACTIVE_HIGH: 343 return (INTR_POLARITY_HIGH); 344 case ACPI_MADT_POLARITY_ACTIVE_LOW: 345 return (INTR_POLARITY_LOW); 346 } 347 } 348 349 static enum intr_trigger 350 interrupt_trigger(UINT16 IntiFlags, UINT8 Source) 351 { 352 353 switch (IntiFlags & ACPI_MADT_TRIGGER_MASK) { 354 default: 355 printf("WARNING: Bogus Interrupt Trigger Mode. Assume CONFORMS.\n"); 356 /*FALLTHROUGH*/ 357 case ACPI_MADT_TRIGGER_CONFORMS: 358 if (Source == AcpiGbl_FADT.SciInterrupt) 359 return (INTR_TRIGGER_LEVEL); 360 else 361 return (INTR_TRIGGER_EDGE); 362 case ACPI_MADT_TRIGGER_EDGE: 363 return (INTR_TRIGGER_EDGE); 364 case ACPI_MADT_TRIGGER_LEVEL: 365 return (INTR_TRIGGER_LEVEL); 366 } 367 } 368 369 /* 370 * Find the local APIC ID associated with a given ACPI Processor ID. 371 */ 372 static int 373 madt_find_cpu(u_int acpi_id, u_int *apic_id) 374 { 375 int i; 376 377 for (i = 0; i <= MAX_APIC_ID; i++) { 378 if (!lapics[i].la_enabled) 379 continue; 380 if (lapics[i].la_acpi_id != acpi_id) 381 continue; 382 *apic_id = i; 383 return (0); 384 } 385 return (ENOENT); 386 } 387 388 /* 389 * Find the IO APIC and pin on that APIC associated with a given global 390 * interrupt. 391 */ 392 static int 393 madt_find_interrupt(int intr, void **apic, u_int *pin) 394 { 395 int i, best; 396 397 best = -1; 398 for (i = 0; i <= MAX_APIC_ID; i++) { 399 if (ioapics[i].io_apic == NULL || 400 ioapics[i].io_vector > intr) 401 continue; 402 if (best == -1 || 403 ioapics[best].io_vector < ioapics[i].io_vector) 404 best = i; 405 } 406 if (best == -1) 407 return (ENOENT); 408 *apic = ioapics[best].io_apic; 409 *pin = intr - ioapics[best].io_vector; 410 if (*pin > 32) 411 printf("WARNING: Found intpin of %u for vector %d\n", *pin, 412 intr); 413 return (0); 414 } 415 416 void 417 madt_parse_interrupt_values(void *entry, 418 enum intr_trigger *trig, enum intr_polarity *pol) 419 { 420 ACPI_MADT_INTERRUPT_OVERRIDE *intr; 421 char buf[64]; 422 423 intr = entry; 424 425 if (bootverbose) 426 printf("MADT: Interrupt override: source %u, irq %u\n", 427 intr->SourceIrq, intr->GlobalIrq); 428 KASSERT(intr->Bus == 0, ("bus for interrupt overrides must be zero")); 429 430 /* 431 * Lookup the appropriate trigger and polarity modes for this 432 * entry. 433 */ 434 *trig = interrupt_trigger(intr->IntiFlags, intr->SourceIrq); 435 *pol = interrupt_polarity(intr->IntiFlags, intr->SourceIrq); 436 437 /* 438 * If the SCI is identity mapped but has edge trigger and 439 * active-hi polarity or the force_sci_lo tunable is set, 440 * force it to use level/lo. 441 */ 442 if (intr->SourceIrq == AcpiGbl_FADT.SciInterrupt) { 443 madt_found_sci_override = 1; 444 if (getenv_string("hw.acpi.sci.trigger", buf, sizeof(buf))) { 445 if (tolower(buf[0]) == 'e') 446 *trig = INTR_TRIGGER_EDGE; 447 else if (tolower(buf[0]) == 'l') 448 *trig = INTR_TRIGGER_LEVEL; 449 else 450 panic( 451 "Invalid trigger %s: must be 'edge' or 'level'", 452 buf); 453 printf("MADT: Forcing SCI to %s trigger\n", 454 *trig == INTR_TRIGGER_EDGE ? "edge" : "level"); 455 } 456 if (getenv_string("hw.acpi.sci.polarity", buf, sizeof(buf))) { 457 if (tolower(buf[0]) == 'h') 458 *pol = INTR_POLARITY_HIGH; 459 else if (tolower(buf[0]) == 'l') 460 *pol = INTR_POLARITY_LOW; 461 else 462 panic( 463 "Invalid polarity %s: must be 'high' or 'low'", 464 buf); 465 printf("MADT: Forcing SCI to active %s polarity\n", 466 *pol == INTR_POLARITY_HIGH ? "high" : "low"); 467 } 468 } 469 } 470 471 /* 472 * Parse an interrupt source override for an ISA interrupt. 473 */ 474 static void 475 madt_parse_interrupt_override(ACPI_MADT_INTERRUPT_OVERRIDE *intr) 476 { 477 void *new_ioapic, *old_ioapic; 478 u_int new_pin, old_pin; 479 enum intr_trigger trig; 480 enum intr_polarity pol; 481 482 if (acpi_quirks & ACPI_Q_MADT_IRQ0 && intr->SourceIrq == 0 && 483 intr->GlobalIrq == 2) { 484 if (bootverbose) 485 printf("MADT: Skipping timer override\n"); 486 return; 487 } 488 489 if (madt_find_interrupt(intr->GlobalIrq, &new_ioapic, &new_pin) != 0) { 490 printf("MADT: Could not find APIC for vector %u (IRQ %u)\n", 491 intr->GlobalIrq, intr->SourceIrq); 492 return; 493 } 494 495 madt_parse_interrupt_values(intr, &trig, &pol); 496 497 /* Remap the IRQ if it is mapped to a different interrupt vector. */ 498 if (intr->SourceIrq != intr->GlobalIrq) { 499 /* 500 * If the SCI is remapped to a non-ISA global interrupt, 501 * then override the vector we use to setup and allocate 502 * the interrupt. 503 */ 504 if (intr->GlobalIrq > 15 && 505 intr->SourceIrq == AcpiGbl_FADT.SciInterrupt) 506 acpi_OverrideInterruptLevel(intr->GlobalIrq); 507 else 508 ioapic_remap_vector(new_ioapic, new_pin, 509 intr->SourceIrq); 510 if (madt_find_interrupt(intr->SourceIrq, &old_ioapic, 511 &old_pin) != 0) 512 printf("MADT: Could not find APIC for source IRQ %u\n", 513 intr->SourceIrq); 514 else if (ioapic_get_vector(old_ioapic, old_pin) == 515 intr->SourceIrq) 516 ioapic_disable_pin(old_ioapic, old_pin); 517 } 518 519 /* Program the polarity and trigger mode. */ 520 ioapic_set_triggermode(new_ioapic, new_pin, trig); 521 ioapic_set_polarity(new_ioapic, new_pin, pol); 522 } 523 524 /* 525 * Parse an entry for an NMI routed to an IO APIC. 526 */ 527 static void 528 madt_parse_nmi(ACPI_MADT_NMI_SOURCE *nmi) 529 { 530 void *ioapic; 531 u_int pin; 532 533 if (madt_find_interrupt(nmi->GlobalIrq, &ioapic, &pin) != 0) { 534 printf("MADT: Could not find APIC for vector %u\n", 535 nmi->GlobalIrq); 536 return; 537 } 538 539 ioapic_set_nmi(ioapic, pin); 540 if (!(nmi->IntiFlags & ACPI_MADT_TRIGGER_CONFORMS)) 541 ioapic_set_triggermode(ioapic, pin, 542 interrupt_trigger(nmi->IntiFlags, 0)); 543 if (!(nmi->IntiFlags & ACPI_MADT_POLARITY_CONFORMS)) 544 ioapic_set_polarity(ioapic, pin, 545 interrupt_polarity(nmi->IntiFlags, 0)); 546 } 547 548 /* 549 * Parse an entry for an NMI routed to a local APIC LVT pin. 550 */ 551 static void 552 madt_parse_local_nmi(ACPI_MADT_LOCAL_APIC_NMI *nmi) 553 { 554 u_int apic_id, pin; 555 556 if (nmi->ProcessorId == 0xff) 557 apic_id = APIC_ID_ALL; 558 else if (madt_find_cpu(nmi->ProcessorId, &apic_id) != 0) { 559 if (bootverbose) 560 printf("MADT: Ignoring local NMI routed to " 561 "ACPI CPU %u\n", nmi->ProcessorId); 562 return; 563 } 564 if (nmi->Lint == 0) 565 pin = APIC_LVT_LINT0; 566 else 567 pin = APIC_LVT_LINT1; 568 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI); 569 if (!(nmi->IntiFlags & ACPI_MADT_TRIGGER_CONFORMS)) 570 lapic_set_lvt_triggermode(apic_id, pin, 571 interrupt_trigger(nmi->IntiFlags, 0)); 572 if (!(nmi->IntiFlags & ACPI_MADT_POLARITY_CONFORMS)) 573 lapic_set_lvt_polarity(apic_id, pin, 574 interrupt_polarity(nmi->IntiFlags, 0)); 575 } 576 577 /* 578 * Parse interrupt entries. 579 */ 580 static void 581 madt_parse_ints(ACPI_SUBTABLE_HEADER *entry, void *arg __unused) 582 { 583 584 switch (entry->Type) { 585 case ACPI_MADT_TYPE_INTERRUPT_OVERRIDE: 586 madt_parse_interrupt_override( 587 (ACPI_MADT_INTERRUPT_OVERRIDE *)entry); 588 break; 589 case ACPI_MADT_TYPE_NMI_SOURCE: 590 madt_parse_nmi((ACPI_MADT_NMI_SOURCE *)entry); 591 break; 592 case ACPI_MADT_TYPE_LOCAL_APIC_NMI: 593 madt_parse_local_nmi((ACPI_MADT_LOCAL_APIC_NMI *)entry); 594 break; 595 } 596 } 597 598 /* 599 * Setup per-CPU ACPI IDs. 600 */ 601 static void 602 madt_set_ids(void *dummy) 603 { 604 struct lapic_info *la; 605 struct pcpu *pc; 606 u_int i; 607 608 if (madt == NULL) 609 return; 610 CPU_FOREACH(i) { 611 pc = pcpu_find(i); 612 KASSERT(pc != NULL, ("no pcpu data for CPU %u", i)); 613 la = &lapics[pc->pc_apic_id]; 614 if (!la->la_enabled) 615 panic("APIC: CPU with APIC ID %u is not enabled", 616 pc->pc_apic_id); 617 pc->pc_acpi_id = la->la_acpi_id; 618 if (bootverbose) 619 printf("APIC: CPU %u has ACPI ID %u\n", i, 620 la->la_acpi_id); 621 } 622 } 623 SYSINIT(madt_set_ids, SI_SUB_CPU, SI_ORDER_MIDDLE, madt_set_ids, NULL); 624