1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2003 John Baldwin <jhb@FreeBSD.org> 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 16 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 17 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 18 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 19 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 20 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 21 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 22 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 23 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 */ 27 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/bus.h> 31 #include <sys/kernel.h> 32 #include <sys/limits.h> 33 #include <sys/malloc.h> 34 #include <sys/smp.h> 35 #include <vm/vm.h> 36 #include <vm/pmap.h> 37 38 #include <x86/apicreg.h> 39 #include <machine/intr_machdep.h> 40 #include <x86/apicvar.h> 41 #include <machine/md_var.h> 42 #include <x86/vmware.h> 43 44 #include <contrib/dev/acpica/include/acpi.h> 45 #include <contrib/dev/acpica/include/aclocal.h> 46 #include <contrib/dev/acpica/include/actables.h> 47 48 #include <dev/acpica/acpivar.h> 49 #include <dev/pci/pcivar.h> 50 51 /* These two arrays are indexed by APIC IDs. */ 52 static struct { 53 void *io_apic; 54 UINT32 io_vector; 55 } *ioapics; 56 57 static struct lapic_info { 58 u_int la_enabled; 59 u_int la_acpi_id; 60 } *lapics; 61 62 int madt_found_sci_override; 63 static ACPI_TABLE_MADT *madt; 64 static vm_paddr_t madt_physaddr; 65 static vm_offset_t madt_length; 66 67 static MALLOC_DEFINE(M_MADT, "madt_table", "ACPI MADT Table Items"); 68 69 static enum intr_polarity interrupt_polarity(UINT16 IntiFlags, UINT8 Source); 70 static enum intr_trigger interrupt_trigger(UINT16 IntiFlags, UINT8 Source); 71 static int madt_find_cpu(u_int acpi_id, u_int *apic_id); 72 static int madt_find_interrupt(int intr, void **apic, u_int *pin); 73 static void madt_parse_apics(ACPI_SUBTABLE_HEADER *entry, void *arg); 74 static void madt_parse_interrupt_override( 75 ACPI_MADT_INTERRUPT_OVERRIDE *intr); 76 static void madt_parse_ints(ACPI_SUBTABLE_HEADER *entry, 77 void *arg __unused); 78 static void madt_parse_local_nmi(ACPI_MADT_LOCAL_APIC_NMI *nmi); 79 static void madt_parse_nmi(ACPI_MADT_NMI_SOURCE *nmi); 80 static int madt_probe(void); 81 static int madt_probe_cpus(void); 82 static void madt_probe_cpus_handler(ACPI_SUBTABLE_HEADER *entry, 83 void *arg __unused); 84 static void madt_setup_cpus_handler(ACPI_SUBTABLE_HEADER *entry, 85 void *arg __unused); 86 static void madt_register(void *dummy); 87 static int madt_setup_local(void); 88 static int madt_setup_io(void); 89 static void madt_walk_table(acpi_subtable_handler *handler, void *arg); 90 91 static struct apic_enumerator madt_enumerator = { 92 .apic_name = "MADT", 93 .apic_probe = madt_probe, 94 .apic_probe_cpus = madt_probe_cpus, 95 .apic_setup_local = madt_setup_local, 96 .apic_setup_io = madt_setup_io 97 }; 98 99 /* 100 * Look for an ACPI Multiple APIC Description Table ("APIC") 101 */ 102 static int 103 madt_probe(void) 104 { 105 106 madt_physaddr = acpi_find_table(ACPI_SIG_MADT); 107 if (madt_physaddr == 0) 108 return (ENXIO); 109 return (-50); 110 } 111 112 /* 113 * Run through the MP table enumerating CPUs. 114 */ 115 static int 116 madt_probe_cpus(void) 117 { 118 119 madt = acpi_map_table(madt_physaddr, ACPI_SIG_MADT); 120 madt_length = madt->Header.Length; 121 KASSERT(madt != NULL, ("Unable to re-map MADT")); 122 madt_walk_table(madt_probe_cpus_handler, NULL); 123 acpi_unmap_table(madt); 124 madt = NULL; 125 return (0); 126 } 127 128 static const char *x2apic_sandy_dis[] = { 129 "LENOVO", 130 "ASUSTeK Computer Inc.", 131 "SAMSUNG ELECTRONICS CO., LTD.", 132 }; 133 134 /* 135 * Automatically detect several configurations where x2APIC mode is 136 * known to cause troubles. User can override the setting with 137 * hw.x2apic_enable tunable. 138 */ 139 static const char * 140 madt_x2apic_disable_reason(void) 141 { 142 ACPI_TABLE_DMAR *dmartbl; 143 vm_paddr_t dmartbl_physaddr; 144 const char *reason; 145 char *hw_vendor; 146 u_int p[4]; 147 int i; 148 149 reason = NULL; 150 151 dmartbl_physaddr = acpi_find_table(ACPI_SIG_DMAR); 152 if (dmartbl_physaddr != 0) { 153 dmartbl = acpi_map_table(dmartbl_physaddr, ACPI_SIG_DMAR); 154 if ((dmartbl->Flags & ACPI_DMAR_X2APIC_OPT_OUT) != 0) 155 reason = "by DMAR table"; 156 acpi_unmap_table(dmartbl); 157 if (reason != NULL) 158 return (reason); 159 } 160 161 if (vm_guest == VM_GUEST_VMWARE) { 162 vmware_hvcall(VMW_HVCMD_GETVCPU_INFO, p); 163 if ((p[0] & VMW_VCPUINFO_VCPU_RESERVED) != 0 || 164 (p[0] & VMW_VCPUINFO_LEGACY_X2APIC) == 0) 165 return ("inside VMWare without intr redirection"); 166 } 167 168 if (vm_guest == VM_GUEST_NO && 169 CPUID_TO_FAMILY(cpu_id) == 0x6 && 170 CPUID_TO_MODEL(cpu_id) == 0x2a) { 171 hw_vendor = kern_getenv("smbios.planar.maker"); 172 /* 173 * It seems that some SandyBridge-based notebook 174 * BIOSes have a bug which prevents booting AP in 175 * x2APIC mode. Since the only way to detect mobile 176 * CPU is to check northbridge pci id, which cannot be 177 * done that early, disable x2APIC for all such 178 * machines. 179 */ 180 if (hw_vendor != NULL) { 181 for (i = 0; i < nitems(x2apic_sandy_dis); i++) { 182 if (strcmp(hw_vendor, x2apic_sandy_dis[i]) == 183 0) { 184 reason = 185 "for a suspected SandyBridge BIOS bug"; 186 break; 187 } 188 } 189 freeenv(hw_vendor); 190 } 191 if (reason != NULL) 192 return (reason); 193 } 194 195 return (NULL); 196 } 197 198 /* 199 * Initialize the local APIC on the BSP. 200 */ 201 static int 202 madt_setup_local(void) 203 { 204 const char *reason; 205 int user_x2apic; 206 bool bios_x2apic; 207 208 if ((cpu_feature2 & CPUID2_X2APIC) != 0) { 209 reason = madt_x2apic_disable_reason(); 210 bios_x2apic = lapic_is_x2apic(); 211 if (reason != NULL && bios_x2apic) { 212 if (bootverbose) 213 printf("x2APIC should be disabled %s but " 214 "already enabled by BIOS; enabling.\n", 215 reason); 216 reason = NULL; 217 } 218 if (reason == NULL) 219 x2apic_mode = 1; 220 else if (bootverbose) 221 printf("x2APIC available but disabled %s\n", reason); 222 user_x2apic = x2apic_mode; 223 TUNABLE_INT_FETCH("hw.apic.x2apic_mode", &user_x2apic); 224 if (user_x2apic != x2apic_mode) { 225 if (bios_x2apic && !user_x2apic) 226 printf("x2APIC disabled by tunable and " 227 "enabled by BIOS; ignoring tunable."); 228 else 229 x2apic_mode = user_x2apic; 230 } 231 } 232 233 /* 234 * Truncate max_apic_id if not in x2APIC mode. Some structures 235 * will already be allocated with the previous max_apic_id, but 236 * at least we can prevent wasting more memory elsewhere. 237 */ 238 if (!x2apic_mode) 239 max_apic_id = min(max_apic_id, xAPIC_MAX_APIC_ID); 240 241 madt = pmap_mapbios(madt_physaddr, madt_length); 242 lapics = malloc(sizeof(*lapics) * (max_apic_id + 1), M_MADT, 243 M_WAITOK | M_ZERO); 244 madt_walk_table(madt_setup_cpus_handler, NULL); 245 246 lapic_init(madt->Address); 247 printf("ACPI APIC Table: <%.*s %.*s>\n", 248 (int)sizeof(madt->Header.OemId), madt->Header.OemId, 249 (int)sizeof(madt->Header.OemTableId), madt->Header.OemTableId); 250 251 /* 252 * We ignore 64-bit local APIC override entries. Should we 253 * perhaps emit a warning here if we find one? 254 */ 255 return (0); 256 } 257 258 /* 259 * Enumerate I/O APICs and setup interrupt sources. 260 */ 261 static int 262 madt_setup_io(void) 263 { 264 void *ioapic; 265 u_int pin; 266 int i; 267 268 KASSERT(lapics != NULL, ("local APICs not initialized")); 269 270 /* Try to initialize ACPI so that we can access the FADT. */ 271 i = acpi_Startup(); 272 if (ACPI_FAILURE(i)) { 273 printf("MADT: ACPI Startup failed with %s\n", 274 AcpiFormatException(i)); 275 printf("Try disabling either ACPI or apic support.\n"); 276 panic("Using MADT but ACPI doesn't work"); 277 } 278 279 ioapics = malloc(sizeof(*ioapics) * (IOAPIC_MAX_ID + 1), M_MADT, 280 M_WAITOK | M_ZERO); 281 282 /* First, we run through adding I/O APIC's. */ 283 madt_walk_table(madt_parse_apics, NULL); 284 285 /* Second, we run through the table tweaking interrupt sources. */ 286 madt_walk_table(madt_parse_ints, NULL); 287 288 /* 289 * If there was not an explicit override entry for the SCI, 290 * force it to use level trigger and active-low polarity. 291 */ 292 if (!madt_found_sci_override) { 293 if (madt_find_interrupt(AcpiGbl_FADT.SciInterrupt, &ioapic, 294 &pin) != 0) 295 printf("MADT: Could not find APIC for SCI IRQ %u\n", 296 AcpiGbl_FADT.SciInterrupt); 297 else { 298 printf( 299 "MADT: Forcing active-low polarity and level trigger for SCI\n"); 300 ioapic_set_polarity(ioapic, pin, INTR_POLARITY_LOW); 301 ioapic_set_triggermode(ioapic, pin, INTR_TRIGGER_LEVEL); 302 } 303 } 304 305 /* Third, we register all the I/O APIC's. */ 306 for (i = 0; i <= IOAPIC_MAX_ID; i++) 307 if (ioapics[i].io_apic != NULL) 308 ioapic_register(ioapics[i].io_apic); 309 310 /* Finally, we throw the switch to enable the I/O APIC's. */ 311 acpi_SetDefaultIntrModel(ACPI_INTR_APIC); 312 313 free(ioapics, M_MADT); 314 ioapics = NULL; 315 316 /* NB: this is the last use of the lapics array. */ 317 free(lapics, M_MADT); 318 lapics = NULL; 319 320 return (0); 321 } 322 323 static void 324 madt_register(void *dummy __unused) 325 { 326 327 apic_register_enumerator(&madt_enumerator); 328 } 329 SYSINIT(madt_register, SI_SUB_TUNABLES - 1, SI_ORDER_FIRST, madt_register, NULL); 330 331 /* 332 * Call the handler routine for each entry in the MADT table. 333 */ 334 static void 335 madt_walk_table(acpi_subtable_handler *handler, void *arg) 336 { 337 338 acpi_walk_subtables(madt + 1, (char *)madt + madt->Header.Length, 339 handler, arg); 340 } 341 342 static void 343 madt_parse_cpu(unsigned int apic_id, unsigned int flags) 344 { 345 346 if (!(flags & ACPI_MADT_ENABLED) || 347 #ifdef SMP 348 mp_ncpus == MAXCPU || 349 #endif 350 apic_id > MAX_APIC_ID) 351 return; 352 353 #ifdef SMP 354 mp_ncpus++; 355 mp_maxid = mp_ncpus - 1; 356 #endif 357 max_apic_id = max(apic_id, max_apic_id); 358 } 359 360 static void 361 madt_add_cpu(u_int acpi_id, u_int apic_id, u_int flags) 362 { 363 struct lapic_info *la; 364 365 /* 366 * The MADT does not include a BSP flag, so we have to let the 367 * MP code figure out which CPU is the BSP on its own. 368 */ 369 if (bootverbose) 370 printf("MADT: Found CPU APIC ID %u ACPI ID %u: %s\n", 371 apic_id, acpi_id, flags & ACPI_MADT_ENABLED ? 372 "enabled" : "disabled"); 373 if (!(flags & ACPI_MADT_ENABLED)) 374 return; 375 if (apic_id > max_apic_id) { 376 printf("MADT: Ignoring local APIC ID %u (too high)\n", 377 apic_id); 378 return; 379 } 380 381 la = &lapics[apic_id]; 382 KASSERT(la->la_enabled == 0, ("Duplicate local APIC ID %u", apic_id)); 383 la->la_enabled = 1; 384 la->la_acpi_id = acpi_id; 385 lapic_create(apic_id, 0); 386 } 387 388 static void 389 madt_probe_cpus_handler(ACPI_SUBTABLE_HEADER *entry, void *arg) 390 { 391 ACPI_MADT_LOCAL_APIC *proc; 392 ACPI_MADT_LOCAL_X2APIC *x2apic; 393 394 switch (entry->Type) { 395 case ACPI_MADT_TYPE_LOCAL_APIC: 396 proc = (ACPI_MADT_LOCAL_APIC *)entry; 397 madt_parse_cpu(proc->Id, proc->LapicFlags); 398 break; 399 case ACPI_MADT_TYPE_LOCAL_X2APIC: 400 x2apic = (ACPI_MADT_LOCAL_X2APIC *)entry; 401 madt_parse_cpu(x2apic->LocalApicId, x2apic->LapicFlags); 402 break; 403 } 404 } 405 406 static void 407 madt_setup_cpus_handler(ACPI_SUBTABLE_HEADER *entry, void *arg) 408 { 409 ACPI_MADT_LOCAL_APIC *proc; 410 ACPI_MADT_LOCAL_X2APIC *x2apic; 411 412 switch (entry->Type) { 413 case ACPI_MADT_TYPE_LOCAL_APIC: 414 proc = (ACPI_MADT_LOCAL_APIC *)entry; 415 madt_add_cpu(proc->ProcessorId, proc->Id, proc->LapicFlags); 416 break; 417 case ACPI_MADT_TYPE_LOCAL_X2APIC: 418 x2apic = (ACPI_MADT_LOCAL_X2APIC *)entry; 419 madt_add_cpu(x2apic->Uid, x2apic->LocalApicId, 420 x2apic->LapicFlags); 421 break; 422 } 423 } 424 425 /* 426 * Add an I/O APIC from an entry in the table. 427 */ 428 static void 429 madt_parse_apics(ACPI_SUBTABLE_HEADER *entry, void *arg __unused) 430 { 431 ACPI_MADT_IO_APIC *apic; 432 433 switch (entry->Type) { 434 case ACPI_MADT_TYPE_IO_APIC: 435 apic = (ACPI_MADT_IO_APIC *)entry; 436 if (bootverbose) 437 printf( 438 "MADT: Found IO APIC ID %u, Interrupt %u at %p\n", 439 apic->Id, apic->GlobalIrqBase, 440 (void *)(uintptr_t)apic->Address); 441 if (apic->Id > IOAPIC_MAX_ID) 442 panic("%s: I/O APIC ID %u too high", __func__, 443 apic->Id); 444 if (ioapics[apic->Id].io_apic != NULL) 445 panic("%s: Double APIC ID %u", __func__, apic->Id); 446 ioapics[apic->Id].io_apic = ioapic_create(apic->Address, 447 apic->Id, apic->GlobalIrqBase); 448 ioapics[apic->Id].io_vector = apic->GlobalIrqBase; 449 break; 450 default: 451 break; 452 } 453 } 454 455 /* 456 * Determine properties of an interrupt source. Note that for ACPI these 457 * functions are only used for ISA interrupts, so we assume ISA bus values 458 * (Active Hi, Edge Triggered) for conforming values except for the ACPI 459 * SCI for which we use Active Lo, Level Triggered. 460 */ 461 static enum intr_polarity 462 interrupt_polarity(UINT16 IntiFlags, UINT8 Source) 463 { 464 465 switch (IntiFlags & ACPI_MADT_POLARITY_MASK) { 466 default: 467 printf("WARNING: Bogus Interrupt Polarity. Assume CONFORMS\n"); 468 /* FALLTHROUGH*/ 469 case ACPI_MADT_POLARITY_CONFORMS: 470 if (Source == AcpiGbl_FADT.SciInterrupt) 471 return (INTR_POLARITY_LOW); 472 else 473 return (INTR_POLARITY_HIGH); 474 case ACPI_MADT_POLARITY_ACTIVE_HIGH: 475 return (INTR_POLARITY_HIGH); 476 case ACPI_MADT_POLARITY_ACTIVE_LOW: 477 return (INTR_POLARITY_LOW); 478 } 479 } 480 481 static enum intr_trigger 482 interrupt_trigger(UINT16 IntiFlags, UINT8 Source) 483 { 484 485 switch (IntiFlags & ACPI_MADT_TRIGGER_MASK) { 486 default: 487 printf("WARNING: Bogus Interrupt Trigger Mode. Assume CONFORMS.\n"); 488 /*FALLTHROUGH*/ 489 case ACPI_MADT_TRIGGER_CONFORMS: 490 if (Source == AcpiGbl_FADT.SciInterrupt) 491 return (INTR_TRIGGER_LEVEL); 492 else 493 return (INTR_TRIGGER_EDGE); 494 case ACPI_MADT_TRIGGER_EDGE: 495 return (INTR_TRIGGER_EDGE); 496 case ACPI_MADT_TRIGGER_LEVEL: 497 return (INTR_TRIGGER_LEVEL); 498 } 499 } 500 501 /* 502 * Find the local APIC ID associated with a given ACPI Processor ID. 503 */ 504 static int 505 madt_find_cpu(u_int acpi_id, u_int *apic_id) 506 { 507 int i; 508 509 for (i = 0; i <= max_apic_id; i++) { 510 if (!lapics[i].la_enabled) 511 continue; 512 if (lapics[i].la_acpi_id != acpi_id) 513 continue; 514 *apic_id = i; 515 return (0); 516 } 517 return (ENOENT); 518 } 519 520 /* 521 * Find the IO APIC and pin on that APIC associated with a given global 522 * interrupt. 523 */ 524 static int 525 madt_find_interrupt(int intr, void **apic, u_int *pin) 526 { 527 int i, best; 528 529 best = -1; 530 for (i = 0; i <= IOAPIC_MAX_ID; i++) { 531 if (ioapics[i].io_apic == NULL || 532 ioapics[i].io_vector > intr) 533 continue; 534 if (best == -1 || 535 ioapics[best].io_vector < ioapics[i].io_vector) 536 best = i; 537 } 538 if (best == -1) 539 return (ENOENT); 540 *apic = ioapics[best].io_apic; 541 *pin = intr - ioapics[best].io_vector; 542 if (*pin > 32) 543 printf("WARNING: Found intpin of %u for vector %d\n", *pin, 544 intr); 545 return (0); 546 } 547 548 void 549 madt_parse_interrupt_values(void *entry, 550 enum intr_trigger *trig, enum intr_polarity *pol) 551 { 552 ACPI_MADT_INTERRUPT_OVERRIDE *intr; 553 char buf[64]; 554 555 intr = entry; 556 557 if (bootverbose) 558 printf("MADT: Interrupt override: source %u, irq %u\n", 559 intr->SourceIrq, intr->GlobalIrq); 560 KASSERT(intr->Bus == 0, ("bus for interrupt overrides must be zero")); 561 562 /* 563 * Lookup the appropriate trigger and polarity modes for this 564 * entry. 565 */ 566 *trig = interrupt_trigger(intr->IntiFlags, intr->SourceIrq); 567 *pol = interrupt_polarity(intr->IntiFlags, intr->SourceIrq); 568 569 /* 570 * If the SCI is identity mapped but has edge trigger and 571 * active-hi polarity or the force_sci_lo tunable is set, 572 * force it to use level/lo. 573 */ 574 if (intr->SourceIrq == AcpiGbl_FADT.SciInterrupt) { 575 madt_found_sci_override = 1; 576 if (getenv_string("hw.acpi.sci.trigger", buf, sizeof(buf))) { 577 if (tolower(buf[0]) == 'e') 578 *trig = INTR_TRIGGER_EDGE; 579 else if (tolower(buf[0]) == 'l') 580 *trig = INTR_TRIGGER_LEVEL; 581 else 582 panic( 583 "Invalid trigger %s: must be 'edge' or 'level'", 584 buf); 585 printf("MADT: Forcing SCI to %s trigger\n", 586 *trig == INTR_TRIGGER_EDGE ? "edge" : "level"); 587 } 588 if (getenv_string("hw.acpi.sci.polarity", buf, sizeof(buf))) { 589 if (tolower(buf[0]) == 'h') 590 *pol = INTR_POLARITY_HIGH; 591 else if (tolower(buf[0]) == 'l') 592 *pol = INTR_POLARITY_LOW; 593 else 594 panic( 595 "Invalid polarity %s: must be 'high' or 'low'", 596 buf); 597 printf("MADT: Forcing SCI to active %s polarity\n", 598 *pol == INTR_POLARITY_HIGH ? "high" : "low"); 599 } 600 } 601 } 602 603 /* 604 * Parse an interrupt source override for an ISA interrupt. 605 */ 606 static void 607 madt_parse_interrupt_override(ACPI_MADT_INTERRUPT_OVERRIDE *intr) 608 { 609 void *new_ioapic, *old_ioapic; 610 u_int new_pin, old_pin; 611 enum intr_trigger trig; 612 enum intr_polarity pol; 613 614 if (acpi_quirks & ACPI_Q_MADT_IRQ0 && intr->SourceIrq == 0 && 615 intr->GlobalIrq == 2) { 616 if (bootverbose) 617 printf("MADT: Skipping timer override\n"); 618 return; 619 } 620 621 if (madt_find_interrupt(intr->GlobalIrq, &new_ioapic, &new_pin) != 0) { 622 printf("MADT: Could not find APIC for vector %u (IRQ %u)\n", 623 intr->GlobalIrq, intr->SourceIrq); 624 return; 625 } 626 627 madt_parse_interrupt_values(intr, &trig, &pol); 628 629 /* Remap the IRQ if it is mapped to a different interrupt vector. */ 630 if (intr->SourceIrq != intr->GlobalIrq) { 631 /* 632 * If the SCI is remapped to a non-ISA global interrupt, 633 * then override the vector we use to setup and allocate 634 * the interrupt. 635 */ 636 if (intr->GlobalIrq > 15 && 637 intr->SourceIrq == AcpiGbl_FADT.SciInterrupt) 638 acpi_OverrideInterruptLevel(intr->GlobalIrq); 639 else 640 ioapic_remap_vector(new_ioapic, new_pin, 641 intr->SourceIrq); 642 if (madt_find_interrupt(intr->SourceIrq, &old_ioapic, 643 &old_pin) != 0) 644 printf("MADT: Could not find APIC for source IRQ %u\n", 645 intr->SourceIrq); 646 else if (ioapic_get_vector(old_ioapic, old_pin) == 647 intr->SourceIrq) 648 ioapic_disable_pin(old_ioapic, old_pin); 649 } 650 651 /* Program the polarity and trigger mode. */ 652 ioapic_set_triggermode(new_ioapic, new_pin, trig); 653 ioapic_set_polarity(new_ioapic, new_pin, pol); 654 } 655 656 /* 657 * Parse an entry for an NMI routed to an IO APIC. 658 */ 659 static void 660 madt_parse_nmi(ACPI_MADT_NMI_SOURCE *nmi) 661 { 662 void *ioapic; 663 u_int pin; 664 665 if (madt_find_interrupt(nmi->GlobalIrq, &ioapic, &pin) != 0) { 666 printf("MADT: Could not find APIC for vector %u\n", 667 nmi->GlobalIrq); 668 return; 669 } 670 671 ioapic_set_nmi(ioapic, pin); 672 if (!(nmi->IntiFlags & ACPI_MADT_TRIGGER_CONFORMS)) 673 ioapic_set_triggermode(ioapic, pin, 674 interrupt_trigger(nmi->IntiFlags, 0)); 675 if (!(nmi->IntiFlags & ACPI_MADT_POLARITY_CONFORMS)) 676 ioapic_set_polarity(ioapic, pin, 677 interrupt_polarity(nmi->IntiFlags, 0)); 678 } 679 680 /* 681 * Parse an entry for an NMI routed to a local APIC LVT pin. 682 */ 683 static void 684 madt_handle_local_nmi(u_int acpi_id, UINT8 Lint, UINT16 IntiFlags) 685 { 686 u_int apic_id, pin; 687 688 if (acpi_id == 0xffffffff) 689 apic_id = APIC_ID_ALL; 690 else if (madt_find_cpu(acpi_id, &apic_id) != 0) { 691 if (bootverbose) 692 printf("MADT: Ignoring local NMI routed to " 693 "ACPI CPU %u\n", acpi_id); 694 return; 695 } 696 if (Lint == 0) 697 pin = APIC_LVT_LINT0; 698 else 699 pin = APIC_LVT_LINT1; 700 lapic_set_lvt_mode(apic_id, pin, APIC_LVT_DM_NMI); 701 if (!(IntiFlags & ACPI_MADT_TRIGGER_CONFORMS)) 702 lapic_set_lvt_triggermode(apic_id, pin, 703 interrupt_trigger(IntiFlags, 0)); 704 if (!(IntiFlags & ACPI_MADT_POLARITY_CONFORMS)) 705 lapic_set_lvt_polarity(apic_id, pin, 706 interrupt_polarity(IntiFlags, 0)); 707 } 708 709 static void 710 madt_parse_local_nmi(ACPI_MADT_LOCAL_APIC_NMI *nmi) 711 { 712 713 madt_handle_local_nmi(nmi->ProcessorId == 0xff ? 0xffffffff : 714 nmi->ProcessorId, nmi->Lint, nmi->IntiFlags); 715 } 716 717 static void 718 madt_parse_local_x2apic_nmi(ACPI_MADT_LOCAL_X2APIC_NMI *nmi) 719 { 720 721 madt_handle_local_nmi(nmi->Uid, nmi->Lint, nmi->IntiFlags); 722 } 723 724 /* 725 * Parse interrupt entries. 726 */ 727 static void 728 madt_parse_ints(ACPI_SUBTABLE_HEADER *entry, void *arg __unused) 729 { 730 731 switch (entry->Type) { 732 case ACPI_MADT_TYPE_INTERRUPT_OVERRIDE: 733 madt_parse_interrupt_override( 734 (ACPI_MADT_INTERRUPT_OVERRIDE *)entry); 735 break; 736 case ACPI_MADT_TYPE_NMI_SOURCE: 737 madt_parse_nmi((ACPI_MADT_NMI_SOURCE *)entry); 738 break; 739 case ACPI_MADT_TYPE_LOCAL_APIC_NMI: 740 madt_parse_local_nmi((ACPI_MADT_LOCAL_APIC_NMI *)entry); 741 break; 742 case ACPI_MADT_TYPE_LOCAL_X2APIC_NMI: 743 madt_parse_local_x2apic_nmi( 744 (ACPI_MADT_LOCAL_X2APIC_NMI *)entry); 745 break; 746 } 747 } 748 749 /* 750 * Setup per-CPU ACPI IDs. 751 */ 752 static void 753 madt_set_ids(void *dummy) 754 { 755 struct lapic_info *la; 756 struct pcpu *pc; 757 u_int i; 758 759 if (madt == NULL) 760 return; 761 762 KASSERT(lapics != NULL, ("local APICs not initialized")); 763 764 CPU_FOREACH(i) { 765 pc = pcpu_find(i); 766 KASSERT(pc != NULL, ("no pcpu data for CPU %u", i)); 767 la = &lapics[pc->pc_apic_id]; 768 if (!la->la_enabled) 769 panic("APIC: CPU with APIC ID %u is not enabled", 770 pc->pc_apic_id); 771 pc->pc_acpi_id = la->la_acpi_id; 772 if (bootverbose) 773 printf("APIC: CPU %u has ACPI ID %u\n", i, 774 la->la_acpi_id); 775 } 776 } 777 SYSINIT(madt_set_ids, SI_SUB_CPU, SI_ORDER_MIDDLE, madt_set_ids, NULL); 778