1 /*- 2 * Copyright (c) 1997, Stefan Esser <se@FreeBSD.ORG> 3 * Copyright (c) 1997, 1998, 1999, Kenneth D. Merry <ken@FreeBSD.ORG> 4 * All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice unmodified, this list of conditions, and the following 11 * disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 20 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 21 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 22 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 23 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 24 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 25 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 * 29 */ 30 31 #ifndef _SYS_PCIIO_H_ 32 #define _SYS_PCIIO_H_ 33 34 #include <sys/ioccom.h> 35 36 #define PCI_MAXNAMELEN 16 37 38 typedef enum { 39 PCI_GETCONF_LAST_DEVICE, 40 PCI_GETCONF_LIST_CHANGED, 41 PCI_GETCONF_MORE_DEVS, 42 PCI_GETCONF_ERROR 43 } pci_getconf_status; 44 45 typedef enum { 46 PCI_GETCONF_NO_MATCH = 0x0000, 47 PCI_GETCONF_MATCH_DOMAIN = 0x0001, 48 PCI_GETCONF_MATCH_BUS = 0x0002, 49 PCI_GETCONF_MATCH_DEV = 0x0004, 50 PCI_GETCONF_MATCH_FUNC = 0x0008, 51 PCI_GETCONF_MATCH_NAME = 0x0010, 52 PCI_GETCONF_MATCH_UNIT = 0x0020, 53 PCI_GETCONF_MATCH_VENDOR = 0x0040, 54 PCI_GETCONF_MATCH_DEVICE = 0x0080, 55 PCI_GETCONF_MATCH_CLASS = 0x0100 56 } pci_getconf_flags; 57 58 struct pcisel { 59 u_int32_t pc_domain; /* domain number */ 60 u_int8_t pc_bus; /* bus number */ 61 u_int8_t pc_dev; /* device on this bus */ 62 u_int8_t pc_func; /* function on this device */ 63 }; 64 65 struct pci_conf { 66 struct pcisel pc_sel; /* domain+bus+slot+function */ 67 u_int8_t pc_hdr; /* PCI header type */ 68 u_int16_t pc_subvendor; /* card vendor ID */ 69 u_int16_t pc_subdevice; /* card device ID, assigned by 70 card vendor */ 71 u_int16_t pc_vendor; /* chip vendor ID */ 72 u_int16_t pc_device; /* chip device ID, assigned by 73 chip vendor */ 74 u_int8_t pc_class; /* chip PCI class */ 75 u_int8_t pc_subclass; /* chip PCI subclass */ 76 u_int8_t pc_progif; /* chip PCI programming interface */ 77 u_int8_t pc_revid; /* chip revision ID */ 78 char pd_name[PCI_MAXNAMELEN + 1]; /* device name */ 79 u_long pd_unit; /* device unit number */ 80 }; 81 82 struct pci_match_conf { 83 struct pcisel pc_sel; /* domain+bus+slot+function */ 84 char pd_name[PCI_MAXNAMELEN + 1]; /* device name */ 85 u_long pd_unit; /* Unit number */ 86 u_int16_t pc_vendor; /* PCI Vendor ID */ 87 u_int16_t pc_device; /* PCI Device ID */ 88 u_int8_t pc_class; /* PCI class */ 89 pci_getconf_flags flags; /* Matching expression */ 90 }; 91 92 struct pci_conf_io { 93 u_int32_t pat_buf_len; /* pattern buffer length */ 94 u_int32_t num_patterns; /* number of patterns */ 95 struct pci_match_conf *patterns; /* pattern buffer */ 96 u_int32_t match_buf_len; /* match buffer length */ 97 u_int32_t num_matches; /* number of matches returned */ 98 struct pci_conf *matches; /* match buffer */ 99 u_int32_t offset; /* offset into device list */ 100 u_int32_t generation; /* device list generation */ 101 pci_getconf_status status; /* request status */ 102 }; 103 104 struct pci_io { 105 struct pcisel pi_sel; /* device to operate on */ 106 int pi_reg; /* configuration register to examine */ 107 int pi_width; /* width (in bytes) of read or write */ 108 u_int32_t pi_data; /* data to write or result of read */ 109 }; 110 111 struct pci_bar_io { 112 struct pcisel pbi_sel; /* device to operate on */ 113 int pbi_reg; /* starting address of BAR */ 114 int pbi_enabled; /* decoding enabled */ 115 uint64_t pbi_base; /* current value of BAR */ 116 uint64_t pbi_length; /* length of BAR */ 117 }; 118 119 #define PCIOCGETCONF _IOWR('p', 5, struct pci_conf_io) 120 #define PCIOCREAD _IOWR('p', 2, struct pci_io) 121 #define PCIOCWRITE _IOWR('p', 3, struct pci_io) 122 #define PCIOCATTACHED _IOWR('p', 4, struct pci_io) 123 #define PCIOCGETBAR _IOWR('p', 6, struct pci_bar_io) 124 125 #endif /* !_SYS_PCIIO_H_ */ 126