xref: /freebsd/sys/riscv/vmm/vmm_sbi.c (revision 4eee1381396714175495b395bd6e74b263b2b16d)
1d3916eacSRuslan Bukin /*-
2d3916eacSRuslan Bukin  * SPDX-License-Identifier: BSD-2-Clause
3d3916eacSRuslan Bukin  *
4*4eee1381SRuslan Bukin  * Copyright (c) 2024-2025 Ruslan Bukin <br@bsdpad.com>
5d3916eacSRuslan Bukin  *
6d3916eacSRuslan Bukin  * This software was developed by the University of Cambridge Computer
7d3916eacSRuslan Bukin  * Laboratory (Department of Computer Science and Technology) under Innovate
8d3916eacSRuslan Bukin  * UK project 105694, "Digital Security by Design (DSbD) Technology Platform
9d3916eacSRuslan Bukin  * Prototype".
10d3916eacSRuslan Bukin  *
11d3916eacSRuslan Bukin  * Redistribution and use in source and binary forms, with or without
12d3916eacSRuslan Bukin  * modification, are permitted provided that the following conditions
13d3916eacSRuslan Bukin  * are met:
14d3916eacSRuslan Bukin  * 1. Redistributions of source code must retain the above copyright
15d3916eacSRuslan Bukin  *    notice, this list of conditions and the following disclaimer.
16d3916eacSRuslan Bukin  * 2. Redistributions in binary form must reproduce the above copyright
17d3916eacSRuslan Bukin  *    notice, this list of conditions and the following disclaimer in the
18d3916eacSRuslan Bukin  *    documentation and/or other materials provided with the distribution.
19d3916eacSRuslan Bukin  *
20d3916eacSRuslan Bukin  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
21d3916eacSRuslan Bukin  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
22d3916eacSRuslan Bukin  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
23d3916eacSRuslan Bukin  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
24d3916eacSRuslan Bukin  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
25d3916eacSRuslan Bukin  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
26d3916eacSRuslan Bukin  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
27d3916eacSRuslan Bukin  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
28d3916eacSRuslan Bukin  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
29d3916eacSRuslan Bukin  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
30d3916eacSRuslan Bukin  * SUCH DAMAGE.
31d3916eacSRuslan Bukin  */
32d3916eacSRuslan Bukin 
33d3916eacSRuslan Bukin #include <sys/param.h>
34d3916eacSRuslan Bukin #include <sys/kernel.h>
35d3916eacSRuslan Bukin #include <sys/proc.h>
36d3916eacSRuslan Bukin 
37d3916eacSRuslan Bukin #include <machine/sbi.h>
38d3916eacSRuslan Bukin 
39d3916eacSRuslan Bukin #include "riscv.h"
408f6b66a9SRuslan Bukin #include "vmm_fence.h"
41d3916eacSRuslan Bukin 
42d3916eacSRuslan Bukin static int
vmm_sbi_handle_rfnc(struct vcpu * vcpu,struct hypctx * hypctx)43d3916eacSRuslan Bukin vmm_sbi_handle_rfnc(struct vcpu *vcpu, struct hypctx *hypctx)
44d3916eacSRuslan Bukin {
458f6b66a9SRuslan Bukin 	struct vmm_fence fence;
46*4eee1381SRuslan Bukin 	cpuset_t active_cpus;
478f6b66a9SRuslan Bukin 	uint64_t hart_mask;
488f6b66a9SRuslan Bukin 	uint64_t hart_mask_base;
49d3916eacSRuslan Bukin 	uint64_t func_id;
508f6b66a9SRuslan Bukin 	struct hyp *hyp;
518f6b66a9SRuslan Bukin 	uint16_t maxcpus;
528f6b66a9SRuslan Bukin 	cpuset_t cpus;
538f6b66a9SRuslan Bukin 	int i;
54d3916eacSRuslan Bukin 
55d3916eacSRuslan Bukin 	func_id = hypctx->guest_regs.hyp_a[6];
56d3916eacSRuslan Bukin 	hart_mask = hypctx->guest_regs.hyp_a[0];
578f6b66a9SRuslan Bukin 	hart_mask_base = hypctx->guest_regs.hyp_a[1];
58d3916eacSRuslan Bukin 
598f6b66a9SRuslan Bukin 	/* Construct vma_fence. */
60d3916eacSRuslan Bukin 
618f6b66a9SRuslan Bukin 	fence.start = hypctx->guest_regs.hyp_a[2];
628f6b66a9SRuslan Bukin 	fence.size = hypctx->guest_regs.hyp_a[3];
638f6b66a9SRuslan Bukin 	fence.asid = hypctx->guest_regs.hyp_a[4];
64d3916eacSRuslan Bukin 
65d3916eacSRuslan Bukin 	switch (func_id) {
66d3916eacSRuslan Bukin 	case SBI_RFNC_REMOTE_FENCE_I:
678f6b66a9SRuslan Bukin 		fence.type = VMM_RISCV_FENCE_I;
68d3916eacSRuslan Bukin 		break;
69d3916eacSRuslan Bukin 	case SBI_RFNC_REMOTE_SFENCE_VMA:
708f6b66a9SRuslan Bukin 		fence.type = VMM_RISCV_FENCE_VMA;
71d3916eacSRuslan Bukin 		break;
72d3916eacSRuslan Bukin 	case SBI_RFNC_REMOTE_SFENCE_VMA_ASID:
738f6b66a9SRuslan Bukin 		fence.type = VMM_RISCV_FENCE_VMA_ASID;
74d3916eacSRuslan Bukin 		break;
75d3916eacSRuslan Bukin 	default:
76*4eee1381SRuslan Bukin 		return (SBI_ERR_NOT_SUPPORTED);
77d3916eacSRuslan Bukin 	}
78d3916eacSRuslan Bukin 
798f6b66a9SRuslan Bukin 	/* Construct cpuset_t from the mask supplied. */
808f6b66a9SRuslan Bukin 	CPU_ZERO(&cpus);
818f6b66a9SRuslan Bukin 	hyp = hypctx->hyp;
82*4eee1381SRuslan Bukin 	active_cpus = vm_active_cpus(hyp->vm);
838f6b66a9SRuslan Bukin 	maxcpus = vm_get_maxcpus(hyp->vm);
848f6b66a9SRuslan Bukin 	for (i = 0; i < maxcpus; i++) {
858f6b66a9SRuslan Bukin 		vcpu = vm_vcpu(hyp->vm, i);
868f6b66a9SRuslan Bukin 		if (vcpu == NULL)
878f6b66a9SRuslan Bukin 			continue;
888f6b66a9SRuslan Bukin 		if (hart_mask_base != -1UL) {
89*4eee1381SRuslan Bukin 			if (i < hart_mask_base)
908f6b66a9SRuslan Bukin 				continue;
91*4eee1381SRuslan Bukin 			if (!(hart_mask & (1UL << (i - hart_mask_base))))
928f6b66a9SRuslan Bukin 				continue;
938f6b66a9SRuslan Bukin 		}
94*4eee1381SRuslan Bukin 		/*
95*4eee1381SRuslan Bukin 		 * If either hart_mask_base or at least one hartid from
96*4eee1381SRuslan Bukin 		 * hart_mask is not valid, then return error.
97*4eee1381SRuslan Bukin 		 */
98*4eee1381SRuslan Bukin 		if (!CPU_ISSET(i, &active_cpus))
99*4eee1381SRuslan Bukin 			return (SBI_ERR_INVALID_PARAM);
1008f6b66a9SRuslan Bukin 		CPU_SET(i, &cpus);
1018f6b66a9SRuslan Bukin 	}
1028f6b66a9SRuslan Bukin 
103*4eee1381SRuslan Bukin 	if (CPU_EMPTY(&cpus))
104*4eee1381SRuslan Bukin 		return (SBI_ERR_INVALID_PARAM);
105*4eee1381SRuslan Bukin 
1068f6b66a9SRuslan Bukin 	vmm_fence_add(hyp->vm, &cpus, &fence);
107d3916eacSRuslan Bukin 
108*4eee1381SRuslan Bukin 	return (SBI_SUCCESS);
109d3916eacSRuslan Bukin }
110d3916eacSRuslan Bukin 
111d3916eacSRuslan Bukin static int
vmm_sbi_handle_time(struct vcpu * vcpu,struct hypctx * hypctx)1129be0058eSRuslan Bukin vmm_sbi_handle_time(struct vcpu *vcpu, struct hypctx *hypctx)
1139be0058eSRuslan Bukin {
1149be0058eSRuslan Bukin 	uint64_t func_id;
1159be0058eSRuslan Bukin 	uint64_t next_val;
1169be0058eSRuslan Bukin 
1179be0058eSRuslan Bukin 	func_id = hypctx->guest_regs.hyp_a[6];
1189be0058eSRuslan Bukin 	next_val = hypctx->guest_regs.hyp_a[0];
1199be0058eSRuslan Bukin 
1209be0058eSRuslan Bukin 	switch (func_id) {
1219be0058eSRuslan Bukin 	case SBI_TIME_SET_TIMER:
1229be0058eSRuslan Bukin 		vtimer_set_timer(hypctx, next_val);
1239be0058eSRuslan Bukin 		break;
1249be0058eSRuslan Bukin 	default:
125*4eee1381SRuslan Bukin 		return (SBI_ERR_NOT_SUPPORTED);
1269be0058eSRuslan Bukin 	}
1279be0058eSRuslan Bukin 
128*4eee1381SRuslan Bukin 	return (SBI_SUCCESS);
1299be0058eSRuslan Bukin }
1309be0058eSRuslan Bukin 
1319be0058eSRuslan Bukin static int
vmm_sbi_handle_ipi(struct vcpu * vcpu,struct hypctx * hypctx)132d3916eacSRuslan Bukin vmm_sbi_handle_ipi(struct vcpu *vcpu, struct hypctx *hypctx)
133d3916eacSRuslan Bukin {
134d3916eacSRuslan Bukin 	cpuset_t active_cpus;
135d3916eacSRuslan Bukin 	struct hyp *hyp;
136d3916eacSRuslan Bukin 	uint64_t hart_mask;
137c7e0b94bSRuslan Bukin 	uint64_t hart_mask_base;
138d3916eacSRuslan Bukin 	uint64_t func_id;
139*4eee1381SRuslan Bukin 	cpuset_t cpus;
140d3916eacSRuslan Bukin 	int hart_id;
141d3916eacSRuslan Bukin 	int bit;
142d3916eacSRuslan Bukin 
143d3916eacSRuslan Bukin 	func_id = hypctx->guest_regs.hyp_a[6];
144d3916eacSRuslan Bukin 	hart_mask = hypctx->guest_regs.hyp_a[0];
145c7e0b94bSRuslan Bukin 	hart_mask_base = hypctx->guest_regs.hyp_a[1];
146d3916eacSRuslan Bukin 
147d3916eacSRuslan Bukin 	dprintf("%s: hart_mask %lx\n", __func__, hart_mask);
148d3916eacSRuslan Bukin 
149d3916eacSRuslan Bukin 	hyp = hypctx->hyp;
150d3916eacSRuslan Bukin 
151d3916eacSRuslan Bukin 	active_cpus = vm_active_cpus(hyp->vm);
152d3916eacSRuslan Bukin 
153*4eee1381SRuslan Bukin 	CPU_ZERO(&cpus);
154d3916eacSRuslan Bukin 	switch (func_id) {
155d3916eacSRuslan Bukin 	case SBI_IPI_SEND_IPI:
156d3916eacSRuslan Bukin 		while ((bit = ffs(hart_mask))) {
157d3916eacSRuslan Bukin 			hart_id = (bit - 1);
158d3916eacSRuslan Bukin 			hart_mask &= ~(1u << hart_id);
159c7e0b94bSRuslan Bukin 			if (hart_mask_base != -1)
160c7e0b94bSRuslan Bukin 				hart_id += hart_mask_base;
161*4eee1381SRuslan Bukin 			if (!CPU_ISSET(hart_id, &active_cpus))
162*4eee1381SRuslan Bukin 				return (SBI_ERR_INVALID_PARAM);
163*4eee1381SRuslan Bukin 			CPU_SET(hart_id, &cpus);
164d3916eacSRuslan Bukin 		}
165d3916eacSRuslan Bukin 		break;
166d3916eacSRuslan Bukin 	default:
167*4eee1381SRuslan Bukin 		dprintf("%s: unknown func %ld\n", __func__, func_id);
168*4eee1381SRuslan Bukin 		return (SBI_ERR_NOT_SUPPORTED);
169d3916eacSRuslan Bukin 	}
170d3916eacSRuslan Bukin 
171*4eee1381SRuslan Bukin 	if (CPU_EMPTY(&cpus))
172*4eee1381SRuslan Bukin 		return (SBI_ERR_INVALID_PARAM);
173d3916eacSRuslan Bukin 
174*4eee1381SRuslan Bukin 	riscv_send_ipi(hyp, &cpus);
175*4eee1381SRuslan Bukin 
176*4eee1381SRuslan Bukin 	return (SBI_SUCCESS);
177d3916eacSRuslan Bukin }
178d3916eacSRuslan Bukin 
179*4eee1381SRuslan Bukin bool
vmm_sbi_ecall(struct vcpu * vcpu)180*4eee1381SRuslan Bukin vmm_sbi_ecall(struct vcpu *vcpu)
181d3916eacSRuslan Bukin {
182*4eee1381SRuslan Bukin 	int sbi_extension_id;
183d3916eacSRuslan Bukin 	struct hypctx *hypctx;
1848f6b66a9SRuslan Bukin 	int error;
185d3916eacSRuslan Bukin 
186d3916eacSRuslan Bukin 	hypctx = riscv_get_active_vcpu();
187d3916eacSRuslan Bukin 	sbi_extension_id = hypctx->guest_regs.hyp_a[7];
188d3916eacSRuslan Bukin 
189d3916eacSRuslan Bukin 	dprintf("%s: args %lx %lx %lx %lx %lx %lx %lx %lx\n", __func__,
190d3916eacSRuslan Bukin 	    hypctx->guest_regs.hyp_a[0],
191d3916eacSRuslan Bukin 	    hypctx->guest_regs.hyp_a[1],
192d3916eacSRuslan Bukin 	    hypctx->guest_regs.hyp_a[2],
193d3916eacSRuslan Bukin 	    hypctx->guest_regs.hyp_a[3],
194d3916eacSRuslan Bukin 	    hypctx->guest_regs.hyp_a[4],
195d3916eacSRuslan Bukin 	    hypctx->guest_regs.hyp_a[5],
196d3916eacSRuslan Bukin 	    hypctx->guest_regs.hyp_a[6],
197d3916eacSRuslan Bukin 	    hypctx->guest_regs.hyp_a[7]);
198d3916eacSRuslan Bukin 
199d3916eacSRuslan Bukin 	switch (sbi_extension_id) {
200d3916eacSRuslan Bukin 	case SBI_EXT_ID_RFNC:
2018f6b66a9SRuslan Bukin 		error = vmm_sbi_handle_rfnc(vcpu, hypctx);
202d3916eacSRuslan Bukin 		break;
203d3916eacSRuslan Bukin 	case SBI_EXT_ID_TIME:
204*4eee1381SRuslan Bukin 		error = vmm_sbi_handle_time(vcpu, hypctx);
205d3916eacSRuslan Bukin 		break;
206d3916eacSRuslan Bukin 	case SBI_EXT_ID_IPI:
207*4eee1381SRuslan Bukin 		error = vmm_sbi_handle_ipi(vcpu, hypctx);
208d3916eacSRuslan Bukin 		break;
209d3916eacSRuslan Bukin 	default:
210*4eee1381SRuslan Bukin 		/* Return to handle in userspace. */
211*4eee1381SRuslan Bukin 		return (false);
212d3916eacSRuslan Bukin 	}
213d3916eacSRuslan Bukin 
214*4eee1381SRuslan Bukin 	hypctx->guest_regs.hyp_a[0] = error;
215*4eee1381SRuslan Bukin 
216*4eee1381SRuslan Bukin 	/* Request is handled in kernel mode. */
217*4eee1381SRuslan Bukin 	return (true);
218d3916eacSRuslan Bukin }
219