1 /* 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (c) 2015 Mihai Carabas <mihai.carabas@gmail.com> 5 * Copyright (c) 2024 Ruslan Bukin <br@bsdpad.com> 6 * 7 * This software was developed by the University of Cambridge Computer 8 * Laboratory (Department of Computer Science and Technology) under Innovate 9 * UK project 105694, "Digital Security by Design (DSbD) Technology Platform 10 * Prototype". 11 * 12 * Redistribution and use in source and binary forms, with or without 13 * modification, are permitted provided that the following conditions 14 * are met: 15 * 1. Redistributions of source code must retain the above copyright 16 * notice, this list of conditions and the following disclaimer. 17 * 2. Redistributions in binary form must reproduce the above copyright 18 * notice, this list of conditions and the following disclaimer in the 19 * documentation and/or other materials provided with the distribution. 20 * 21 * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND 22 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 23 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 24 * ARE DISCLAIMED. IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE 25 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 26 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 27 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 28 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 29 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 30 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 31 * SUCH DAMAGE. 32 */ 33 34 #ifndef _VMM_DEV_H_ 35 #define _VMM_DEV_H_ 36 37 #include <sys/domainset.h> 38 39 #include <machine/vmm.h> 40 41 #include <dev/vmm/vmm_param.h> 42 43 struct vm_memmap { 44 vm_paddr_t gpa; 45 int segid; /* memory segment */ 46 vm_ooffset_t segoff; /* offset into memory segment */ 47 size_t len; /* mmap length */ 48 int prot; /* RWX */ 49 int flags; 50 }; 51 #define VM_MEMMAP_F_WIRED 0x01 52 53 struct vm_munmap { 54 vm_paddr_t gpa; 55 size_t len; 56 }; 57 58 #define VM_MEMSEG_NAME(m) ((m)->name[0] != '\0' ? (m)->name : NULL) 59 struct vm_memseg { 60 int segid; 61 size_t len; 62 char name[VM_MAX_SUFFIXLEN + 1]; 63 domainset_t *ds_mask; 64 size_t ds_mask_size; 65 int ds_policy; 66 }; 67 68 struct vm_register { 69 int cpuid; 70 int regnum; /* enum vm_reg_name */ 71 uint64_t regval; 72 }; 73 74 struct vm_register_set { 75 int cpuid; 76 unsigned int count; 77 const int *regnums; /* enum vm_reg_name */ 78 uint64_t *regvals; 79 }; 80 81 struct vm_run { 82 int cpuid; 83 cpuset_t *cpuset; /* CPU set storage */ 84 size_t cpusetsize; 85 struct vm_exit *vm_exit; 86 }; 87 88 struct vm_exception { 89 int cpuid; 90 uint64_t scause; 91 }; 92 93 struct vm_msi { 94 uint64_t msg; 95 uint64_t addr; 96 int bus; 97 int slot; 98 int func; 99 }; 100 101 struct vm_capability { 102 int cpuid; 103 enum vm_cap_type captype; 104 int capval; 105 int allcpus; 106 }; 107 108 #define MAX_VM_STATS 64 109 struct vm_stats { 110 int cpuid; /* in */ 111 int index; /* in */ 112 int num_entries; /* out */ 113 struct timeval tv; 114 uint64_t statbuf[MAX_VM_STATS]; 115 }; 116 struct vm_stat_desc { 117 int index; /* in */ 118 char desc[128]; /* out */ 119 }; 120 121 struct vm_suspend { 122 enum vm_suspend_how how; 123 }; 124 125 struct vm_gla2gpa { 126 int vcpuid; /* inputs */ 127 int prot; /* PROT_READ or PROT_WRITE */ 128 uint64_t gla; 129 struct vm_guest_paging paging; 130 int fault; /* outputs */ 131 uint64_t gpa; 132 }; 133 134 struct vm_activate_cpu { 135 int vcpuid; 136 }; 137 138 struct vm_cpuset { 139 int which; 140 int cpusetsize; 141 cpuset_t *cpus; 142 }; 143 #define VM_ACTIVE_CPUS 0 144 #define VM_SUSPENDED_CPUS 1 145 #define VM_DEBUG_CPUS 2 146 147 struct vm_aplic_descr { 148 uint64_t mem_start; 149 uint64_t mem_size; 150 }; 151 152 struct vm_irq { 153 uint32_t irq; 154 }; 155 156 struct vm_cpu_topology { 157 uint16_t sockets; 158 uint16_t cores; 159 uint16_t threads; 160 uint16_t maxcpus; 161 }; 162 163 enum { 164 /* general routines */ 165 IOCNUM_ABIVERS = 0, 166 IOCNUM_RUN = 1, 167 IOCNUM_SET_CAPABILITY = 2, 168 IOCNUM_GET_CAPABILITY = 3, 169 IOCNUM_SUSPEND = 4, 170 IOCNUM_REINIT = 5, 171 172 /* memory apis */ 173 IOCNUM_GET_GPA_PMAP = 12, 174 IOCNUM_GLA2GPA_NOFAULT = 13, 175 IOCNUM_ALLOC_MEMSEG = 14, 176 IOCNUM_GET_MEMSEG = 15, 177 IOCNUM_MMAP_MEMSEG = 16, 178 IOCNUM_MMAP_GETNEXT = 17, 179 IOCNUM_MUNMAP_MEMSEG = 18, 180 181 /* register/state accessors */ 182 IOCNUM_SET_REGISTER = 20, 183 IOCNUM_GET_REGISTER = 21, 184 IOCNUM_SET_REGISTER_SET = 24, 185 IOCNUM_GET_REGISTER_SET = 25, 186 187 /* statistics */ 188 IOCNUM_VM_STATS = 50, 189 IOCNUM_VM_STAT_DESC = 51, 190 191 /* CPU Topology */ 192 IOCNUM_SET_TOPOLOGY = 63, 193 IOCNUM_GET_TOPOLOGY = 64, 194 195 /* interrupt injection */ 196 IOCNUM_ASSERT_IRQ = 80, 197 IOCNUM_DEASSERT_IRQ = 81, 198 IOCNUM_RAISE_MSI = 82, 199 IOCNUM_INJECT_EXCEPTION = 83, 200 201 /* vm_cpuset */ 202 IOCNUM_ACTIVATE_CPU = 90, 203 IOCNUM_GET_CPUSET = 91, 204 IOCNUM_SUSPEND_CPU = 92, 205 IOCNUM_RESUME_CPU = 93, 206 207 /* vm_attach_aplic */ 208 IOCNUM_ATTACH_APLIC = 110, 209 }; 210 211 #define VM_RUN \ 212 _IOWR('v', IOCNUM_RUN, struct vm_run) 213 #define VM_SUSPEND \ 214 _IOW('v', IOCNUM_SUSPEND, struct vm_suspend) 215 #define VM_REINIT \ 216 _IO('v', IOCNUM_REINIT) 217 #define VM_ALLOC_MEMSEG \ 218 _IOW('v', IOCNUM_ALLOC_MEMSEG, struct vm_memseg) 219 #define VM_GET_MEMSEG \ 220 _IOWR('v', IOCNUM_GET_MEMSEG, struct vm_memseg) 221 #define VM_MMAP_MEMSEG \ 222 _IOW('v', IOCNUM_MMAP_MEMSEG, struct vm_memmap) 223 #define VM_MMAP_GETNEXT \ 224 _IOWR('v', IOCNUM_MMAP_GETNEXT, struct vm_memmap) 225 #define VM_MUNMAP_MEMSEG \ 226 _IOW('v', IOCNUM_MUNMAP_MEMSEG, struct vm_munmap) 227 #define VM_SET_REGISTER \ 228 _IOW('v', IOCNUM_SET_REGISTER, struct vm_register) 229 #define VM_GET_REGISTER \ 230 _IOWR('v', IOCNUM_GET_REGISTER, struct vm_register) 231 #define VM_SET_REGISTER_SET \ 232 _IOW('v', IOCNUM_SET_REGISTER_SET, struct vm_register_set) 233 #define VM_GET_REGISTER_SET \ 234 _IOWR('v', IOCNUM_GET_REGISTER_SET, struct vm_register_set) 235 #define VM_SET_CAPABILITY \ 236 _IOW('v', IOCNUM_SET_CAPABILITY, struct vm_capability) 237 #define VM_GET_CAPABILITY \ 238 _IOWR('v', IOCNUM_GET_CAPABILITY, struct vm_capability) 239 #define VM_STATS \ 240 _IOWR('v', IOCNUM_VM_STATS, struct vm_stats) 241 #define VM_STAT_DESC \ 242 _IOWR('v', IOCNUM_VM_STAT_DESC, struct vm_stat_desc) 243 #define VM_ASSERT_IRQ \ 244 _IOW('v', IOCNUM_ASSERT_IRQ, struct vm_irq) 245 #define VM_DEASSERT_IRQ \ 246 _IOW('v', IOCNUM_DEASSERT_IRQ, struct vm_irq) 247 #define VM_RAISE_MSI \ 248 _IOW('v', IOCNUM_RAISE_MSI, struct vm_msi) 249 #define VM_INJECT_EXCEPTION \ 250 _IOW('v', IOCNUM_INJECT_EXCEPTION, struct vm_exception) 251 #define VM_SET_TOPOLOGY \ 252 _IOW('v', IOCNUM_SET_TOPOLOGY, struct vm_cpu_topology) 253 #define VM_GET_TOPOLOGY \ 254 _IOR('v', IOCNUM_GET_TOPOLOGY, struct vm_cpu_topology) 255 #define VM_GLA2GPA_NOFAULT \ 256 _IOWR('v', IOCNUM_GLA2GPA_NOFAULT, struct vm_gla2gpa) 257 #define VM_ACTIVATE_CPU \ 258 _IOW('v', IOCNUM_ACTIVATE_CPU, struct vm_activate_cpu) 259 #define VM_GET_CPUS \ 260 _IOW('v', IOCNUM_GET_CPUSET, struct vm_cpuset) 261 #define VM_SUSPEND_CPU \ 262 _IOW('v', IOCNUM_SUSPEND_CPU, struct vm_activate_cpu) 263 #define VM_RESUME_CPU \ 264 _IOW('v', IOCNUM_RESUME_CPU, struct vm_activate_cpu) 265 #define VM_ATTACH_APLIC \ 266 _IOW('v', IOCNUM_ATTACH_APLIC, struct vm_aplic_descr) 267 #endif 268