xref: /freebsd/sys/riscv/include/vmm_dev.h (revision 47ef2a131091508e049ab10cad7f91a3c1342cd9)
1 /*
2  * SPDX-License-Identifier: BSD-2-Clause
3  *
4  * Copyright (c) 2015 Mihai Carabas <mihai.carabas@gmail.com>
5  * Copyright (c) 2024 Ruslan Bukin <br@bsdpad.com>
6  *
7  * This software was developed by the University of Cambridge Computer
8  * Laboratory (Department of Computer Science and Technology) under Innovate
9  * UK project 105694, "Digital Security by Design (DSbD) Technology Platform
10  * Prototype".
11  *
12  * Redistribution and use in source and binary forms, with or without
13  * modification, are permitted provided that the following conditions
14  * are met:
15  * 1. Redistributions of source code must retain the above copyright
16  *    notice, this list of conditions and the following disclaimer.
17  * 2. Redistributions in binary form must reproduce the above copyright
18  *    notice, this list of conditions and the following disclaimer in the
19  *    documentation and/or other materials provided with the distribution.
20  *
21  * THIS SOFTWARE IS PROVIDED BY AUTHOR AND CONTRIBUTORS ``AS IS'' AND
22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
24  * ARE DISCLAIMED.  IN NO EVENT SHALL AUTHOR OR CONTRIBUTORS BE LIABLE
25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
31  * SUCH DAMAGE.
32  */
33 
34 #ifndef	_VMM_DEV_H_
35 #define	_VMM_DEV_H_
36 
37 struct vm_memmap {
38 	vm_paddr_t	gpa;
39 	int		segid;		/* memory segment */
40 	vm_ooffset_t	segoff;		/* offset into memory segment */
41 	size_t		len;		/* mmap length */
42 	int		prot;		/* RWX */
43 	int		flags;
44 };
45 #define	VM_MEMMAP_F_WIRED	0x01
46 
47 struct vm_munmap {
48 	vm_paddr_t	gpa;
49 	size_t		len;
50 };
51 
52 #define	VM_MEMSEG_NAME(m)	((m)->name[0] != '\0' ? (m)->name : NULL)
53 struct vm_memseg {
54 	int		segid;
55 	size_t		len;
56 	char		name[VM_MAX_SUFFIXLEN + 1];
57 };
58 
59 struct vm_register {
60 	int		cpuid;
61 	int		regnum;		/* enum vm_reg_name */
62 	uint64_t	regval;
63 };
64 
65 struct vm_register_set {
66 	int		cpuid;
67 	unsigned int	count;
68 	const int	*regnums;	/* enum vm_reg_name */
69 	uint64_t	*regvals;
70 };
71 
72 struct vm_run {
73 	int		cpuid;
74 	cpuset_t	*cpuset;	/* CPU set storage */
75 	size_t		cpusetsize;
76 	struct vm_exit	*vm_exit;
77 };
78 
79 struct vm_exception {
80 	int		cpuid;
81 	uint64_t	scause;
82 };
83 
84 struct vm_msi {
85 	uint64_t	msg;
86 	uint64_t	addr;
87 	int		bus;
88 	int		slot;
89 	int		func;
90 };
91 
92 struct vm_capability {
93 	int		cpuid;
94 	enum vm_cap_type captype;
95 	int		capval;
96 	int		allcpus;
97 };
98 
99 #define	MAX_VM_STATS	64
100 struct vm_stats {
101 	int		cpuid;				/* in */
102 	int		index;				/* in */
103 	int		num_entries;			/* out */
104 	struct timeval	tv;
105 	uint64_t	statbuf[MAX_VM_STATS];
106 };
107 struct vm_stat_desc {
108 	int		index;				/* in */
109 	char		desc[128];			/* out */
110 };
111 
112 struct vm_suspend {
113 	enum vm_suspend_how how;
114 };
115 
116 struct vm_gla2gpa {
117 	int		vcpuid;		/* inputs */
118 	int 		prot;		/* PROT_READ or PROT_WRITE */
119 	uint64_t	gla;
120 	struct vm_guest_paging paging;
121 	int		fault;		/* outputs */
122 	uint64_t	gpa;
123 };
124 
125 struct vm_activate_cpu {
126 	int		vcpuid;
127 };
128 
129 struct vm_cpuset {
130 	int		which;
131 	int		cpusetsize;
132 	cpuset_t	*cpus;
133 };
134 #define	VM_ACTIVE_CPUS		0
135 #define	VM_SUSPENDED_CPUS	1
136 #define	VM_DEBUG_CPUS		2
137 
138 struct vm_aplic_descr {
139 	uint64_t mem_start;
140 	uint64_t mem_size;
141 };
142 
143 struct vm_irq {
144 	uint32_t irq;
145 };
146 
147 struct vm_cpu_topology {
148 	uint16_t	sockets;
149 	uint16_t	cores;
150 	uint16_t	threads;
151 	uint16_t	maxcpus;
152 };
153 
154 enum {
155 	/* general routines */
156 	IOCNUM_ABIVERS = 0,
157 	IOCNUM_RUN = 1,
158 	IOCNUM_SET_CAPABILITY = 2,
159 	IOCNUM_GET_CAPABILITY = 3,
160 	IOCNUM_SUSPEND = 4,
161 	IOCNUM_REINIT = 5,
162 
163 	/* memory apis */
164 	IOCNUM_GET_GPA_PMAP = 12,
165 	IOCNUM_GLA2GPA_NOFAULT = 13,
166 	IOCNUM_ALLOC_MEMSEG = 14,
167 	IOCNUM_GET_MEMSEG = 15,
168 	IOCNUM_MMAP_MEMSEG = 16,
169 	IOCNUM_MMAP_GETNEXT = 17,
170 	IOCNUM_MUNMAP_MEMSEG = 18,
171 
172 	/* register/state accessors */
173 	IOCNUM_SET_REGISTER = 20,
174 	IOCNUM_GET_REGISTER = 21,
175 	IOCNUM_SET_REGISTER_SET = 24,
176 	IOCNUM_GET_REGISTER_SET = 25,
177 
178 	/* statistics */
179 	IOCNUM_VM_STATS = 50,
180 	IOCNUM_VM_STAT_DESC = 51,
181 
182 	/* CPU Topology */
183 	IOCNUM_SET_TOPOLOGY = 63,
184 	IOCNUM_GET_TOPOLOGY = 64,
185 
186 	/* interrupt injection */
187 	IOCNUM_ASSERT_IRQ = 80,
188 	IOCNUM_DEASSERT_IRQ = 81,
189 	IOCNUM_RAISE_MSI = 82,
190 	IOCNUM_INJECT_EXCEPTION = 83,
191 
192 	/* vm_cpuset */
193 	IOCNUM_ACTIVATE_CPU = 90,
194 	IOCNUM_GET_CPUSET = 91,
195 	IOCNUM_SUSPEND_CPU = 92,
196 	IOCNUM_RESUME_CPU = 93,
197 
198 	/* vm_attach_aplic */
199 	IOCNUM_ATTACH_APLIC = 110,
200 };
201 
202 #define	VM_RUN		\
203 	_IOWR('v', IOCNUM_RUN, struct vm_run)
204 #define	VM_SUSPEND	\
205 	_IOW('v', IOCNUM_SUSPEND, struct vm_suspend)
206 #define	VM_REINIT	\
207 	_IO('v', IOCNUM_REINIT)
208 #define	VM_ALLOC_MEMSEG	\
209 	_IOW('v', IOCNUM_ALLOC_MEMSEG, struct vm_memseg)
210 #define	VM_GET_MEMSEG	\
211 	_IOWR('v', IOCNUM_GET_MEMSEG, struct vm_memseg)
212 #define	VM_MMAP_MEMSEG	\
213 	_IOW('v', IOCNUM_MMAP_MEMSEG, struct vm_memmap)
214 #define	VM_MMAP_GETNEXT	\
215 	_IOWR('v', IOCNUM_MMAP_GETNEXT, struct vm_memmap)
216 #define	VM_MUNMAP_MEMSEG	\
217 	_IOW('v', IOCNUM_MUNMAP_MEMSEG, struct vm_munmap)
218 #define	VM_SET_REGISTER \
219 	_IOW('v', IOCNUM_SET_REGISTER, struct vm_register)
220 #define	VM_GET_REGISTER \
221 	_IOWR('v', IOCNUM_GET_REGISTER, struct vm_register)
222 #define	VM_SET_REGISTER_SET \
223 	_IOW('v', IOCNUM_SET_REGISTER_SET, struct vm_register_set)
224 #define	VM_GET_REGISTER_SET \
225 	_IOWR('v', IOCNUM_GET_REGISTER_SET, struct vm_register_set)
226 #define	VM_SET_CAPABILITY \
227 	_IOW('v', IOCNUM_SET_CAPABILITY, struct vm_capability)
228 #define	VM_GET_CAPABILITY \
229 	_IOWR('v', IOCNUM_GET_CAPABILITY, struct vm_capability)
230 #define	VM_STATS \
231 	_IOWR('v', IOCNUM_VM_STATS, struct vm_stats)
232 #define	VM_STAT_DESC \
233 	_IOWR('v', IOCNUM_VM_STAT_DESC, struct vm_stat_desc)
234 #define VM_ASSERT_IRQ \
235 	_IOW('v', IOCNUM_ASSERT_IRQ, struct vm_irq)
236 #define VM_DEASSERT_IRQ \
237 	_IOW('v', IOCNUM_DEASSERT_IRQ, struct vm_irq)
238 #define VM_RAISE_MSI \
239 	_IOW('v', IOCNUM_RAISE_MSI, struct vm_msi)
240 #define	VM_INJECT_EXCEPTION	\
241 	_IOW('v', IOCNUM_INJECT_EXCEPTION, struct vm_exception)
242 #define VM_SET_TOPOLOGY \
243 	_IOW('v', IOCNUM_SET_TOPOLOGY, struct vm_cpu_topology)
244 #define VM_GET_TOPOLOGY \
245 	_IOR('v', IOCNUM_GET_TOPOLOGY, struct vm_cpu_topology)
246 #define	VM_GLA2GPA_NOFAULT \
247 	_IOWR('v', IOCNUM_GLA2GPA_NOFAULT, struct vm_gla2gpa)
248 #define	VM_ACTIVATE_CPU	\
249 	_IOW('v', IOCNUM_ACTIVATE_CPU, struct vm_activate_cpu)
250 #define	VM_GET_CPUS	\
251 	_IOW('v', IOCNUM_GET_CPUSET, struct vm_cpuset)
252 #define	VM_SUSPEND_CPU \
253 	_IOW('v', IOCNUM_SUSPEND_CPU, struct vm_activate_cpu)
254 #define	VM_RESUME_CPU \
255 	_IOW('v', IOCNUM_RESUME_CPU, struct vm_activate_cpu)
256 #define	VM_ATTACH_APLIC	\
257 	_IOW('v', IOCNUM_ATTACH_APLIC, struct vm_aplic_descr)
258 #endif
259