1 /*- 2 * Copyright (c) 2015-2026 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * 5 * Portions of this software were developed by SRI International and the 6 * University of Cambridge Computer Laboratory under DARPA/AFRL contract 7 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. 8 * 9 * Portions of this software were developed by the University of Cambridge 10 * Computer Laboratory as part of the CTSRD Project, with support from the 11 * UK Higher Education Innovation Fund (HEIF). 12 * 13 * Redistribution and use in source and binary forms, with or without 14 * modification, are permitted provided that the following conditions 15 * are met: 16 * 1. Redistributions of source code must retain the above copyright 17 * notice, this list of conditions and the following disclaimer. 18 * 2. Redistributions in binary form must reproduce the above copyright 19 * notice, this list of conditions and the following disclaimer in the 20 * documentation and/or other materials provided with the distribution. 21 * 22 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32 * SUCH DAMAGE. 33 */ 34 35 #ifndef _MACHINE_UCONTEXT_H_ 36 #define _MACHINE_UCONTEXT_H_ 37 38 struct gpregs { 39 __register_t gp_ra; 40 __register_t gp_sp; 41 __register_t gp_gp; 42 __register_t gp_tp; 43 __register_t gp_t[7]; 44 __register_t gp_s[12]; 45 __register_t gp_a[8]; 46 __register_t gp_sepc; 47 __register_t gp_sstatus; 48 }; 49 50 struct fpregs { 51 __uint64_t fp_x[32][2]; 52 __uint64_t fp_fcsr; 53 int fp_flags; 54 int pad; 55 }; 56 57 struct riscv_reg_context { 58 __uint32_t ctx_id; 59 __uint32_t ctx_size; 60 }; 61 62 #define RISCV_CTX_MAGIC_END 0 63 #define RISCV_CTX_MAGIC_VS 0x53465457 64 65 struct vector_context { 66 struct riscv_reg_context ctx; 67 __uint64_t vs_vstart; 68 __uint64_t vs_vl; 69 __uint64_t vs_vtype; 70 __uint64_t vs_vcsr; 71 __uint64_t reserved[3]; 72 }; 73 74 struct __mcontext { 75 struct gpregs mc_gpregs; 76 struct fpregs mc_fpregs; 77 int mc_flags; 78 #define _MC_FP_VALID 0x1 /* Set when mc_fpregs has valid data */ 79 int mc_pad; 80 __uint64_t mc_ptr; /* Address of ctx headers and data */ 81 __uint64_t mc_spare[7]; /* Space for expansion */ 82 }; 83 84 typedef struct __mcontext mcontext_t; 85 86 #endif /* !_MACHINE_UCONTEXT_H_ */ 87