1*17696c12SRuslan Bukin /*- 2*17696c12SRuslan Bukin * Copyright (c) 2016 Ruslan Bukin <br@bsdpad.com> 3*17696c12SRuslan Bukin * All rights reserved. 4*17696c12SRuslan Bukin * 5*17696c12SRuslan Bukin * Portions of this software were developed by SRI International and the 6*17696c12SRuslan Bukin * University of Cambridge Computer Laboratory under DARPA/AFRL contract 7*17696c12SRuslan Bukin * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. 8*17696c12SRuslan Bukin * 9*17696c12SRuslan Bukin * Portions of this software were developed by the University of Cambridge 10*17696c12SRuslan Bukin * Computer Laboratory as part of the CTSRD Project, with support from the 11*17696c12SRuslan Bukin * UK Higher Education Innovation Fund (HEIF). 12*17696c12SRuslan Bukin * 13*17696c12SRuslan Bukin * Redistribution and use in source and binary forms, with or without 14*17696c12SRuslan Bukin * modification, are permitted provided that the following conditions 15*17696c12SRuslan Bukin * are met: 16*17696c12SRuslan Bukin * 1. Redistributions of source code must retain the above copyright 17*17696c12SRuslan Bukin * notice, this list of conditions and the following disclaimer. 18*17696c12SRuslan Bukin * 2. Redistributions in binary form must reproduce the above copyright 19*17696c12SRuslan Bukin * notice, this list of conditions and the following disclaimer in the 20*17696c12SRuslan Bukin * documentation and/or other materials provided with the distribution. 21*17696c12SRuslan Bukin * 22*17696c12SRuslan Bukin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23*17696c12SRuslan Bukin * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24*17696c12SRuslan Bukin * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25*17696c12SRuslan Bukin * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26*17696c12SRuslan Bukin * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27*17696c12SRuslan Bukin * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28*17696c12SRuslan Bukin * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29*17696c12SRuslan Bukin * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30*17696c12SRuslan Bukin * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31*17696c12SRuslan Bukin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32*17696c12SRuslan Bukin * SUCH DAMAGE. 33*17696c12SRuslan Bukin * 34*17696c12SRuslan Bukin * $FreeBSD$ 35*17696c12SRuslan Bukin */ 36*17696c12SRuslan Bukin 37*17696c12SRuslan Bukin #ifndef _MACHINE_SMP_H_ 38*17696c12SRuslan Bukin #define _MACHINE_SMP_H_ 39*17696c12SRuslan Bukin 40*17696c12SRuslan Bukin #include <machine/pcb.h> 41*17696c12SRuslan Bukin 42*17696c12SRuslan Bukin #define IPI_AST (1 << 0) 43*17696c12SRuslan Bukin #define IPI_PREEMPT (1 << 1) 44*17696c12SRuslan Bukin #define IPI_RENDEZVOUS (1 << 2) 45*17696c12SRuslan Bukin #define IPI_STOP (1 << 3) 46*17696c12SRuslan Bukin #define IPI_STOP_HARD (1 << 4) 47*17696c12SRuslan Bukin #define IPI_HARDCLOCK (1 << 5) 48*17696c12SRuslan Bukin 49*17696c12SRuslan Bukin void ipi_all_but_self(u_int ipi); 50*17696c12SRuslan Bukin void ipi_cpu(int cpu, u_int ipi); 51*17696c12SRuslan Bukin void ipi_selected(cpuset_t cpus, u_int ipi); 52*17696c12SRuslan Bukin 53*17696c12SRuslan Bukin extern struct pcb stoppcbs[]; 54*17696c12SRuslan Bukin 55*17696c12SRuslan Bukin #endif /* !_MACHINE_SMP_H_ */ 56