xref: /freebsd/sys/riscv/include/sbi.h (revision b64c5a0ace59af62eff52bfe110a521dc73c937b)
1 /*-
2  * Copyright (c) 2016-2017 Ruslan Bukin <br@bsdpad.com>
3  * All rights reserved.
4  * Copyright (c) 2019 Mitchell Horne <mhorne@FreeBSD.org>
5  *
6  * Portions of this software were developed by SRI International and the
7  * University of Cambridge Computer Laboratory under DARPA/AFRL contract
8  * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
9  *
10  * Portions of this software were developed by the University of Cambridge
11  * Computer Laboratory as part of the CTSRD Project, with support from the
12  * UK Higher Education Innovation Fund (HEIF).
13  *
14  * Redistribution and use in source and binary forms, with or without
15  * modification, are permitted provided that the following conditions
16  * are met:
17  * 1. Redistributions of source code must retain the above copyright
18  *    notice, this list of conditions and the following disclaimer.
19  * 2. Redistributions in binary form must reproduce the above copyright
20  *    notice, this list of conditions and the following disclaimer in the
21  *    documentation and/or other materials provided with the distribution.
22  *
23  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
33  * SUCH DAMAGE.
34  */
35 
36 #ifndef _MACHINE_SBI_H_
37 #define	_MACHINE_SBI_H_
38 
39 /* SBI Specification Version */
40 #define	SBI_SPEC_VERS_MAJOR_OFFSET	24
41 #define	SBI_SPEC_VERS_MAJOR_MASK	(0x7F << SBI_SPEC_VERS_MAJOR_OFFSET)
42 #define	SBI_SPEC_VERS_MINOR_OFFSET	0
43 #define	SBI_SPEC_VERS_MINOR_MASK	(0xFFFFFF << SBI_SPEC_VERS_MINOR_OFFSET)
44 
45 /* SBI Implementation IDs */
46 #define	SBI_IMPL_ID_BBL			0
47 #define	SBI_IMPL_ID_OPENSBI		1
48 #define	SBI_IMPL_ID_XVISOR		2
49 #define	SBI_IMPL_ID_KVM			3
50 #define	SBI_IMPL_ID_RUSTSBI		4
51 #define	SBI_IMPL_ID_DIOSIX		5
52 #define	SBI_IMPL_ID_COFFER		6
53 #define	SBI_IMPL_ID_XEN_PROJECT		7
54 #define	SBI_IMPL_ID_POLARFIRE_HSS	8
55 #define	SBI_IMPL_ID_COREBOOT		9
56 #define	SBI_IMPL_ID_OREBOOT		10
57 #define	SBI_IMPL_ID_BHYVE		11
58 
59 /* SBI Error Codes */
60 #define	SBI_SUCCESS			0
61 #define	SBI_ERR_FAILURE			-1
62 #define	SBI_ERR_NOT_SUPPORTED		-2
63 #define	SBI_ERR_INVALID_PARAM		-3
64 #define	SBI_ERR_DENIED			-4
65 #define	SBI_ERR_INVALID_ADDRESS		-5
66 #define	SBI_ERR_ALREADY_AVAILABLE	-6
67 
68 /* SBI Base Extension */
69 #define	SBI_EXT_ID_BASE			0x10
70 #define	SBI_BASE_GET_SPEC_VERSION	0
71 #define	SBI_BASE_GET_IMPL_ID		1
72 #define	SBI_BASE_GET_IMPL_VERSION	2
73 #define	SBI_BASE_PROBE_EXTENSION	3
74 #define	SBI_BASE_GET_MVENDORID		4
75 #define	SBI_BASE_GET_MARCHID		5
76 #define	SBI_BASE_GET_MIMPID		6
77 
78 /* Timer (TIME) Extension */
79 #define	SBI_EXT_ID_TIME			0x54494D45
80 #define	SBI_TIME_SET_TIMER		0
81 
82 /* IPI (IPI) Extension */
83 #define	SBI_EXT_ID_IPI			0x735049
84 #define	SBI_IPI_SEND_IPI		0
85 
86 /* RFENCE (RFNC) Extension */
87 #define	SBI_EXT_ID_RFNC				0x52464E43
88 #define	SBI_RFNC_REMOTE_FENCE_I			0
89 #define	SBI_RFNC_REMOTE_SFENCE_VMA		1
90 #define	SBI_RFNC_REMOTE_SFENCE_VMA_ASID		2
91 #define	SBI_RFNC_REMOTE_HFENCE_GVMA_VMID	3
92 #define	SBI_RFNC_REMOTE_HFENCE_GVMA		4
93 #define	SBI_RFNC_REMOTE_HFENCE_VVMA_ASID	5
94 #define	SBI_RFNC_REMOTE_HFENCE_VVMA		6
95 
96 /* Hart State Management (HSM) Extension */
97 #define	SBI_EXT_ID_HSM			0x48534D
98 #define	SBI_HSM_HART_START		0
99 #define	SBI_HSM_HART_STOP		1
100 #define	SBI_HSM_HART_STATUS		2
101 #define	 SBI_HSM_STATUS_STARTED		0
102 #define	 SBI_HSM_STATUS_STOPPED		1
103 #define	 SBI_HSM_STATUS_START_PENDING	2
104 #define	 SBI_HSM_STATUS_STOP_PENDING	3
105 
106 /* System Reset (SRST) Extension */
107 #define	SBI_EXT_ID_SRST			0x53525354
108 #define	SBI_SRST_SYSTEM_RESET		0
109 #define	 SBI_SRST_TYPE_SHUTDOWN		0
110 #define	 SBI_SRST_TYPE_COLD_REBOOT	1
111 #define	 SBI_SRST_TYPE_WARM_REBOOT	2
112 #define	 SBI_SRST_REASON_NONE		0
113 #define	 SBI_SRST_REASON_SYSTEM_FAILURE	1
114 
115 /* Legacy Extensions */
116 #define	SBI_SET_TIMER			0
117 #define	SBI_CONSOLE_PUTCHAR		1
118 #define	SBI_CONSOLE_GETCHAR		2
119 #define	SBI_CLEAR_IPI			3
120 #define	SBI_SEND_IPI			4
121 #define	SBI_REMOTE_FENCE_I		5
122 #define	SBI_REMOTE_SFENCE_VMA		6
123 #define	SBI_REMOTE_SFENCE_VMA_ASID	7
124 #define	SBI_SHUTDOWN			8
125 
126 #ifndef LOCORE
127 
128 #define	SBI_CALL0(e, f)				SBI_CALL5(e, f, 0, 0, 0, 0, 0)
129 #define	SBI_CALL1(e, f, p1)			SBI_CALL5(e, f, p1, 0, 0, 0, 0)
130 #define	SBI_CALL2(e, f, p1, p2)			SBI_CALL5(e, f, p1, p2, 0, 0, 0)
131 #define	SBI_CALL3(e, f, p1, p2, p3)		SBI_CALL5(e, f, p1, p2, p3, 0, 0)
132 #define	SBI_CALL4(e, f, p1, p2, p3, p4)		SBI_CALL5(e, f, p1, p2, p3, p4, 0)
133 #define	SBI_CALL5(e, f, p1, p2, p3, p4, p5)	sbi_call(e, f, p1, p2, p3, p4, p5)
134 
135 /*
136  * Documentation available at
137  * https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc
138  */
139 
140 struct sbi_ret {
141 	long error;
142 	long value;
143 };
144 
145 static __inline struct sbi_ret
146 sbi_call(uint64_t arg7, uint64_t arg6, uint64_t arg0, uint64_t arg1,
147     uint64_t arg2, uint64_t arg3, uint64_t arg4)
148 {
149 	struct sbi_ret ret;
150 
151 	register uintptr_t a0 __asm ("a0") = (uintptr_t)(arg0);
152 	register uintptr_t a1 __asm ("a1") = (uintptr_t)(arg1);
153 	register uintptr_t a2 __asm ("a2") = (uintptr_t)(arg2);
154 	register uintptr_t a3 __asm ("a3") = (uintptr_t)(arg3);
155 	register uintptr_t a4 __asm ("a4") = (uintptr_t)(arg4);
156 	register uintptr_t a6 __asm ("a6") = (uintptr_t)(arg6);
157 	register uintptr_t a7 __asm ("a7") = (uintptr_t)(arg7);
158 
159 	__asm __volatile(			\
160 		"ecall"				\
161 		:"+r"(a0), "+r"(a1)		\
162 		:"r"(a2), "r"(a3), "r"(a4), "r"(a6), "r"(a7)	\
163 		:"memory");
164 
165 	ret.error = a0;
166 	ret.value = a1;
167 	return (ret);
168 }
169 
170 /* Base extension functions. */
171 static __inline long
172 sbi_probe_extension(long id)
173 {
174 	return (SBI_CALL1(SBI_EXT_ID_BASE, SBI_BASE_PROBE_EXTENSION, id).value);
175 }
176 
177 /* TIME extension functions. */
178 void sbi_set_timer(uint64_t val);
179 
180 /* IPI extension functions. */
181 void sbi_send_ipi(const u_long *hart_mask);
182 
183 /* RFENCE extension functions. */
184 void sbi_remote_fence_i(const u_long *hart_mask);
185 void sbi_remote_sfence_vma(const u_long *hart_mask, u_long start, u_long size);
186 void sbi_remote_sfence_vma_asid(const u_long *hart_mask, u_long start,
187     u_long size, u_long asid);
188 
189 /* Hart State Management extension functions. */
190 
191 /*
192  * Start execution on the specified hart at physical address start_addr. The
193  * register a0 will contain the hart's ID, and a1 will contain the value of
194  * priv.
195  */
196 int sbi_hsm_hart_start(u_long hart, u_long start_addr, u_long priv);
197 
198 /*
199  * Stop execution on the current hart. Interrupts should be disabled, or this
200  * function may return.
201  */
202 void sbi_hsm_hart_stop(void);
203 
204 /*
205  * Get the execution status of the specified hart. The status will be one of:
206  *  - SBI_HSM_STATUS_STARTED
207  *  - SBI_HSM_STATUS_STOPPED
208  *  - SBI_HSM_STATUS_START_PENDING
209  *  - SBI_HSM_STATUS_STOP_PENDING
210  */
211 int sbi_hsm_hart_status(u_long hart);
212 
213 /* System Reset extension functions. */
214 
215 /*
216  * Reset the system based on the following 'type' and 'reason' chosen from:
217  *  - SBI_SRST_TYPE_SHUTDOWN
218  *  - SBI_SRST_TYPE_COLD_REBOOT
219  *  - SBI_SRST_TYPE_WARM_REBOOT
220  *  - SBI_SRST_REASON_NONE
221  *  - SBI_SRST_REASON_SYSTEM_FAILURE
222  */
223 void sbi_system_reset(u_long reset_type, u_long reset_reason);
224 
225 /* Legacy extension functions. */
226 static __inline void
227 sbi_console_putchar(int ch)
228 {
229 
230 	(void)SBI_CALL1(SBI_CONSOLE_PUTCHAR, 0, ch);
231 }
232 
233 static __inline int
234 sbi_console_getchar(void)
235 {
236 
237 	/*
238 	 * XXX: The "error" is returned here because legacy SBI functions
239 	 * continue to return their value in a0.
240 	 */
241 	return (SBI_CALL0(SBI_CONSOLE_GETCHAR, 0).error);
242 }
243 
244 void sbi_print_version(void);
245 void sbi_init(void);
246 
247 #endif /* !LOCORE */
248 #endif /* !_MACHINE_SBI_H_ */
249