1 /*- 2 * Copyright (c) 2016-2017 Ruslan Bukin <br@bsdpad.com> 3 * All rights reserved. 4 * Copyright (c) 2019 Mitchell Horne <mhorne@FreeBSD.org> 5 * 6 * Portions of this software were developed by SRI International and the 7 * University of Cambridge Computer Laboratory under DARPA/AFRL contract 8 * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. 9 * 10 * Portions of this software were developed by the University of Cambridge 11 * Computer Laboratory as part of the CTSRD Project, with support from the 12 * UK Higher Education Innovation Fund (HEIF). 13 * 14 * Redistribution and use in source and binary forms, with or without 15 * modification, are permitted provided that the following conditions 16 * are met: 17 * 1. Redistributions of source code must retain the above copyright 18 * notice, this list of conditions and the following disclaimer. 19 * 2. Redistributions in binary form must reproduce the above copyright 20 * notice, this list of conditions and the following disclaimer in the 21 * documentation and/or other materials provided with the distribution. 22 * 23 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 24 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 25 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 26 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 27 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 28 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 29 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 30 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 31 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 32 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 33 * SUCH DAMAGE. 34 * 35 * $FreeBSD$ 36 */ 37 38 #ifndef _MACHINE_SBI_H_ 39 #define _MACHINE_SBI_H_ 40 41 /* SBI Specification Version */ 42 #define SBI_SPEC_VERS_MAJOR_OFFSET 24 43 #define SBI_SPEC_VERS_MAJOR_MASK (0x7F << SBI_SPEC_VERS_MAJOR_OFFSET) 44 #define SBI_SPEC_VERS_MINOR_OFFSET 0 45 #define SBI_SPEC_VERS_MINOR_MASK (0xFFFFFF << SBI_SPEC_VERS_MINOR_OFFSET) 46 47 /* SBI Implementation IDs */ 48 #define SBI_IMPL_ID_BBL 0 49 #define SBI_IMPL_ID_OPENSBI 1 50 51 /* SBI Error Codes */ 52 #define SBI_SUCCESS 0 53 #define SBI_ERR_FAILURE -1 54 #define SBI_ERR_NOT_SUPPORTED -2 55 #define SBI_ERR_INVALID_PARAM -3 56 #define SBI_ERR_DENIED -4 57 #define SBI_ERR_INVALID_ADDRESS -5 58 #define SBI_ERR_ALREADY_AVAILABLE -6 59 60 /* SBI Base Extension */ 61 #define SBI_EXT_ID_BASE 0x10 62 #define SBI_BASE_GET_SPEC_VERSION 0 63 #define SBI_BASE_GET_IMPL_ID 1 64 #define SBI_BASE_GET_IMPL_VERSION 2 65 #define SBI_BASE_PROBE_EXTENSION 3 66 #define SBI_BASE_GET_MVENDORID 4 67 #define SBI_BASE_GET_MARCHID 5 68 #define SBI_BASE_GET_MIMPID 6 69 70 /* Hart State Management (HSM) Extension */ 71 #define SBI_EXT_ID_HSM 0x48534D 72 #define SBI_HSM_HART_START 0 73 #define SBI_HSM_HART_STOP 1 74 #define SBI_HSM_HART_STATUS 2 75 #define SBI_HSM_STATUS_STARTED 0 76 #define SBI_HSM_STATUS_STOPPED 1 77 #define SBI_HSM_STATUS_START_PENDING 2 78 #define SBI_HSM_STATUS_STOP_PENDING 3 79 80 /* Legacy Extensions */ 81 #define SBI_SET_TIMER 0 82 #define SBI_CONSOLE_PUTCHAR 1 83 #define SBI_CONSOLE_GETCHAR 2 84 #define SBI_CLEAR_IPI 3 85 #define SBI_SEND_IPI 4 86 #define SBI_REMOTE_FENCE_I 5 87 #define SBI_REMOTE_SFENCE_VMA 6 88 #define SBI_REMOTE_SFENCE_VMA_ASID 7 89 #define SBI_SHUTDOWN 8 90 91 #define SBI_CALL0(e, f) SBI_CALL4(e, f, 0, 0, 0, 0) 92 #define SBI_CALL1(e, f, p1) SBI_CALL4(e, f, p1, 0, 0, 0) 93 #define SBI_CALL2(e, f, p1, p2) SBI_CALL4(e, f, p1, p2, 0, 0) 94 #define SBI_CALL3(e, f, p1, p2, p3) SBI_CALL4(e, f, p1, p2, p3, 0) 95 #define SBI_CALL4(e, f, p1, p2, p3, p4) sbi_call(e, f, p1, p2, p3, p4) 96 97 /* 98 * Documentation available at 99 * https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.adoc 100 */ 101 102 struct sbi_ret { 103 long error; 104 long value; 105 }; 106 107 static __inline struct sbi_ret 108 sbi_call(uint64_t arg7, uint64_t arg6, uint64_t arg0, uint64_t arg1, 109 uint64_t arg2, uint64_t arg3) 110 { 111 struct sbi_ret ret; 112 113 register uintptr_t a0 __asm ("a0") = (uintptr_t)(arg0); 114 register uintptr_t a1 __asm ("a1") = (uintptr_t)(arg1); 115 register uintptr_t a2 __asm ("a2") = (uintptr_t)(arg2); 116 register uintptr_t a3 __asm ("a3") = (uintptr_t)(arg3); 117 register uintptr_t a6 __asm ("a6") = (uintptr_t)(arg6); 118 register uintptr_t a7 __asm ("a7") = (uintptr_t)(arg7); 119 120 __asm __volatile( \ 121 "ecall" \ 122 :"+r"(a0), "+r"(a1) \ 123 :"r"(a2), "r"(a3), "r"(a6), "r"(a7) \ 124 :"memory"); 125 126 ret.error = a0; 127 ret.value = a1; 128 return (ret); 129 } 130 131 /* Base extension functions and variables. */ 132 extern u_long sbi_spec_version; 133 extern u_long sbi_impl_id; 134 extern u_long sbi_impl_version; 135 136 static __inline long 137 sbi_probe_extension(long id) 138 { 139 return (SBI_CALL1(SBI_EXT_ID_BASE, SBI_BASE_PROBE_EXTENSION, id).value); 140 } 141 142 /* Hart State Management extension functions. */ 143 144 /* 145 * Start execution on the specified hart at physical address start_addr. The 146 * register a0 will contain the hart's ID, and a1 will contain the value of 147 * priv. 148 */ 149 int sbi_hsm_hart_start(u_long hart, u_long start_addr, u_long priv); 150 151 /* 152 * Stop execution on the current hart. Interrupts should be disabled, or this 153 * function may return. 154 */ 155 void sbi_hsm_hart_stop(void); 156 157 /* 158 * Get the execution status of the specified hart. The status will be one of: 159 * - SBI_HSM_STATUS_STARTED 160 * - SBI_HSM_STATUS_STOPPED 161 * - SBI_HSM_STATUS_START_PENDING 162 * - SBI_HSM_STATUS_STOP_PENDING 163 */ 164 int sbi_hsm_hart_status(u_long hart); 165 166 /* Legacy extension functions. */ 167 static __inline void 168 sbi_console_putchar(int ch) 169 { 170 171 (void)SBI_CALL1(SBI_CONSOLE_PUTCHAR, 0, ch); 172 } 173 174 static __inline int 175 sbi_console_getchar(void) 176 { 177 178 /* 179 * XXX: The "error" is returned here because legacy SBI functions 180 * continue to return their value in a0. 181 */ 182 return (SBI_CALL0(SBI_CONSOLE_GETCHAR, 0).error); 183 } 184 185 static __inline void 186 sbi_set_timer(uint64_t val) 187 { 188 189 (void)SBI_CALL1(SBI_SET_TIMER, 0, val); 190 } 191 192 static __inline void 193 sbi_shutdown(void) 194 { 195 196 (void)SBI_CALL0(SBI_SHUTDOWN, 0); 197 } 198 199 static __inline void 200 sbi_clear_ipi(void) 201 { 202 203 (void)SBI_CALL0(SBI_CLEAR_IPI, 0); 204 } 205 206 static __inline void 207 sbi_send_ipi(const unsigned long *hart_mask) 208 { 209 210 (void)SBI_CALL1(SBI_SEND_IPI, 0, (uint64_t)hart_mask); 211 } 212 213 static __inline void 214 sbi_remote_fence_i(const unsigned long *hart_mask) 215 { 216 217 (void)SBI_CALL1(SBI_REMOTE_FENCE_I, 0, (uint64_t)hart_mask); 218 } 219 220 static __inline void 221 sbi_remote_sfence_vma(const unsigned long *hart_mask, 222 unsigned long start, unsigned long size) 223 { 224 225 (void)SBI_CALL3(SBI_REMOTE_SFENCE_VMA, 0, (uint64_t)hart_mask, start, 226 size); 227 } 228 229 static __inline void 230 sbi_remote_sfence_vma_asid(const unsigned long *hart_mask, 231 unsigned long start, unsigned long size, 232 unsigned long asid) 233 { 234 235 (void)SBI_CALL4(SBI_REMOTE_SFENCE_VMA_ASID, 0, (uint64_t)hart_mask, 236 start, size, asid); 237 } 238 239 void sbi_print_version(void); 240 void sbi_init(void); 241 242 #endif /* !_MACHINE_SBI_H_ */ 243