xref: /freebsd/sys/riscv/include/sbi.h (revision 0a48773f8c6108ad8755065c5cdc13fcdc0728b2)
1 /*-
2  * Copyright (c) 2016-2017 Ruslan Bukin <br@bsdpad.com>
3  * All rights reserved.
4  *
5  * Portions of this software were developed by SRI International and the
6  * University of Cambridge Computer Laboratory under DARPA/AFRL contract
7  * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
8  *
9  * Portions of this software were developed by the University of Cambridge
10  * Computer Laboratory as part of the CTSRD Project, with support from the
11  * UK Higher Education Innovation Fund (HEIF).
12  *
13  * Redistribution and use in source and binary forms, with or without
14  * modification, are permitted provided that the following conditions
15  * are met:
16  * 1. Redistributions of source code must retain the above copyright
17  *    notice, this list of conditions and the following disclaimer.
18  * 2. Redistributions in binary form must reproduce the above copyright
19  *    notice, this list of conditions and the following disclaimer in the
20  *    documentation and/or other materials provided with the distribution.
21  *
22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
32  * SUCH DAMAGE.
33  *
34  * $FreeBSD$
35  */
36 
37 #ifndef _MACHINE_SBI_H_
38 #define	_MACHINE_SBI_H_
39 
40 #define	SBI_SET_TIMER			0
41 #define	SBI_CONSOLE_PUTCHAR		1
42 #define	SBI_CONSOLE_GETCHAR		2
43 #define	SBI_CLEAR_IPI			3
44 #define	SBI_SEND_IPI			4
45 #define	SBI_REMOTE_FENCE_I		5
46 #define	SBI_REMOTE_SFENCE_VMA		6
47 #define	SBI_REMOTE_SFENCE_VMA_ASID	7
48 #define	SBI_SHUTDOWN			8
49 
50 /*
51  * Documentation available at
52  * https://github.com/riscv/riscv-sbi-doc/blob/master/riscv-sbi.md
53  */
54 
55 static __inline uint64_t
56 sbi_call(uint64_t arg7, uint64_t arg0, uint64_t arg1, uint64_t arg2,
57     uint64_t arg3)
58 {
59 	register uintptr_t a0 __asm ("a0") = (uintptr_t)(arg0);
60 	register uintptr_t a1 __asm ("a1") = (uintptr_t)(arg1);
61 	register uintptr_t a2 __asm ("a2") = (uintptr_t)(arg2);
62 	register uintptr_t a3 __asm ("a3") = (uintptr_t)(arg3);
63 	register uintptr_t a7 __asm ("a7") = (uintptr_t)(arg7);
64 
65 	__asm __volatile(			\
66 		"ecall"				\
67 		:"+r"(a0)			\
68 		:"r"(a1), "r"(a2), "r" (a3), "r"(a7)	\
69 		:"memory");
70 
71 	return (a0);
72 }
73 
74 static __inline void
75 sbi_console_putchar(int ch)
76 {
77 
78 	sbi_call(SBI_CONSOLE_PUTCHAR, ch, 0, 0, 0);
79 }
80 
81 static __inline int
82 sbi_console_getchar(void)
83 {
84 
85 	return (sbi_call(SBI_CONSOLE_GETCHAR, 0, 0, 0, 0));
86 }
87 
88 static __inline void
89 sbi_set_timer(uint64_t val)
90 {
91 
92 	sbi_call(SBI_SET_TIMER, val, 0, 0, 0);
93 }
94 
95 static __inline void
96 sbi_shutdown(void)
97 {
98 
99 	sbi_call(SBI_SHUTDOWN, 0, 0, 0, 0);
100 }
101 
102 static __inline void
103 sbi_clear_ipi(void)
104 {
105 
106 	sbi_call(SBI_CLEAR_IPI, 0, 0, 0, 0);
107 }
108 
109 static __inline void
110 sbi_send_ipi(const unsigned long *hart_mask)
111 {
112 
113 	sbi_call(SBI_SEND_IPI, (uint64_t)hart_mask, 0, 0, 0);
114 }
115 
116 static __inline void
117 sbi_remote_fence_i(const unsigned long *hart_mask)
118 {
119 
120 	sbi_call(SBI_REMOTE_FENCE_I, (uint64_t)hart_mask, 0, 0, 0);
121 }
122 
123 static __inline void
124 sbi_remote_sfence_vma(const unsigned long *hart_mask,
125     unsigned long start, unsigned long size)
126 {
127 
128 	sbi_call(SBI_REMOTE_SFENCE_VMA, (uint64_t)hart_mask, start, size, 0);
129 }
130 
131 static __inline void
132 sbi_remote_sfence_vma_asid(const unsigned long *hart_mask,
133     unsigned long start, unsigned long size,
134     unsigned long asid)
135 {
136 
137 	sbi_call(SBI_REMOTE_SFENCE_VMA_ASID, (uint64_t)hart_mask, start, size,
138 	    asid);
139 }
140 
141 #endif /* !_MACHINE_SBI_H_ */
142