xref: /freebsd/sys/riscv/include/machdep.h (revision 18051cc694be7949e289c10e696dc1d56b8b69ca)
18d7e7a98SRuslan Bukin /*-
2af19cc59SRuslan Bukin  * Copyright (c) 2015-2017 Ruslan Bukin <br@bsdpad.com>
38d7e7a98SRuslan Bukin  * All rights reserved.
48d7e7a98SRuslan Bukin  *
58d7e7a98SRuslan Bukin  * Portions of this software were developed by SRI International and the
68d7e7a98SRuslan Bukin  * University of Cambridge Computer Laboratory under DARPA/AFRL contract
78d7e7a98SRuslan Bukin  * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme.
88d7e7a98SRuslan Bukin  *
98d7e7a98SRuslan Bukin  * Portions of this software were developed by the University of Cambridge
108d7e7a98SRuslan Bukin  * Computer Laboratory as part of the CTSRD Project, with support from the
118d7e7a98SRuslan Bukin  * UK Higher Education Innovation Fund (HEIF).
128d7e7a98SRuslan Bukin  *
138d7e7a98SRuslan Bukin  * Redistribution and use in source and binary forms, with or without
148d7e7a98SRuslan Bukin  * modification, are permitted provided that the following conditions
158d7e7a98SRuslan Bukin  * are met:
168d7e7a98SRuslan Bukin  * 1. Redistributions of source code must retain the above copyright
178d7e7a98SRuslan Bukin  *    notice, this list of conditions and the following disclaimer.
188d7e7a98SRuslan Bukin  * 2. Redistributions in binary form must reproduce the above copyright
198d7e7a98SRuslan Bukin  *    notice, this list of conditions and the following disclaimer in the
208d7e7a98SRuslan Bukin  *    documentation and/or other materials provided with the distribution.
218d7e7a98SRuslan Bukin  *
228d7e7a98SRuslan Bukin  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND
238d7e7a98SRuslan Bukin  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
248d7e7a98SRuslan Bukin  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
258d7e7a98SRuslan Bukin  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE
268d7e7a98SRuslan Bukin  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
278d7e7a98SRuslan Bukin  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
288d7e7a98SRuslan Bukin  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
298d7e7a98SRuslan Bukin  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
308d7e7a98SRuslan Bukin  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
318d7e7a98SRuslan Bukin  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
328d7e7a98SRuslan Bukin  * SUCH DAMAGE.
338d7e7a98SRuslan Bukin  */
348d7e7a98SRuslan Bukin 
358d7e7a98SRuslan Bukin #ifndef _MACHINE_MACHDEP_H_
368d7e7a98SRuslan Bukin #define	_MACHINE_MACHDEP_H_
378d7e7a98SRuslan Bukin 
388d7e7a98SRuslan Bukin struct riscv_bootparams {
39af19cc59SRuslan Bukin 	vm_offset_t	kern_phys;	/* Kernel base (physical) addr */
408d7e7a98SRuslan Bukin 	vm_offset_t	kern_stack;
41c98013c0SAlex Richardson 	vm_offset_t	dtbp_phys;	/* Device tree blob physical addr */
42*f7d2df2aSMitchell Horne 	vm_offset_t	modulep;	/* loader(8) metadata */
438d7e7a98SRuslan Bukin };
448d7e7a98SRuslan Bukin 
458d7e7a98SRuslan Bukin void initriscv(struct riscv_bootparams *);
468d7e7a98SRuslan Bukin 
478d7e7a98SRuslan Bukin #endif /* _MACHINE_MACHDEP_H_ */
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