1*8d7e7a98SRuslan Bukin /*- 2*8d7e7a98SRuslan Bukin * Copyright (c) 2015 Ruslan Bukin <br@bsdpad.com> 3*8d7e7a98SRuslan Bukin * All rights reserved. 4*8d7e7a98SRuslan Bukin * 5*8d7e7a98SRuslan Bukin * Portions of this software were developed by SRI International and the 6*8d7e7a98SRuslan Bukin * University of Cambridge Computer Laboratory under DARPA/AFRL contract 7*8d7e7a98SRuslan Bukin * FA8750-10-C-0237 ("CTSRD"), as part of the DARPA CRASH research programme. 8*8d7e7a98SRuslan Bukin * 9*8d7e7a98SRuslan Bukin * Portions of this software were developed by the University of Cambridge 10*8d7e7a98SRuslan Bukin * Computer Laboratory as part of the CTSRD Project, with support from the 11*8d7e7a98SRuslan Bukin * UK Higher Education Innovation Fund (HEIF). 12*8d7e7a98SRuslan Bukin * 13*8d7e7a98SRuslan Bukin * Redistribution and use in source and binary forms, with or without 14*8d7e7a98SRuslan Bukin * modification, are permitted provided that the following conditions 15*8d7e7a98SRuslan Bukin * are met: 16*8d7e7a98SRuslan Bukin * 1. Redistributions of source code must retain the above copyright 17*8d7e7a98SRuslan Bukin * notice, this list of conditions and the following disclaimer. 18*8d7e7a98SRuslan Bukin * 2. Redistributions in binary form must reproduce the above copyright 19*8d7e7a98SRuslan Bukin * notice, this list of conditions and the following disclaimer in the 20*8d7e7a98SRuslan Bukin * documentation and/or other materials provided with the distribution. 21*8d7e7a98SRuslan Bukin * 22*8d7e7a98SRuslan Bukin * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 23*8d7e7a98SRuslan Bukin * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 24*8d7e7a98SRuslan Bukin * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 25*8d7e7a98SRuslan Bukin * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 26*8d7e7a98SRuslan Bukin * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 27*8d7e7a98SRuslan Bukin * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 28*8d7e7a98SRuslan Bukin * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 29*8d7e7a98SRuslan Bukin * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 30*8d7e7a98SRuslan Bukin * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 31*8d7e7a98SRuslan Bukin * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 32*8d7e7a98SRuslan Bukin * SUCH DAMAGE. 33*8d7e7a98SRuslan Bukin * 34*8d7e7a98SRuslan Bukin * $FreeBSD$ 35*8d7e7a98SRuslan Bukin */ 36*8d7e7a98SRuslan Bukin 37*8d7e7a98SRuslan Bukin #ifndef _MACHINE_CPU_H_ 38*8d7e7a98SRuslan Bukin #define _MACHINE_CPU_H_ 39*8d7e7a98SRuslan Bukin 40*8d7e7a98SRuslan Bukin #include <machine/atomic.h> 41*8d7e7a98SRuslan Bukin #include <machine/frame.h> 42*8d7e7a98SRuslan Bukin 43*8d7e7a98SRuslan Bukin #define TRAPF_PC(tfp) ((tfp)->tf_ra) 44*8d7e7a98SRuslan Bukin #define TRAPF_USERMODE(tfp) (((tfp)->tf_sepc & (1ul << 63)) == 0) 45*8d7e7a98SRuslan Bukin 46*8d7e7a98SRuslan Bukin #define cpu_getstack(td) ((td)->td_frame->tf_sp) 47*8d7e7a98SRuslan Bukin #define cpu_setstack(td, sp) ((td)->td_frame->tf_sp = (sp)) 48*8d7e7a98SRuslan Bukin #define cpu_spinwait() /* nothing */ 49*8d7e7a98SRuslan Bukin 50*8d7e7a98SRuslan Bukin #ifdef _KERNEL 51*8d7e7a98SRuslan Bukin 52*8d7e7a98SRuslan Bukin /* 53*8d7e7a98SRuslan Bukin * 0x0000 CPU ID unimplemented 54*8d7e7a98SRuslan Bukin * 0x0001 UC Berkeley Rocket repo 55*8d7e7a98SRuslan Bukin * 0x00020x7FFE Reserved for open-source repos 56*8d7e7a98SRuslan Bukin * 0x7FFF Reserved for extension 57*8d7e7a98SRuslan Bukin * 0x8000 Reserved for anonymous source 58*8d7e7a98SRuslan Bukin * 0x80010xFFFE Reserved for proprietary implementations 59*8d7e7a98SRuslan Bukin * 0xFFFF Reserved for extension 60*8d7e7a98SRuslan Bukin */ 61*8d7e7a98SRuslan Bukin 62*8d7e7a98SRuslan Bukin #define CPU_IMPL_SHIFT 0 63*8d7e7a98SRuslan Bukin #define CPU_IMPL_MASK (0xffff << CPU_IMPL_SHIFT) 64*8d7e7a98SRuslan Bukin #define CPU_IMPL(mimpid) ((mimpid & CPU_IMPL_MASK) >> CPU_IMPL_SHIFT) 65*8d7e7a98SRuslan Bukin #define CPU_IMPL_UNIMPLEMEN 0x0 66*8d7e7a98SRuslan Bukin #define CPU_IMPL_UCB_ROCKET 0x1 67*8d7e7a98SRuslan Bukin 68*8d7e7a98SRuslan Bukin #define CPU_PART_SHIFT 62 69*8d7e7a98SRuslan Bukin #define CPU_PART_MASK (0x3ul << CPU_PART_SHIFT) 70*8d7e7a98SRuslan Bukin #define CPU_PART(mcpuid) ((mcpuid & CPU_PART_MASK) >> CPU_PART_SHIFT) 71*8d7e7a98SRuslan Bukin #define CPU_PART_RV32I 0x0 72*8d7e7a98SRuslan Bukin #define CPU_PART_RV32E 0x1 73*8d7e7a98SRuslan Bukin #define CPU_PART_RV64I 0x2 74*8d7e7a98SRuslan Bukin #define CPU_PART_RV128I 0x3 75*8d7e7a98SRuslan Bukin 76*8d7e7a98SRuslan Bukin extern char btext[]; 77*8d7e7a98SRuslan Bukin extern char etext[]; 78*8d7e7a98SRuslan Bukin 79*8d7e7a98SRuslan Bukin void cpu_halt(void) __dead2; 80*8d7e7a98SRuslan Bukin void cpu_reset(void) __dead2; 81*8d7e7a98SRuslan Bukin void fork_trampoline(void); 82*8d7e7a98SRuslan Bukin void identify_cpu(void); 83*8d7e7a98SRuslan Bukin void swi_vm(void *v); 84*8d7e7a98SRuslan Bukin 85*8d7e7a98SRuslan Bukin static __inline uint64_t 86*8d7e7a98SRuslan Bukin get_cyclecount(void) 87*8d7e7a98SRuslan Bukin { 88*8d7e7a98SRuslan Bukin 89*8d7e7a98SRuslan Bukin /* TODO: This is bogus */ 90*8d7e7a98SRuslan Bukin return (1); 91*8d7e7a98SRuslan Bukin } 92*8d7e7a98SRuslan Bukin 93*8d7e7a98SRuslan Bukin #endif 94*8d7e7a98SRuslan Bukin 95*8d7e7a98SRuslan Bukin #endif /* !_MACHINE_CPU_H_ */ 96