1 /*- 2 * Copyright 2011 Nathan Whitehorn 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 13 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 14 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 15 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 16 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 17 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 18 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 19 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 20 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 21 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 22 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 23 * SUCH DAMAGE. 24 */ 25 26 #include <sys/cdefs.h> 27 __FBSDID("$FreeBSD$"); 28 29 #include <sys/param.h> 30 #include <sys/systm.h> 31 #include <sys/module.h> 32 #include <sys/bus.h> 33 #include <sys/conf.h> 34 #include <sys/kernel.h> 35 #include <sys/malloc.h> 36 #include <sys/smp.h> 37 38 #include <vm/vm.h> 39 #include <vm/pmap.h> 40 41 #include <machine/bus.h> 42 #include <machine/intr_machdep.h> 43 #include <machine/md_var.h> 44 #include <machine/rtas.h> 45 46 #include <dev/ofw/ofw_bus.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 49 #include "phyp-hvcall.h" 50 #include "pic_if.h" 51 52 #define XICP_PRIORITY 5 /* Random non-zero number */ 53 #define XICP_IPI 2 54 #define MAX_XICP_IRQS (1<<24) /* 24-bit XIRR field */ 55 56 static int xicp_probe(device_t); 57 static int xicp_attach(device_t); 58 static int xics_probe(device_t); 59 static int xics_attach(device_t); 60 61 static void xicp_bind(device_t dev, u_int irq, cpuset_t cpumask); 62 static void xicp_dispatch(device_t, struct trapframe *); 63 static void xicp_enable(device_t, u_int, u_int); 64 static void xicp_eoi(device_t, u_int); 65 static void xicp_ipi(device_t, u_int); 66 static void xicp_mask(device_t, u_int); 67 static void xicp_unmask(device_t, u_int); 68 69 static device_method_t xicp_methods[] = { 70 /* Device interface */ 71 DEVMETHOD(device_probe, xicp_probe), 72 DEVMETHOD(device_attach, xicp_attach), 73 74 /* PIC interface */ 75 DEVMETHOD(pic_bind, xicp_bind), 76 DEVMETHOD(pic_dispatch, xicp_dispatch), 77 DEVMETHOD(pic_enable, xicp_enable), 78 DEVMETHOD(pic_eoi, xicp_eoi), 79 DEVMETHOD(pic_ipi, xicp_ipi), 80 DEVMETHOD(pic_mask, xicp_mask), 81 DEVMETHOD(pic_unmask, xicp_unmask), 82 83 { 0, 0 }, 84 }; 85 86 static device_method_t xics_methods[] = { 87 /* Device interface */ 88 DEVMETHOD(device_probe, xics_probe), 89 DEVMETHOD(device_attach, xics_attach), 90 91 { 0, 0 }, 92 }; 93 94 struct xicp_softc { 95 struct mtx sc_mtx; 96 97 int ibm_int_on; 98 int ibm_int_off; 99 int ibm_get_xive; 100 int ibm_set_xive; 101 102 /* XXX: inefficient -- hash table? tree? */ 103 struct { 104 int irq; 105 int vector; 106 } intvecs[256]; 107 int nintvecs; 108 }; 109 110 static driver_t xicp_driver = { 111 "xicp", 112 xicp_methods, 113 sizeof(struct xicp_softc) 114 }; 115 116 static driver_t xics_driver = { 117 "xics", 118 xics_methods, 119 0 120 }; 121 122 static devclass_t xicp_devclass; 123 static devclass_t xics_devclass; 124 125 EARLY_DRIVER_MODULE(xicp, ofwbus, xicp_driver, xicp_devclass, 0, 0, 126 BUS_PASS_INTERRUPT-1); 127 EARLY_DRIVER_MODULE(xics, ofwbus, xics_driver, xics_devclass, 0, 0, 128 BUS_PASS_INTERRUPT); 129 130 static int 131 xicp_probe(device_t dev) 132 { 133 if (ofw_bus_get_name(dev) == NULL || strcmp(ofw_bus_get_name(dev), 134 "interrupt-controller") != 0) 135 return (ENXIO); 136 137 if (!ofw_bus_is_compatible(dev, "ibm,ppc-xicp")) 138 return (ENXIO); 139 140 device_set_desc(dev, "PAPR virtual interrupt controller"); 141 return (BUS_PROBE_GENERIC); 142 } 143 144 static int 145 xics_probe(device_t dev) 146 { 147 if (ofw_bus_get_name(dev) == NULL || strcmp(ofw_bus_get_name(dev), 148 "interrupt-controller") != 0) 149 return (ENXIO); 150 151 if (!ofw_bus_is_compatible(dev, "ibm,ppc-xics")) 152 return (ENXIO); 153 154 device_set_desc(dev, "PAPR virtual interrupt source"); 155 return (BUS_PROBE_GENERIC); 156 } 157 158 static int 159 xicp_attach(device_t dev) 160 { 161 struct xicp_softc *sc = device_get_softc(dev); 162 phandle_t phandle = ofw_bus_get_node(dev); 163 164 mtx_init(&sc->sc_mtx, "XICP", NULL, MTX_DEF); 165 sc->nintvecs = 0; 166 167 sc->ibm_int_on = rtas_token_lookup("ibm,int-on"); 168 sc->ibm_int_off = rtas_token_lookup("ibm,int-off"); 169 sc->ibm_set_xive = rtas_token_lookup("ibm,set-xive"); 170 sc->ibm_get_xive = rtas_token_lookup("ibm,get-xive"); 171 172 powerpc_register_pic(dev, OF_xref_from_node(phandle), MAX_XICP_IRQS, 173 1 /* Number of IPIs */, FALSE); 174 root_pic = dev; 175 176 return (0); 177 } 178 179 static int 180 xics_attach(device_t dev) 181 { 182 phandle_t phandle = ofw_bus_get_node(dev); 183 184 /* The XICP (root PIC) will handle all our interrupts */ 185 powerpc_register_pic(root_pic, OF_xref_from_node(phandle), 186 MAX_XICP_IRQS, 1 /* Number of IPIs */, FALSE); 187 188 return (0); 189 } 190 191 /* 192 * PIC I/F methods. 193 */ 194 195 static void 196 xicp_bind(device_t dev, u_int irq, cpuset_t cpumask) 197 { 198 struct xicp_softc *sc = device_get_softc(dev); 199 cell_t status, cpu; 200 int ncpus, i, error; 201 202 /* 203 * This doesn't appear to actually support affinity groups, so pick a 204 * random CPU. 205 */ 206 ncpus = 0; 207 CPU_FOREACH(cpu) 208 if (CPU_ISSET(cpu, &cpumask)) ncpus++; 209 210 i = mftb() % ncpus; 211 ncpus = 0; 212 CPU_FOREACH(cpu) { 213 if (!CPU_ISSET(cpu, &cpumask)) 214 continue; 215 if (ncpus == i) 216 break; 217 ncpus++; 218 } 219 220 221 error = rtas_call_method(sc->ibm_set_xive, 3, 1, irq, cpu, 222 XICP_PRIORITY, &status); 223 if (error < 0) 224 panic("Cannot bind interrupt %d to CPU %d", irq, cpu); 225 } 226 227 static void 228 xicp_dispatch(device_t dev, struct trapframe *tf) 229 { 230 struct xicp_softc *sc; 231 uint64_t xirr, junk; 232 int i; 233 234 sc = device_get_softc(dev); 235 for (;;) { 236 /* Return value in R4, use the PFT call */ 237 phyp_pft_hcall(H_XIRR, 0, 0, 0, 0, &xirr, &junk, &junk); 238 xirr &= 0x00ffffff; 239 240 if (xirr == 0) { /* No more pending interrupts? */ 241 phyp_hcall(H_CPPR, (uint64_t)0xff); 242 break; 243 } 244 if (xirr == XICP_IPI) { /* Magic number for IPIs */ 245 xirr = MAX_XICP_IRQS; /* Map to FreeBSD magic */ 246 phyp_hcall(H_IPI, (uint64_t)(PCPU_GET(cpuid)), 247 0xff); /* Clear IPI */ 248 } 249 250 /* XXX: super inefficient */ 251 for (i = 0; i < sc->nintvecs; i++) { 252 if (sc->intvecs[i].irq == xirr) 253 break; 254 } 255 256 KASSERT(i < sc->nintvecs, ("Unmapped XIRR")); 257 powerpc_dispatch_intr(sc->intvecs[i].vector, tf); 258 } 259 } 260 261 static void 262 xicp_enable(device_t dev, u_int irq, u_int vector) 263 { 264 struct xicp_softc *sc; 265 cell_t status, cpu; 266 267 sc = device_get_softc(dev); 268 269 KASSERT(sc->nintvecs + 1 < nitems(sc->intvecs), 270 ("Too many XICP interrupts")); 271 272 mtx_lock(&sc->sc_mtx); 273 sc->intvecs[sc->nintvecs].irq = irq; 274 sc->intvecs[sc->nintvecs].vector = vector; 275 mb(); 276 sc->nintvecs++; 277 mtx_unlock(&sc->sc_mtx); 278 279 /* IPIs are also enabled */ 280 if (irq == MAX_XICP_IRQS) 281 return; 282 283 /* Bind to this CPU to start: distrib. ID is last entry in gserver# */ 284 cpu = PCPU_GET(cpuid); 285 rtas_call_method(sc->ibm_set_xive, 3, 1, irq, cpu, XICP_PRIORITY, 286 &status); 287 xicp_unmask(dev, irq); 288 } 289 290 static void 291 xicp_eoi(device_t dev, u_int irq) 292 { 293 uint64_t xirr; 294 295 if (irq == MAX_XICP_IRQS) /* Remap IPI interrupt to internal value */ 296 irq = XICP_IPI; 297 xirr = irq | (XICP_PRIORITY << 24); 298 299 phyp_hcall(H_EOI, xirr); 300 } 301 302 static void 303 xicp_ipi(device_t dev, u_int cpu) 304 { 305 306 phyp_hcall(H_IPI, (uint64_t)cpu, XICP_PRIORITY); 307 } 308 309 static void 310 xicp_mask(device_t dev, u_int irq) 311 { 312 struct xicp_softc *sc = device_get_softc(dev); 313 cell_t status; 314 315 if (irq == MAX_XICP_IRQS) 316 return; 317 318 rtas_call_method(sc->ibm_int_off, 1, 1, irq, &status); 319 } 320 321 static void 322 xicp_unmask(device_t dev, u_int irq) 323 { 324 struct xicp_softc *sc = device_get_softc(dev); 325 cell_t status; 326 327 if (irq == MAX_XICP_IRQS) 328 return; 329 330 rtas_call_method(sc->ibm_int_on, 1, 1, irq, &status); 331 } 332 333