1 /*- 2 * Copyright (c) 2010 Nathan Whitehorn 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/bus.h> 34 #include <sys/pcpu.h> 35 #include <sys/proc.h> 36 #include <sys/reboot.h> 37 #include <sys/smp.h> 38 39 #include <vm/vm.h> 40 #include <vm/pmap.h> 41 42 #include <machine/bus.h> 43 #include <machine/cpu.h> 44 #include <machine/hid.h> 45 #include <machine/platform.h> 46 #include <machine/platformvar.h> 47 #include <machine/pmap.h> 48 #include <machine/smp.h> 49 #include <machine/spr.h> 50 #include <machine/vmparam.h> 51 52 #include "platform_if.h" 53 #include "ps3-hvcall.h" 54 55 #ifdef SMP 56 extern void *ap_pcpu; 57 #endif 58 59 static int ps3_probe(platform_t); 60 static int ps3_attach(platform_t); 61 static void ps3_mem_regions(platform_t, struct mem_region *phys, int *physsz, 62 struct mem_region *avail, int *availsz); 63 static vm_offset_t ps3_real_maxaddr(platform_t); 64 static u_long ps3_timebase_freq(platform_t, struct cpuref *cpuref); 65 #ifdef SMP 66 static int ps3_smp_first_cpu(platform_t, struct cpuref *cpuref); 67 static int ps3_smp_next_cpu(platform_t, struct cpuref *cpuref); 68 static int ps3_smp_get_bsp(platform_t, struct cpuref *cpuref); 69 static int ps3_smp_start_cpu(platform_t, struct pcpu *cpu); 70 static struct cpu_group *ps3_smp_topo(platform_t); 71 #endif 72 static void ps3_reset(platform_t); 73 static void ps3_cpu_idle(sbintime_t); 74 75 static platform_method_t ps3_methods[] = { 76 PLATFORMMETHOD(platform_probe, ps3_probe), 77 PLATFORMMETHOD(platform_attach, ps3_attach), 78 PLATFORMMETHOD(platform_mem_regions, ps3_mem_regions), 79 PLATFORMMETHOD(platform_real_maxaddr, ps3_real_maxaddr), 80 PLATFORMMETHOD(platform_timebase_freq, ps3_timebase_freq), 81 82 #ifdef SMP 83 PLATFORMMETHOD(platform_smp_first_cpu, ps3_smp_first_cpu), 84 PLATFORMMETHOD(platform_smp_next_cpu, ps3_smp_next_cpu), 85 PLATFORMMETHOD(platform_smp_get_bsp, ps3_smp_get_bsp), 86 PLATFORMMETHOD(platform_smp_start_cpu, ps3_smp_start_cpu), 87 PLATFORMMETHOD(platform_smp_topo, ps3_smp_topo), 88 #endif 89 90 PLATFORMMETHOD(platform_reset, ps3_reset), 91 92 PLATFORMMETHOD_END 93 }; 94 95 static platform_def_t ps3_platform = { 96 "ps3", 97 ps3_methods, 98 0 99 }; 100 101 PLATFORM_DEF(ps3_platform); 102 103 static int 104 ps3_probe(platform_t plat) 105 { 106 107 return (BUS_PROBE_NOWILDCARD); 108 } 109 110 static int 111 ps3_attach(platform_t plat) 112 { 113 114 pmap_mmu_install("mmu_ps3", BUS_PROBE_SPECIFIC); 115 cpu_idle_hook = ps3_cpu_idle; 116 117 /* Set a breakpoint to make NULL an invalid address */ 118 lv1_set_dabr(0x7 /* read and write, MMU on */, 2 /* kernel accesses */); 119 120 return (0); 121 } 122 123 void 124 ps3_mem_regions(platform_t plat, struct mem_region *phys, int *physsz, 125 struct mem_region *avail_regions, int *availsz) 126 { 127 uint64_t lpar_id, junk, ppe_id; 128 129 /* Get real mode memory region */ 130 avail_regions[0].mr_start = 0; 131 lv1_get_logical_partition_id(&lpar_id); 132 lv1_get_logical_ppe_id(&ppe_id); 133 lv1_get_repository_node_value(lpar_id, 134 lv1_repository_string("bi") >> 32, lv1_repository_string("pu"), 135 ppe_id, lv1_repository_string("rm_size"), 136 &avail_regions[0].mr_size, &junk); 137 138 /* Now get extended memory region */ 139 lv1_get_repository_node_value(lpar_id, 140 lv1_repository_string("bi") >> 32, 141 lv1_repository_string("rgntotal"), 0, 0, 142 &avail_regions[1].mr_size, &junk); 143 144 /* Convert to maximum amount we can allocate in 16 MB pages */ 145 avail_regions[1].mr_size -= avail_regions[0].mr_size; 146 avail_regions[1].mr_size -= avail_regions[1].mr_size % (16*1024*1024); 147 148 /* Allocate extended memory region */ 149 lv1_allocate_memory(avail_regions[1].mr_size, 24 /* 16 MB pages */, 150 0, 0x04 /* any address */, &avail_regions[1].mr_start, &junk); 151 152 *availsz = 2; 153 154 if (phys != NULL) { 155 memcpy(phys, avail_regions, sizeof(*phys)*2); 156 *physsz = 2; 157 } 158 } 159 160 static u_long 161 ps3_timebase_freq(platform_t plat, struct cpuref *cpuref) 162 { 163 uint64_t ticks, node_id, junk; 164 165 lv1_get_repository_node_value(PS3_LPAR_ID_PME, 166 lv1_repository_string("be") >> 32, 0, 0, 0, &node_id, &junk); 167 lv1_get_repository_node_value(PS3_LPAR_ID_PME, 168 lv1_repository_string("be") >> 32, node_id, 169 lv1_repository_string("clock"), 0, &ticks, &junk); 170 171 return (ticks); 172 } 173 174 #ifdef SMP 175 static int 176 ps3_smp_first_cpu(platform_t plat, struct cpuref *cpuref) 177 { 178 179 cpuref->cr_cpuid = 0; 180 cpuref->cr_hwref = cpuref->cr_cpuid; 181 182 return (0); 183 } 184 185 static int 186 ps3_smp_next_cpu(platform_t plat, struct cpuref *cpuref) 187 { 188 189 if (cpuref->cr_cpuid >= 1) 190 return (ENOENT); 191 192 cpuref->cr_cpuid++; 193 cpuref->cr_hwref = cpuref->cr_cpuid; 194 195 return (0); 196 } 197 198 static int 199 ps3_smp_get_bsp(platform_t plat, struct cpuref *cpuref) 200 { 201 202 cpuref->cr_cpuid = 0; 203 cpuref->cr_hwref = cpuref->cr_cpuid; 204 205 return (0); 206 } 207 208 static int 209 ps3_smp_start_cpu(platform_t plat, struct pcpu *pc) 210 { 211 /* loader(8) is spinning on 0x40 == 0 right now */ 212 uint32_t *secondary_spin_sem = (uint32_t *)(0x40); 213 int timeout; 214 215 if (pc->pc_hwref != 1) 216 return (ENXIO); 217 218 ap_pcpu = pc; 219 *secondary_spin_sem = 1; 220 powerpc_sync(); 221 DELAY(1); 222 223 timeout = 10000; 224 while (!pc->pc_awake && timeout--) 225 DELAY(100); 226 227 return ((pc->pc_awake) ? 0 : EBUSY); 228 } 229 230 static struct cpu_group * 231 ps3_smp_topo(platform_t plat) 232 { 233 return (smp_topo_1level(CG_SHARE_L1, 2, CG_FLAG_SMT)); 234 } 235 #endif 236 237 static void 238 ps3_reset(platform_t plat) 239 { 240 lv1_panic(1); 241 } 242 243 static vm_offset_t 244 ps3_real_maxaddr(platform_t plat) 245 { 246 struct mem_region *phys, *avail; 247 int nphys, navail; 248 249 mem_regions(&phys, &nphys, &avail, &navail); 250 251 return (phys[0].mr_start + phys[0].mr_size); 252 } 253 254 static void 255 ps3_cpu_idle(sbintime_t sbt) 256 { 257 lv1_pause(0); 258 } 259 260