1 /*- 2 * Copyright (c) 2010 Nathan Whitehorn 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT 20 * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 21 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 22 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 23 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF 24 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/kernel.h> 33 #include <sys/bus.h> 34 #include <sys/pcpu.h> 35 #include <sys/proc.h> 36 #include <sys/reboot.h> 37 #include <sys/smp.h> 38 39 #include <vm/vm.h> 40 #include <vm/pmap.h> 41 42 #include <machine/bus.h> 43 #include <machine/cpu.h> 44 #include <machine/hid.h> 45 #include <machine/platform.h> 46 #include <machine/platformvar.h> 47 #include <machine/smp.h> 48 #include <machine/spr.h> 49 #include <machine/vmparam.h> 50 51 #include <dev/ofw/openfirm.h> 52 53 #include "platform_if.h" 54 #include "ps3-hvcall.h" 55 56 #ifdef SMP 57 extern void *ap_pcpu; 58 #endif 59 60 static int ps3_probe(platform_t); 61 static int ps3_attach(platform_t); 62 static void ps3_mem_regions(platform_t, struct mem_region *phys, int *physsz, 63 struct mem_region *avail, int *availsz); 64 static vm_offset_t ps3_real_maxaddr(platform_t); 65 static u_long ps3_timebase_freq(platform_t, struct cpuref *cpuref); 66 #ifdef SMP 67 static int ps3_smp_first_cpu(platform_t, struct cpuref *cpuref); 68 static int ps3_smp_next_cpu(platform_t, struct cpuref *cpuref); 69 static int ps3_smp_get_bsp(platform_t, struct cpuref *cpuref); 70 static int ps3_smp_start_cpu(platform_t, struct pcpu *cpu); 71 static struct cpu_group *ps3_smp_topo(platform_t); 72 #endif 73 static void ps3_reset(platform_t); 74 static void ps3_cpu_idle(sbintime_t); 75 76 static platform_method_t ps3_methods[] = { 77 PLATFORMMETHOD(platform_probe, ps3_probe), 78 PLATFORMMETHOD(platform_attach, ps3_attach), 79 PLATFORMMETHOD(platform_mem_regions, ps3_mem_regions), 80 PLATFORMMETHOD(platform_real_maxaddr, ps3_real_maxaddr), 81 PLATFORMMETHOD(platform_timebase_freq, ps3_timebase_freq), 82 83 #ifdef SMP 84 PLATFORMMETHOD(platform_smp_first_cpu, ps3_smp_first_cpu), 85 PLATFORMMETHOD(platform_smp_next_cpu, ps3_smp_next_cpu), 86 PLATFORMMETHOD(platform_smp_get_bsp, ps3_smp_get_bsp), 87 PLATFORMMETHOD(platform_smp_start_cpu, ps3_smp_start_cpu), 88 PLATFORMMETHOD(platform_smp_topo, ps3_smp_topo), 89 #endif 90 91 PLATFORMMETHOD(platform_reset, ps3_reset), 92 93 PLATFORMMETHOD_END 94 }; 95 96 static platform_def_t ps3_platform = { 97 "ps3", 98 ps3_methods, 99 0 100 }; 101 102 PLATFORM_DEF(ps3_platform); 103 104 static int 105 ps3_probe(platform_t plat) 106 { 107 phandle_t root; 108 char compatible[64]; 109 110 root = OF_finddevice("/"); 111 if (OF_getprop(root, "compatible", compatible, sizeof(compatible)) <= 0) 112 return (BUS_PROBE_NOWILDCARD); 113 114 if (strncmp(compatible, "sony,ps3", sizeof(compatible)) != 0) 115 return (BUS_PROBE_NOWILDCARD); 116 117 return (BUS_PROBE_SPECIFIC); 118 } 119 120 static int 121 ps3_attach(platform_t plat) 122 { 123 124 pmap_mmu_install("mmu_ps3", BUS_PROBE_SPECIFIC); 125 cpu_idle_hook = ps3_cpu_idle; 126 127 /* Set a breakpoint to make NULL an invalid address */ 128 lv1_set_dabr(0x7 /* read and write, MMU on */, 2 /* kernel accesses */); 129 130 return (0); 131 } 132 133 void 134 ps3_mem_regions(platform_t plat, struct mem_region *phys, int *physsz, 135 struct mem_region *avail_regions, int *availsz) 136 { 137 uint64_t lpar_id, junk, ppe_id; 138 139 /* Get real mode memory region */ 140 avail_regions[0].mr_start = 0; 141 lv1_get_logical_partition_id(&lpar_id); 142 lv1_get_logical_ppe_id(&ppe_id); 143 lv1_get_repository_node_value(lpar_id, 144 lv1_repository_string("bi") >> 32, lv1_repository_string("pu"), 145 ppe_id, lv1_repository_string("rm_size"), 146 &avail_regions[0].mr_size, &junk); 147 148 /* Now get extended memory region */ 149 lv1_get_repository_node_value(lpar_id, 150 lv1_repository_string("bi") >> 32, 151 lv1_repository_string("rgntotal"), 0, 0, 152 &avail_regions[1].mr_size, &junk); 153 154 /* Convert to maximum amount we can allocate in 16 MB pages */ 155 avail_regions[1].mr_size -= avail_regions[0].mr_size; 156 avail_regions[1].mr_size -= avail_regions[1].mr_size % (16*1024*1024); 157 158 /* Allocate extended memory region */ 159 lv1_allocate_memory(avail_regions[1].mr_size, 24 /* 16 MB pages */, 160 0, 0x04 /* any address */, &avail_regions[1].mr_start, &junk); 161 162 *availsz = 2; 163 164 if (phys != NULL) { 165 memcpy(phys, avail_regions, sizeof(*phys)*2); 166 *physsz = 2; 167 } 168 } 169 170 static u_long 171 ps3_timebase_freq(platform_t plat, struct cpuref *cpuref) 172 { 173 uint64_t ticks, node_id, junk; 174 175 lv1_get_repository_node_value(PS3_LPAR_ID_PME, 176 lv1_repository_string("be") >> 32, 0, 0, 0, &node_id, &junk); 177 lv1_get_repository_node_value(PS3_LPAR_ID_PME, 178 lv1_repository_string("be") >> 32, node_id, 179 lv1_repository_string("clock"), 0, &ticks, &junk); 180 181 return (ticks); 182 } 183 184 #ifdef SMP 185 static int 186 ps3_smp_first_cpu(platform_t plat, struct cpuref *cpuref) 187 { 188 189 cpuref->cr_cpuid = 0; 190 cpuref->cr_hwref = cpuref->cr_cpuid; 191 192 return (0); 193 } 194 195 static int 196 ps3_smp_next_cpu(platform_t plat, struct cpuref *cpuref) 197 { 198 199 if (cpuref->cr_cpuid >= 1) 200 return (ENOENT); 201 202 cpuref->cr_cpuid++; 203 cpuref->cr_hwref = cpuref->cr_cpuid; 204 205 return (0); 206 } 207 208 static int 209 ps3_smp_get_bsp(platform_t plat, struct cpuref *cpuref) 210 { 211 212 cpuref->cr_cpuid = 0; 213 cpuref->cr_hwref = cpuref->cr_cpuid; 214 215 return (0); 216 } 217 218 static int 219 ps3_smp_start_cpu(platform_t plat, struct pcpu *pc) 220 { 221 /* loader(8) is spinning on 0x40 == 0 right now */ 222 uint32_t *secondary_spin_sem = (uint32_t *)(0x40); 223 int timeout; 224 225 if (pc->pc_hwref != 1) 226 return (ENXIO); 227 228 ap_pcpu = pc; 229 *secondary_spin_sem = 1; 230 powerpc_sync(); 231 DELAY(1); 232 233 timeout = 10000; 234 while (!pc->pc_awake && timeout--) 235 DELAY(100); 236 237 return ((pc->pc_awake) ? 0 : EBUSY); 238 } 239 240 static struct cpu_group * 241 ps3_smp_topo(platform_t plat) 242 { 243 return (smp_topo_1level(CG_SHARE_L1, 2, CG_FLAG_SMT)); 244 } 245 #endif 246 247 static void 248 ps3_reset(platform_t plat) 249 { 250 lv1_panic(1); 251 } 252 253 static vm_offset_t 254 ps3_real_maxaddr(platform_t plat) 255 { 256 struct mem_region *phys, *avail; 257 int nphys, navail; 258 259 mem_regions(&phys, &nphys, &avail, &navail); 260 261 return (phys[0].mr_start + phys[0].mr_size); 262 } 263 264 static void 265 ps3_cpu_idle(sbintime_t sbt) 266 { 267 lv1_pause(0); 268 } 269 270