1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2010 Nathan Whitehorn 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 21 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 22 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/kernel.h> 33 #include <sys/ktr.h> 34 #include <sys/lock.h> 35 #include <sys/msgbuf.h> 36 #include <sys/mutex.h> 37 #include <sys/proc.h> 38 #include <sys/sysctl.h> 39 #include <sys/systm.h> 40 #include <sys/vmmeter.h> 41 42 #include <vm/vm.h> 43 #include <vm/vm_param.h> 44 #include <vm/vm_kern.h> 45 #include <vm/vm_page.h> 46 #include <vm/vm_map.h> 47 #include <vm/vm_object.h> 48 #include <vm/vm_extern.h> 49 #include <vm/vm_pageout.h> 50 #include <vm/uma.h> 51 52 #include <powerpc/aim/mmu_oea64.h> 53 54 #include "ps3-hvcall.h" 55 56 #define VSID_HASH_MASK 0x0000007fffffffffUL 57 #define PTESYNC() __asm __volatile("ptesync") 58 59 extern int ps3fb_remap(void); 60 61 static uint64_t mps3_vas_id; 62 63 /* 64 * Kernel MMU interface 65 */ 66 67 static void mps3_install(void); 68 static void mps3_bootstrap(vm_offset_t kernelstart, 69 vm_offset_t kernelend); 70 static void mps3_cpu_bootstrap(int ap); 71 static int64_t mps3_pte_synch(struct pvo_entry *); 72 static int64_t mps3_pte_clear(struct pvo_entry *, uint64_t ptebit); 73 static int64_t mps3_pte_unset(struct pvo_entry *); 74 static int64_t mps3_pte_insert(struct pvo_entry *); 75 76 static struct pmap_funcs mps3_methods = { 77 .install = mps3_install, 78 .bootstrap = mps3_bootstrap, 79 .cpu_bootstrap = mps3_cpu_bootstrap, 80 }; 81 82 static struct moea64_funcs mps3_funcs = { 83 .pte_synch = mps3_pte_synch, 84 .pte_clear = mps3_pte_clear, 85 .pte_unset = mps3_pte_unset, 86 .pte_insert = mps3_pte_insert, 87 }; 88 89 MMU_DEF_INHERIT(ps3_mmu, "mmu_ps3", mps3_methods, oea64_mmu); 90 91 static struct mtx mps3_table_lock; 92 93 static void 94 mps3_install() 95 { 96 moea64_ops = &mps3_funcs; 97 moea64_install(); 98 } 99 100 static void 101 mps3_bootstrap(vm_offset_t kernelstart, vm_offset_t kernelend) 102 { 103 uint64_t final_pteg_count; 104 105 mtx_init(&mps3_table_lock, "page table", NULL, MTX_DEF); 106 107 moea64_early_bootstrap(kernelstart, kernelend); 108 109 /* In case we had a page table already */ 110 lv1_destruct_virtual_address_space(0); 111 112 /* Allocate new hardware page table */ 113 lv1_construct_virtual_address_space( 114 20 /* log_2(moea64_pteg_count) */, 2 /* n page sizes */, 115 (24UL << 56) | (16UL << 48) /* page sizes 16 MB + 64 KB */, 116 &mps3_vas_id, &final_pteg_count 117 ); 118 119 lv1_select_virtual_address_space(mps3_vas_id); 120 121 moea64_pteg_count = final_pteg_count / sizeof(struct lpteg); 122 123 moea64_mid_bootstrap(kernelstart, kernelend); 124 moea64_late_bootstrap(kernelstart, kernelend); 125 } 126 127 static void 128 mps3_cpu_bootstrap(int ap) 129 { 130 struct slb *slb = PCPU_GET(aim.slb); 131 register_t seg0; 132 int i; 133 134 mtmsr(mfmsr() & ~PSL_DR & ~PSL_IR); 135 136 /* 137 * Select the page table we configured above and set up the FB mapping 138 * so we can have a console. 139 */ 140 lv1_select_virtual_address_space(mps3_vas_id); 141 142 if (!ap) 143 ps3fb_remap(); 144 145 /* 146 * Install kernel SLB entries 147 */ 148 149 __asm __volatile ("slbia"); 150 __asm __volatile ("slbmfee %0,%1; slbie %0;" : "=r"(seg0) : "r"(0)); 151 for (i = 0; i < 64; i++) { 152 if (!(slb[i].slbe & SLBE_VALID)) 153 continue; 154 155 __asm __volatile ("slbmte %0, %1" :: 156 "r"(slb[i].slbv), "r"(slb[i].slbe)); 157 } 158 } 159 160 static int64_t 161 mps3_pte_synch_locked(struct pvo_entry *pvo) 162 { 163 uint64_t halfbucket[4], rcbits; 164 165 PTESYNC(); 166 lv1_read_htab_entries(mps3_vas_id, pvo->pvo_pte.slot & ~0x3UL, 167 &halfbucket[0], &halfbucket[1], &halfbucket[2], &halfbucket[3], 168 &rcbits); 169 170 /* Check if present in page table */ 171 if ((halfbucket[pvo->pvo_pte.slot & 0x3] & LPTE_AVPN_MASK) != 172 ((pvo->pvo_vpn >> (ADDR_API_SHFT64 - ADDR_PIDX_SHFT)) & 173 LPTE_AVPN_MASK)) 174 return (-1); 175 if (!(halfbucket[pvo->pvo_pte.slot & 0x3] & LPTE_VALID)) 176 return (-1); 177 178 /* 179 * rcbits contains the low 12 bits of each PTE's 2nd part, 180 * spaced at 16-bit intervals 181 */ 182 183 return ((rcbits >> ((3 - (pvo->pvo_pte.slot & 0x3))*16)) & 184 (LPTE_CHG | LPTE_REF)); 185 } 186 187 static int64_t 188 mps3_pte_synch(struct pvo_entry *pvo) 189 { 190 int64_t retval; 191 192 mtx_lock(&mps3_table_lock); 193 retval = mps3_pte_synch_locked(pvo); 194 mtx_unlock(&mps3_table_lock); 195 196 return (retval); 197 } 198 199 static int64_t 200 mps3_pte_clear(struct pvo_entry *pvo, uint64_t ptebit) 201 { 202 int64_t refchg; 203 struct lpte pte; 204 205 mtx_lock(&mps3_table_lock); 206 207 refchg = mps3_pte_synch_locked(pvo); 208 if (refchg < 0) { 209 mtx_unlock(&mps3_table_lock); 210 return (refchg); 211 } 212 213 moea64_pte_from_pvo(pvo, &pte); 214 215 pte.pte_lo |= refchg; 216 pte.pte_lo &= ~ptebit; 217 /* XXX: race on RC bits between write and sync. Anything to do? */ 218 lv1_write_htab_entry(mps3_vas_id, pvo->pvo_pte.slot, pte.pte_hi, 219 pte.pte_lo); 220 mtx_unlock(&mps3_table_lock); 221 222 return (refchg); 223 } 224 225 static int64_t 226 mps3_pte_unset(struct pvo_entry *pvo) 227 { 228 int64_t refchg; 229 230 mtx_lock(&mps3_table_lock); 231 refchg = mps3_pte_synch_locked(pvo); 232 if (refchg < 0) { 233 STAT_MOEA64(moea64_pte_overflow--); 234 mtx_unlock(&mps3_table_lock); 235 return (-1); 236 } 237 /* XXX: race on RC bits between unset and sync. Anything to do? */ 238 lv1_write_htab_entry(mps3_vas_id, pvo->pvo_pte.slot, 0, 0); 239 mtx_unlock(&mps3_table_lock); 240 STAT_MOEA64(moea64_pte_valid--); 241 242 return (refchg & (LPTE_REF | LPTE_CHG)); 243 } 244 245 static int64_t 246 mps3_pte_insert(struct pvo_entry *pvo) 247 { 248 int result; 249 struct lpte pte, evicted; 250 uint64_t index; 251 252 if (pvo->pvo_vaddr & PVO_HID) { 253 /* Hypercall needs primary PTEG */ 254 pvo->pvo_vaddr &= ~PVO_HID; 255 pvo->pvo_pte.slot ^= (moea64_pteg_mask << 3); 256 } 257 258 pvo->pvo_pte.slot &= ~7UL; 259 moea64_pte_from_pvo(pvo, &pte); 260 evicted.pte_hi = 0; 261 PTESYNC(); 262 mtx_lock(&mps3_table_lock); 263 result = lv1_insert_htab_entry(mps3_vas_id, pvo->pvo_pte.slot, 264 pte.pte_hi, pte.pte_lo, LPTE_LOCKED | LPTE_WIRED, 0, 265 &index, &evicted.pte_hi, &evicted.pte_lo); 266 mtx_unlock(&mps3_table_lock); 267 268 if (result != 0) { 269 /* No freeable slots in either PTEG? We're hosed. */ 270 panic("mps3_pte_insert: overflow (%d)", result); 271 return (-1); 272 } 273 274 /* 275 * See where we ended up. 276 */ 277 if ((index & ~7UL) != pvo->pvo_pte.slot) 278 pvo->pvo_vaddr |= PVO_HID; 279 pvo->pvo_pte.slot = index; 280 281 STAT_MOEA64(moea64_pte_valid++); 282 283 if (evicted.pte_hi) { 284 KASSERT((evicted.pte_hi & (LPTE_WIRED | LPTE_LOCKED)) == 0, 285 ("Evicted a wired PTE")); 286 STAT_MOEA64(moea64_pte_valid--); 287 STAT_MOEA64(moea64_pte_overflow++); 288 } 289 290 return (0); 291 } 292