1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2010 Nathan Whitehorn 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 21 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 22 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/cdefs.h> 29 __FBSDID("$FreeBSD$"); 30 31 #include <sys/param.h> 32 #include <sys/kernel.h> 33 #include <sys/ktr.h> 34 #include <sys/lock.h> 35 #include <sys/msgbuf.h> 36 #include <sys/mutex.h> 37 #include <sys/proc.h> 38 #include <sys/sysctl.h> 39 #include <sys/systm.h> 40 #include <sys/vmmeter.h> 41 42 #include <vm/vm.h> 43 #include <vm/vm_param.h> 44 #include <vm/vm_kern.h> 45 #include <vm/vm_page.h> 46 #include <vm/vm_map.h> 47 #include <vm/vm_object.h> 48 #include <vm/vm_extern.h> 49 #include <vm/vm_pageout.h> 50 #include <vm/uma.h> 51 52 #include <powerpc/aim/mmu_oea64.h> 53 54 #include "mmu_if.h" 55 #include "moea64_if.h" 56 #include "ps3-hvcall.h" 57 58 #define VSID_HASH_MASK 0x0000007fffffffffUL 59 #define PTESYNC() __asm __volatile("ptesync") 60 61 extern int ps3fb_remap(void); 62 63 static uint64_t mps3_vas_id; 64 65 /* 66 * Kernel MMU interface 67 */ 68 69 static void mps3_bootstrap(mmu_t mmup, vm_offset_t kernelstart, 70 vm_offset_t kernelend); 71 static void mps3_cpu_bootstrap(mmu_t mmup, int ap); 72 static int64_t mps3_pte_synch(mmu_t, struct pvo_entry *); 73 static int64_t mps3_pte_clear(mmu_t, struct pvo_entry *, uint64_t ptebit); 74 static int64_t mps3_pte_unset(mmu_t, struct pvo_entry *); 75 static int mps3_pte_insert(mmu_t, struct pvo_entry *); 76 77 78 static mmu_method_t mps3_methods[] = { 79 MMUMETHOD(mmu_bootstrap, mps3_bootstrap), 80 MMUMETHOD(mmu_cpu_bootstrap, mps3_cpu_bootstrap), 81 82 MMUMETHOD(moea64_pte_synch, mps3_pte_synch), 83 MMUMETHOD(moea64_pte_clear, mps3_pte_clear), 84 MMUMETHOD(moea64_pte_unset, mps3_pte_unset), 85 MMUMETHOD(moea64_pte_insert, mps3_pte_insert), 86 87 { 0, 0 } 88 }; 89 90 MMU_DEF_INHERIT(ps3_mmu, "mmu_ps3", mps3_methods, 0, oea64_mmu); 91 92 static struct mtx mps3_table_lock; 93 94 static void 95 mps3_bootstrap(mmu_t mmup, vm_offset_t kernelstart, vm_offset_t kernelend) 96 { 97 uint64_t final_pteg_count; 98 99 mtx_init(&mps3_table_lock, "page table", NULL, MTX_DEF); 100 101 moea64_early_bootstrap(mmup, kernelstart, kernelend); 102 103 lv1_construct_virtual_address_space( 104 20 /* log_2(moea64_pteg_count) */, 2 /* n page sizes */, 105 (24UL << 56) | (16UL << 48) /* page sizes 16 MB + 64 KB */, 106 &mps3_vas_id, &final_pteg_count 107 ); 108 109 moea64_pteg_count = final_pteg_count / sizeof(struct lpteg); 110 111 moea64_mid_bootstrap(mmup, kernelstart, kernelend); 112 moea64_late_bootstrap(mmup, kernelstart, kernelend); 113 } 114 115 static void 116 mps3_cpu_bootstrap(mmu_t mmup, int ap) 117 { 118 struct slb *slb = PCPU_GET(slb); 119 register_t seg0; 120 int i; 121 122 mtmsr(mfmsr() & ~PSL_DR & ~PSL_IR); 123 124 /* 125 * Destroy the loader's address space if we are coming up for 126 * the first time, and redo the FB mapping so we can continue 127 * having a console. 128 */ 129 130 if (!ap) 131 lv1_destruct_virtual_address_space(0); 132 133 lv1_select_virtual_address_space(mps3_vas_id); 134 135 if (!ap) 136 ps3fb_remap(); 137 138 /* 139 * Install kernel SLB entries 140 */ 141 142 __asm __volatile ("slbia"); 143 __asm __volatile ("slbmfee %0,%1; slbie %0;" : "=r"(seg0) : "r"(0)); 144 for (i = 0; i < 64; i++) { 145 if (!(slb[i].slbe & SLBE_VALID)) 146 continue; 147 148 __asm __volatile ("slbmte %0, %1" :: 149 "r"(slb[i].slbv), "r"(slb[i].slbe)); 150 } 151 } 152 153 static int64_t 154 mps3_pte_synch_locked(struct pvo_entry *pvo) 155 { 156 uint64_t halfbucket[4], rcbits; 157 158 PTESYNC(); 159 lv1_read_htab_entries(mps3_vas_id, pvo->pvo_pte.slot & ~0x3UL, 160 &halfbucket[0], &halfbucket[1], &halfbucket[2], &halfbucket[3], 161 &rcbits); 162 163 /* Check if present in page table */ 164 if ((halfbucket[pvo->pvo_pte.slot & 0x3] & LPTE_AVPN_MASK) != 165 ((pvo->pvo_vpn >> (ADDR_API_SHFT64 - ADDR_PIDX_SHFT)) & 166 LPTE_AVPN_MASK)) 167 return (-1); 168 if (!(halfbucket[pvo->pvo_pte.slot & 0x3] & LPTE_VALID)) 169 return (-1); 170 171 /* 172 * rcbits contains the low 12 bits of each PTE's 2nd part, 173 * spaced at 16-bit intervals 174 */ 175 176 return ((rcbits >> ((3 - (pvo->pvo_pte.slot & 0x3))*16)) & 177 (LPTE_CHG | LPTE_REF)); 178 } 179 180 static int64_t 181 mps3_pte_synch(mmu_t mmu, struct pvo_entry *pvo) 182 { 183 int64_t retval; 184 185 mtx_lock(&mps3_table_lock); 186 retval = mps3_pte_synch_locked(pvo); 187 mtx_unlock(&mps3_table_lock); 188 189 return (retval); 190 } 191 192 static int64_t 193 mps3_pte_clear(mmu_t mmu, struct pvo_entry *pvo, uint64_t ptebit) 194 { 195 int64_t refchg; 196 struct lpte pte; 197 198 mtx_lock(&mps3_table_lock); 199 200 refchg = mps3_pte_synch_locked(pvo); 201 if (refchg < 0) { 202 mtx_unlock(&mps3_table_lock); 203 return (refchg); 204 } 205 206 moea64_pte_from_pvo(pvo, &pte); 207 208 pte.pte_lo |= refchg; 209 pte.pte_lo &= ~ptebit; 210 /* XXX: race on RC bits between write and sync. Anything to do? */ 211 lv1_write_htab_entry(mps3_vas_id, pvo->pvo_pte.slot, pte.pte_hi, 212 pte.pte_lo); 213 mtx_unlock(&mps3_table_lock); 214 215 return (refchg); 216 } 217 218 static int64_t 219 mps3_pte_unset(mmu_t mmu, struct pvo_entry *pvo) 220 { 221 int64_t refchg; 222 223 mtx_lock(&mps3_table_lock); 224 refchg = mps3_pte_synch_locked(pvo); 225 if (refchg < 0) { 226 moea64_pte_overflow--; 227 mtx_unlock(&mps3_table_lock); 228 return (-1); 229 } 230 /* XXX: race on RC bits between unset and sync. Anything to do? */ 231 lv1_write_htab_entry(mps3_vas_id, pvo->pvo_pte.slot, 0, 0); 232 mtx_unlock(&mps3_table_lock); 233 moea64_pte_valid--; 234 235 return (refchg & (LPTE_REF | LPTE_CHG)); 236 } 237 238 static int 239 mps3_pte_insert(mmu_t mmu, struct pvo_entry *pvo) 240 { 241 int result; 242 struct lpte pte, evicted; 243 uint64_t index; 244 245 if (pvo->pvo_vaddr & PVO_HID) { 246 /* Hypercall needs primary PTEG */ 247 pvo->pvo_vaddr &= ~PVO_HID; 248 pvo->pvo_pte.slot ^= (moea64_pteg_mask << 3); 249 } 250 251 pvo->pvo_pte.slot &= ~7UL; 252 moea64_pte_from_pvo(pvo, &pte); 253 evicted.pte_hi = 0; 254 PTESYNC(); 255 mtx_lock(&mps3_table_lock); 256 result = lv1_insert_htab_entry(mps3_vas_id, pvo->pvo_pte.slot, 257 pte.pte_hi, pte.pte_lo, LPTE_LOCKED | LPTE_WIRED, 0, 258 &index, &evicted.pte_hi, &evicted.pte_lo); 259 mtx_unlock(&mps3_table_lock); 260 261 if (result != 0) { 262 /* No freeable slots in either PTEG? We're hosed. */ 263 panic("mps3_pte_insert: overflow (%d)", result); 264 return (-1); 265 } 266 267 /* 268 * See where we ended up. 269 */ 270 if ((index & ~7UL) != pvo->pvo_pte.slot) 271 pvo->pvo_vaddr |= PVO_HID; 272 pvo->pvo_pte.slot = index; 273 274 moea64_pte_valid++; 275 276 if (evicted.pte_hi) { 277 KASSERT((evicted.pte_hi & (LPTE_WIRED | LPTE_LOCKED)) == 0, 278 ("Evicted a wired PTE")); 279 moea64_pte_valid--; 280 moea64_pte_overflow++; 281 } 282 283 return (0); 284 } 285 286