1 /*- 2 * Copyright (c) 2015 Nathan Whitehorn 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/module.h> 33 #include <sys/bus.h> 34 #include <sys/conf.h> 35 #include <sys/clock.h> 36 #include <sys/cpu.h> 37 #include <sys/kernel.h> 38 #include <sys/kthread.h> 39 #include <sys/reboot.h> 40 #include <sys/sysctl.h> 41 #include <sys/endian.h> 42 43 #include <vm/vm.h> 44 #include <vm/pmap.h> 45 46 #include <dev/ofw/ofw_bus.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 #include <dev/ofw/openfirm.h> 49 50 #include "clock_if.h" 51 #include "opal.h" 52 53 static int opaldev_probe(device_t); 54 static int opaldev_attach(device_t); 55 /* clock interface */ 56 static int opal_gettime(device_t dev, struct timespec *ts); 57 static int opal_settime(device_t dev, struct timespec *ts); 58 /* ofw bus interface */ 59 static const struct ofw_bus_devinfo *opaldev_get_devinfo(device_t dev, 60 device_t child); 61 62 static void opal_shutdown(void *arg, int howto); 63 static void opal_handle_shutdown_message(void *unused, 64 struct opal_msg *msg); 65 static void opal_intr(void *); 66 67 static device_method_t opaldev_methods[] = { 68 /* Device interface */ 69 DEVMETHOD(device_probe, opaldev_probe), 70 DEVMETHOD(device_attach, opaldev_attach), 71 72 /* clock interface */ 73 DEVMETHOD(clock_gettime, opal_gettime), 74 DEVMETHOD(clock_settime, opal_settime), 75 76 /* Bus interface */ 77 DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), 78 79 /* ofw_bus interface */ 80 DEVMETHOD(ofw_bus_get_devinfo, opaldev_get_devinfo), 81 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 82 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 83 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 84 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 85 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 86 87 DEVMETHOD_END 88 }; 89 90 static driver_t opaldev_driver = { 91 "opal", 92 opaldev_methods, 93 0 94 }; 95 96 static devclass_t opaldev_devclass; 97 98 EARLY_DRIVER_MODULE(opaldev, ofwbus, opaldev_driver, opaldev_devclass, 0, 0, 99 BUS_PASS_BUS); 100 101 static void opal_heartbeat(void); 102 static void opal_handle_messages(void); 103 104 static struct proc *opal_hb_proc; 105 static struct kproc_desc opal_heartbeat_kp = { 106 "opal_heartbeat", 107 opal_heartbeat, 108 &opal_hb_proc 109 }; 110 111 SYSINIT(opal_heartbeat_setup, SI_SUB_KTHREAD_IDLE, SI_ORDER_ANY, kproc_start, 112 &opal_heartbeat_kp); 113 114 static int opal_heartbeat_ms; 115 EVENTHANDLER_LIST_DEFINE(OPAL_ASYNC_COMP); 116 EVENTHANDLER_LIST_DEFINE(OPAL_EPOW); 117 EVENTHANDLER_LIST_DEFINE(OPAL_SHUTDOWN); 118 EVENTHANDLER_LIST_DEFINE(OPAL_HMI_EVT); 119 EVENTHANDLER_LIST_DEFINE(OPAL_DPO); 120 EVENTHANDLER_LIST_DEFINE(OPAL_OCC); 121 122 #define OPAL_SOFT_OFF 0 123 #define OPAL_SOFT_REBOOT 1 124 125 static void 126 opal_heartbeat(void) 127 { 128 uint64_t events; 129 130 if (opal_heartbeat_ms == 0) 131 kproc_exit(0); 132 133 while (1) { 134 events = 0; 135 /* Turn the OPAL state crank */ 136 opal_call(OPAL_POLL_EVENTS, vtophys(&events)); 137 if (events & OPAL_EVENT_MSG_PENDING) 138 opal_handle_messages(); 139 tsleep(opal_hb_proc, 0, "opal", 140 MSEC_2_TICKS(opal_heartbeat_ms)); 141 } 142 } 143 144 static int 145 opaldev_probe(device_t dev) 146 { 147 phandle_t iparent; 148 pcell_t *irqs; 149 int i, n_irqs; 150 151 if (!ofw_bus_is_compatible(dev, "ibm,opal-v3")) 152 return (ENXIO); 153 if (opal_check() != 0) 154 return (ENXIO); 155 156 device_set_desc(dev, "OPAL Abstraction Firmware"); 157 158 /* Manually add IRQs before attaching */ 159 if (OF_hasprop(ofw_bus_get_node(dev), "opal-interrupts")) { 160 iparent = OF_finddevice("/interrupt-controller@0"); 161 iparent = OF_xref_from_node(iparent); 162 163 n_irqs = OF_getproplen(ofw_bus_get_node(dev), 164 "opal-interrupts") / sizeof(*irqs); 165 irqs = malloc(n_irqs * sizeof(*irqs), M_DEVBUF, M_WAITOK); 166 OF_getencprop(ofw_bus_get_node(dev), "opal-interrupts", irqs, 167 n_irqs * sizeof(*irqs)); 168 for (i = 0; i < n_irqs; i++) 169 bus_set_resource(dev, SYS_RES_IRQ, i, 170 ofw_bus_map_intr(dev, iparent, 1, &irqs[i]), 1); 171 free(irqs, M_DEVBUF); 172 } 173 174 175 return (BUS_PROBE_SPECIFIC); 176 } 177 178 static int 179 opaldev_attach(device_t dev) 180 { 181 phandle_t child; 182 device_t cdev; 183 uint64_t junk; 184 int i, rv; 185 uint32_t async_count; 186 struct ofw_bus_devinfo *dinfo; 187 struct resource *irq; 188 189 /* Test for RTC support and register clock if it works */ 190 rv = opal_call(OPAL_RTC_READ, vtophys(&junk), vtophys(&junk)); 191 do { 192 rv = opal_call(OPAL_RTC_READ, vtophys(&junk), vtophys(&junk)); 193 if (rv == OPAL_BUSY_EVENT) 194 rv = opal_call(OPAL_POLL_EVENTS, 0); 195 } while (rv == OPAL_BUSY_EVENT); 196 197 if (rv == OPAL_SUCCESS) 198 clock_register(dev, 2000); 199 200 EVENTHANDLER_REGISTER(OPAL_SHUTDOWN, opal_handle_shutdown_message, 201 NULL, EVENTHANDLER_PRI_ANY); 202 EVENTHANDLER_REGISTER(shutdown_final, opal_shutdown, NULL, 203 SHUTDOWN_PRI_LAST); 204 205 OF_getencprop(ofw_bus_get_node(dev), "ibm,heartbeat-ms", 206 &opal_heartbeat_ms, sizeof(opal_heartbeat_ms)); 207 /* Bind to interrupts */ 208 for (i = 0; (irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, 209 RF_ACTIVE)) != NULL; i++) 210 bus_setup_intr(dev, irq, INTR_TYPE_TTY | INTR_MPSAFE | 211 INTR_ENTROPY, NULL, opal_intr, (void *)rman_get_start(irq), 212 NULL); 213 214 OF_getencprop(ofw_bus_get_node(dev), "opal-msg-async-num", 215 &async_count, sizeof(async_count)); 216 opal_init_async_tokens(async_count); 217 218 for (child = OF_child(ofw_bus_get_node(dev)); child != 0; 219 child = OF_peer(child)) { 220 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); 221 if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { 222 free(dinfo, M_DEVBUF); 223 continue; 224 } 225 cdev = device_add_child(dev, NULL, -1); 226 if (cdev == NULL) { 227 device_printf(dev, "<%s>: device_add_child failed\n", 228 dinfo->obd_name); 229 ofw_bus_gen_destroy_devinfo(dinfo); 230 free(dinfo, M_DEVBUF); 231 continue; 232 } 233 device_set_ivars(cdev, dinfo); 234 } 235 236 return (bus_generic_attach(dev)); 237 } 238 239 static int 240 bcd2bin32(int bcd) 241 { 242 int out = 0; 243 244 out += bcd2bin(bcd & 0xff); 245 out += 100*bcd2bin((bcd & 0x0000ff00) >> 8); 246 out += 10000*bcd2bin((bcd & 0x00ff0000) >> 16); 247 out += 1000000*bcd2bin((bcd & 0xffff0000) >> 24); 248 249 return (out); 250 } 251 252 static int 253 bin2bcd32(int bin) 254 { 255 int out = 0; 256 int tmp; 257 258 tmp = bin % 100; 259 out += bin2bcd(tmp) * 1; 260 bin = bin / 100; 261 262 tmp = bin % 100; 263 out += bin2bcd(tmp) * 100; 264 bin = bin / 100; 265 266 tmp = bin % 100; 267 out += bin2bcd(tmp) * 10000; 268 269 return (out); 270 } 271 272 static int 273 opal_gettime(device_t dev, struct timespec *ts) 274 { 275 int rv; 276 struct clocktime ct; 277 uint32_t ymd; 278 uint64_t hmsm; 279 280 rv = opal_call(OPAL_RTC_READ, vtophys(&ymd), vtophys(&hmsm)); 281 while (rv == OPAL_BUSY_EVENT) { 282 opal_call(OPAL_POLL_EVENTS, 0); 283 pause("opalrtc", 1); 284 rv = opal_call(OPAL_RTC_READ, vtophys(&ymd), vtophys(&hmsm)); 285 } 286 287 if (rv != OPAL_SUCCESS) 288 return (ENXIO); 289 290 hmsm = be64toh(hmsm); 291 ymd = be32toh(ymd); 292 293 ct.nsec = bcd2bin32((hmsm & 0x000000ffffff0000) >> 16) * 1000; 294 ct.sec = bcd2bin((hmsm & 0x0000ff0000000000) >> 40); 295 ct.min = bcd2bin((hmsm & 0x00ff000000000000) >> 48); 296 ct.hour = bcd2bin((hmsm & 0xff00000000000000) >> 56); 297 298 ct.day = bcd2bin((ymd & 0x000000ff) >> 0); 299 ct.mon = bcd2bin((ymd & 0x0000ff00) >> 8); 300 ct.year = bcd2bin32((ymd & 0xffff0000) >> 16); 301 302 return (clock_ct_to_ts(&ct, ts)); 303 } 304 305 static int 306 opal_settime(device_t dev, struct timespec *ts) 307 { 308 int rv; 309 struct clocktime ct; 310 uint32_t ymd = 0; 311 uint64_t hmsm = 0; 312 313 clock_ts_to_ct(ts, &ct); 314 315 ymd |= (uint32_t)bin2bcd(ct.day); 316 ymd |= ((uint32_t)bin2bcd(ct.mon) << 8); 317 ymd |= ((uint32_t)bin2bcd32(ct.year) << 16); 318 319 hmsm |= ((uint64_t)bin2bcd32(ct.nsec/1000) << 16); 320 hmsm |= ((uint64_t)bin2bcd(ct.sec) << 40); 321 hmsm |= ((uint64_t)bin2bcd(ct.min) << 48); 322 hmsm |= ((uint64_t)bin2bcd(ct.hour) << 56); 323 324 hmsm = htobe64(hmsm); 325 ymd = htobe32(ymd); 326 327 do { 328 rv = opal_call(OPAL_RTC_WRITE, vtophys(&ymd), vtophys(&hmsm)); 329 if (rv == OPAL_BUSY_EVENT) { 330 rv = opal_call(OPAL_POLL_EVENTS, 0); 331 pause("opalrtc", 1); 332 } 333 } while (rv == OPAL_BUSY_EVENT); 334 335 if (rv != OPAL_SUCCESS) 336 return (ENXIO); 337 338 return (0); 339 } 340 341 static const struct ofw_bus_devinfo * 342 opaldev_get_devinfo(device_t dev, device_t child) 343 { 344 return (device_get_ivars(child)); 345 } 346 347 static void 348 opal_shutdown(void *arg, int howto) 349 { 350 351 if (howto & RB_HALT) 352 opal_call(OPAL_CEC_POWER_DOWN, 0 /* Normal power off */); 353 else 354 opal_call(OPAL_CEC_REBOOT); 355 356 opal_call(OPAL_RETURN_CPU); 357 } 358 359 static void 360 opal_handle_shutdown_message(void *unused, struct opal_msg *msg) 361 { 362 int howto; 363 364 switch (be64toh(msg->params[0])) { 365 case OPAL_SOFT_OFF: 366 howto = RB_POWEROFF; 367 break; 368 case OPAL_SOFT_REBOOT: 369 howto = RB_REROOT; 370 break; 371 } 372 shutdown_nice(howto); 373 } 374 375 static void 376 opal_handle_messages(void) 377 { 378 static struct opal_msg msg; 379 uint64_t rv; 380 uint32_t type; 381 382 rv = opal_call(OPAL_GET_MSG, vtophys(&msg), sizeof(msg)); 383 384 if (rv != OPAL_SUCCESS) 385 return; 386 387 type = be32toh(msg.msg_type); 388 switch (type) { 389 case OPAL_MSG_ASYNC_COMP: 390 EVENTHANDLER_DIRECT_INVOKE(OPAL_ASYNC_COMP, &msg); 391 break; 392 case OPAL_MSG_EPOW: 393 EVENTHANDLER_DIRECT_INVOKE(OPAL_EPOW, &msg); 394 break; 395 case OPAL_MSG_SHUTDOWN: 396 EVENTHANDLER_DIRECT_INVOKE(OPAL_SHUTDOWN, &msg); 397 break; 398 case OPAL_MSG_HMI_EVT: 399 EVENTHANDLER_DIRECT_INVOKE(OPAL_HMI_EVT, &msg); 400 break; 401 case OPAL_MSG_DPO: 402 EVENTHANDLER_DIRECT_INVOKE(OPAL_DPO, &msg); 403 break; 404 case OPAL_MSG_OCC: 405 EVENTHANDLER_DIRECT_INVOKE(OPAL_OCC, &msg); 406 break; 407 default: 408 printf("Unknown OPAL message type %d\n", type); 409 } 410 } 411 412 static void 413 opal_intr(void *xintr) 414 { 415 uint64_t events = 0; 416 417 opal_call(OPAL_HANDLE_INTERRUPT, (uint32_t)(uint64_t)xintr, 418 vtophys(&events)); 419 /* Wake up the heartbeat, if it's been setup. */ 420 if (events != 0 && opal_hb_proc != NULL) 421 wakeup(opal_hb_proc); 422 423 } 424 425