1 /*- 2 * Copyright (c) 2015 Nathan Whitehorn 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/module.h> 33 #include <sys/bus.h> 34 #include <sys/conf.h> 35 #include <sys/clock.h> 36 #include <sys/cpu.h> 37 #include <sys/eventhandler.h> 38 #include <sys/kernel.h> 39 #include <sys/kthread.h> 40 #include <sys/reboot.h> 41 #include <sys/sysctl.h> 42 #include <sys/endian.h> 43 44 #include <vm/vm.h> 45 #include <vm/pmap.h> 46 47 #include <dev/ofw/ofw_bus.h> 48 #include <dev/ofw/ofw_bus_subr.h> 49 #include <dev/ofw/openfirm.h> 50 51 #include "clock_if.h" 52 #include "opal.h" 53 54 static int opaldev_probe(device_t); 55 static int opaldev_attach(device_t); 56 /* clock interface */ 57 static int opal_gettime(device_t dev, struct timespec *ts); 58 static int opal_settime(device_t dev, struct timespec *ts); 59 /* ofw bus interface */ 60 static const struct ofw_bus_devinfo *opaldev_get_devinfo(device_t dev, 61 device_t child); 62 63 static void opal_shutdown(void *arg, int howto); 64 static void opal_handle_shutdown_message(void *unused, 65 struct opal_msg *msg); 66 static void opal_intr(void *); 67 68 static device_method_t opaldev_methods[] = { 69 /* Device interface */ 70 DEVMETHOD(device_probe, opaldev_probe), 71 DEVMETHOD(device_attach, opaldev_attach), 72 73 /* clock interface */ 74 DEVMETHOD(clock_gettime, opal_gettime), 75 DEVMETHOD(clock_settime, opal_settime), 76 77 /* Bus interface */ 78 DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), 79 80 /* ofw_bus interface */ 81 DEVMETHOD(ofw_bus_get_devinfo, opaldev_get_devinfo), 82 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 83 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 84 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 85 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 86 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 87 88 DEVMETHOD_END 89 }; 90 91 static driver_t opaldev_driver = { 92 "opal", 93 opaldev_methods, 94 0 95 }; 96 97 static devclass_t opaldev_devclass; 98 99 EARLY_DRIVER_MODULE(opaldev, ofwbus, opaldev_driver, opaldev_devclass, 0, 0, 100 BUS_PASS_BUS); 101 102 static void opal_heartbeat(void); 103 static void opal_handle_messages(void); 104 105 static struct proc *opal_hb_proc; 106 static struct kproc_desc opal_heartbeat_kp = { 107 "opal_heartbeat", 108 opal_heartbeat, 109 &opal_hb_proc 110 }; 111 112 SYSINIT(opal_heartbeat_setup, SI_SUB_KTHREAD_IDLE, SI_ORDER_ANY, kproc_start, 113 &opal_heartbeat_kp); 114 115 static int opal_heartbeat_ms; 116 EVENTHANDLER_LIST_DEFINE(OPAL_ASYNC_COMP); 117 EVENTHANDLER_LIST_DEFINE(OPAL_EPOW); 118 EVENTHANDLER_LIST_DEFINE(OPAL_SHUTDOWN); 119 EVENTHANDLER_LIST_DEFINE(OPAL_HMI_EVT); 120 EVENTHANDLER_LIST_DEFINE(OPAL_DPO); 121 EVENTHANDLER_LIST_DEFINE(OPAL_OCC); 122 123 #define OPAL_SOFT_OFF 0 124 #define OPAL_SOFT_REBOOT 1 125 126 static void 127 opal_heartbeat(void) 128 { 129 uint64_t events; 130 131 if (opal_heartbeat_ms == 0) 132 kproc_exit(0); 133 134 while (1) { 135 events = 0; 136 /* Turn the OPAL state crank */ 137 opal_call(OPAL_POLL_EVENTS, vtophys(&events)); 138 if (events & OPAL_EVENT_MSG_PENDING) 139 opal_handle_messages(); 140 tsleep(opal_hb_proc, 0, "opal", 141 MSEC_2_TICKS(opal_heartbeat_ms)); 142 } 143 } 144 145 static int 146 opaldev_probe(device_t dev) 147 { 148 phandle_t iparent; 149 pcell_t *irqs; 150 int i, n_irqs; 151 152 if (!ofw_bus_is_compatible(dev, "ibm,opal-v3")) 153 return (ENXIO); 154 if (opal_check() != 0) 155 return (ENXIO); 156 157 device_set_desc(dev, "OPAL Abstraction Firmware"); 158 159 /* Manually add IRQs before attaching */ 160 if (OF_hasprop(ofw_bus_get_node(dev), "opal-interrupts")) { 161 iparent = OF_finddevice("/interrupt-controller@0"); 162 iparent = OF_xref_from_node(iparent); 163 164 n_irqs = OF_getproplen(ofw_bus_get_node(dev), 165 "opal-interrupts") / sizeof(*irqs); 166 irqs = malloc(n_irqs * sizeof(*irqs), M_DEVBUF, M_WAITOK); 167 OF_getencprop(ofw_bus_get_node(dev), "opal-interrupts", irqs, 168 n_irqs * sizeof(*irqs)); 169 for (i = 0; i < n_irqs; i++) 170 bus_set_resource(dev, SYS_RES_IRQ, i, 171 ofw_bus_map_intr(dev, iparent, 1, &irqs[i]), 1); 172 free(irqs, M_DEVBUF); 173 } 174 175 176 return (BUS_PROBE_SPECIFIC); 177 } 178 179 static int 180 opaldev_attach(device_t dev) 181 { 182 phandle_t child; 183 device_t cdev; 184 uint64_t junk; 185 int i, rv; 186 uint32_t async_count; 187 struct ofw_bus_devinfo *dinfo; 188 struct resource *irq; 189 190 /* Test for RTC support and register clock if it works */ 191 rv = opal_call(OPAL_RTC_READ, vtophys(&junk), vtophys(&junk)); 192 do { 193 rv = opal_call(OPAL_RTC_READ, vtophys(&junk), vtophys(&junk)); 194 if (rv == OPAL_BUSY_EVENT) 195 rv = opal_call(OPAL_POLL_EVENTS, 0); 196 } while (rv == OPAL_BUSY_EVENT); 197 198 if (rv == OPAL_SUCCESS) 199 clock_register(dev, 2000); 200 201 EVENTHANDLER_REGISTER(OPAL_SHUTDOWN, opal_handle_shutdown_message, 202 NULL, EVENTHANDLER_PRI_ANY); 203 EVENTHANDLER_REGISTER(shutdown_final, opal_shutdown, NULL, 204 SHUTDOWN_PRI_LAST); 205 206 OF_getencprop(ofw_bus_get_node(dev), "ibm,heartbeat-ms", 207 &opal_heartbeat_ms, sizeof(opal_heartbeat_ms)); 208 /* Bind to interrupts */ 209 for (i = 0; (irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, 210 RF_ACTIVE)) != NULL; i++) 211 bus_setup_intr(dev, irq, INTR_TYPE_TTY | INTR_MPSAFE | 212 INTR_ENTROPY, NULL, opal_intr, (void *)rman_get_start(irq), 213 NULL); 214 215 OF_getencprop(ofw_bus_get_node(dev), "opal-msg-async-num", 216 &async_count, sizeof(async_count)); 217 opal_init_async_tokens(async_count); 218 219 for (child = OF_child(ofw_bus_get_node(dev)); child != 0; 220 child = OF_peer(child)) { 221 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); 222 if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { 223 free(dinfo, M_DEVBUF); 224 continue; 225 } 226 cdev = device_add_child(dev, NULL, -1); 227 if (cdev == NULL) { 228 device_printf(dev, "<%s>: device_add_child failed\n", 229 dinfo->obd_name); 230 ofw_bus_gen_destroy_devinfo(dinfo); 231 free(dinfo, M_DEVBUF); 232 continue; 233 } 234 device_set_ivars(cdev, dinfo); 235 } 236 237 return (bus_generic_attach(dev)); 238 } 239 240 static int 241 bcd2bin32(int bcd) 242 { 243 int out = 0; 244 245 out += bcd2bin(bcd & 0xff); 246 out += 100*bcd2bin((bcd & 0x0000ff00) >> 8); 247 out += 10000*bcd2bin((bcd & 0x00ff0000) >> 16); 248 out += 1000000*bcd2bin((bcd & 0xffff0000) >> 24); 249 250 return (out); 251 } 252 253 static int 254 bin2bcd32(int bin) 255 { 256 int out = 0; 257 int tmp; 258 259 tmp = bin % 100; 260 out += bin2bcd(tmp) * 1; 261 bin = bin / 100; 262 263 tmp = bin % 100; 264 out += bin2bcd(tmp) * 100; 265 bin = bin / 100; 266 267 tmp = bin % 100; 268 out += bin2bcd(tmp) * 10000; 269 270 return (out); 271 } 272 273 static int 274 opal_gettime(device_t dev, struct timespec *ts) 275 { 276 int rv; 277 struct clocktime ct; 278 uint32_t ymd; 279 uint64_t hmsm; 280 281 rv = opal_call(OPAL_RTC_READ, vtophys(&ymd), vtophys(&hmsm)); 282 while (rv == OPAL_BUSY_EVENT) { 283 opal_call(OPAL_POLL_EVENTS, 0); 284 pause("opalrtc", 1); 285 rv = opal_call(OPAL_RTC_READ, vtophys(&ymd), vtophys(&hmsm)); 286 } 287 288 if (rv != OPAL_SUCCESS) 289 return (ENXIO); 290 291 hmsm = be64toh(hmsm); 292 ymd = be32toh(ymd); 293 294 ct.nsec = bcd2bin32((hmsm & 0x000000ffffff0000) >> 16) * 1000; 295 ct.sec = bcd2bin((hmsm & 0x0000ff0000000000) >> 40); 296 ct.min = bcd2bin((hmsm & 0x00ff000000000000) >> 48); 297 ct.hour = bcd2bin((hmsm & 0xff00000000000000) >> 56); 298 299 ct.day = bcd2bin((ymd & 0x000000ff) >> 0); 300 ct.mon = bcd2bin((ymd & 0x0000ff00) >> 8); 301 ct.year = bcd2bin32((ymd & 0xffff0000) >> 16); 302 303 return (clock_ct_to_ts(&ct, ts)); 304 } 305 306 static int 307 opal_settime(device_t dev, struct timespec *ts) 308 { 309 int rv; 310 struct clocktime ct; 311 uint32_t ymd = 0; 312 uint64_t hmsm = 0; 313 314 clock_ts_to_ct(ts, &ct); 315 316 ymd |= (uint32_t)bin2bcd(ct.day); 317 ymd |= ((uint32_t)bin2bcd(ct.mon) << 8); 318 ymd |= ((uint32_t)bin2bcd32(ct.year) << 16); 319 320 hmsm |= ((uint64_t)bin2bcd32(ct.nsec/1000) << 16); 321 hmsm |= ((uint64_t)bin2bcd(ct.sec) << 40); 322 hmsm |= ((uint64_t)bin2bcd(ct.min) << 48); 323 hmsm |= ((uint64_t)bin2bcd(ct.hour) << 56); 324 325 hmsm = htobe64(hmsm); 326 ymd = htobe32(ymd); 327 328 do { 329 rv = opal_call(OPAL_RTC_WRITE, vtophys(&ymd), vtophys(&hmsm)); 330 if (rv == OPAL_BUSY_EVENT) { 331 rv = opal_call(OPAL_POLL_EVENTS, 0); 332 pause("opalrtc", 1); 333 } 334 } while (rv == OPAL_BUSY_EVENT); 335 336 if (rv != OPAL_SUCCESS) 337 return (ENXIO); 338 339 return (0); 340 } 341 342 static const struct ofw_bus_devinfo * 343 opaldev_get_devinfo(device_t dev, device_t child) 344 { 345 return (device_get_ivars(child)); 346 } 347 348 static void 349 opal_shutdown(void *arg, int howto) 350 { 351 352 if (howto & RB_HALT) 353 opal_call(OPAL_CEC_POWER_DOWN, 0 /* Normal power off */); 354 else 355 opal_call(OPAL_CEC_REBOOT); 356 357 opal_call(OPAL_RETURN_CPU); 358 } 359 360 static void 361 opal_handle_shutdown_message(void *unused, struct opal_msg *msg) 362 { 363 int howto; 364 365 switch (be64toh(msg->params[0])) { 366 case OPAL_SOFT_OFF: 367 howto = RB_POWEROFF; 368 break; 369 case OPAL_SOFT_REBOOT: 370 howto = RB_REROOT; 371 break; 372 } 373 shutdown_nice(howto); 374 } 375 376 static void 377 opal_handle_messages(void) 378 { 379 static struct opal_msg msg; 380 uint64_t rv; 381 uint32_t type; 382 383 rv = opal_call(OPAL_GET_MSG, vtophys(&msg), sizeof(msg)); 384 385 if (rv != OPAL_SUCCESS) 386 return; 387 388 type = be32toh(msg.msg_type); 389 switch (type) { 390 case OPAL_MSG_ASYNC_COMP: 391 EVENTHANDLER_DIRECT_INVOKE(OPAL_ASYNC_COMP, &msg); 392 break; 393 case OPAL_MSG_EPOW: 394 EVENTHANDLER_DIRECT_INVOKE(OPAL_EPOW, &msg); 395 break; 396 case OPAL_MSG_SHUTDOWN: 397 EVENTHANDLER_DIRECT_INVOKE(OPAL_SHUTDOWN, &msg); 398 break; 399 case OPAL_MSG_HMI_EVT: 400 EVENTHANDLER_DIRECT_INVOKE(OPAL_HMI_EVT, &msg); 401 break; 402 case OPAL_MSG_DPO: 403 EVENTHANDLER_DIRECT_INVOKE(OPAL_DPO, &msg); 404 break; 405 case OPAL_MSG_OCC: 406 EVENTHANDLER_DIRECT_INVOKE(OPAL_OCC, &msg); 407 break; 408 default: 409 printf("Unknown OPAL message type %d\n", type); 410 } 411 } 412 413 static void 414 opal_intr(void *xintr) 415 { 416 uint64_t events = 0; 417 418 opal_call(OPAL_HANDLE_INTERRUPT, (uint32_t)(uint64_t)xintr, 419 vtophys(&events)); 420 /* Wake up the heartbeat, if it's been setup. */ 421 if (events != 0 && opal_hb_proc != NULL) 422 wakeup(opal_hb_proc); 423 424 } 425 426