1 /*- 2 * Copyright (c) 2015 Nathan Whitehorn 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/module.h> 33 #include <sys/bus.h> 34 #include <sys/conf.h> 35 #include <sys/clock.h> 36 #include <sys/cpu.h> 37 #include <sys/kernel.h> 38 #include <sys/kthread.h> 39 #include <sys/reboot.h> 40 #include <sys/sysctl.h> 41 #include <sys/endian.h> 42 43 #include <vm/vm.h> 44 #include <vm/pmap.h> 45 46 #include <dev/ofw/ofw_bus.h> 47 #include <dev/ofw/ofw_bus_subr.h> 48 #include <dev/ofw/openfirm.h> 49 50 #include "clock_if.h" 51 #include "opal.h" 52 53 static int opaldev_probe(device_t); 54 static int opaldev_attach(device_t); 55 /* clock interface */ 56 static int opal_gettime(device_t dev, struct timespec *ts); 57 static int opal_settime(device_t dev, struct timespec *ts); 58 /* ofw bus interface */ 59 static const struct ofw_bus_devinfo *opaldev_get_devinfo(device_t dev, 60 device_t child); 61 62 static void opal_shutdown(void *arg, int howto); 63 static void opal_handle_shutdown_message(void *unused, 64 struct opal_msg *msg); 65 static void opal_intr(void *); 66 67 static device_method_t opaldev_methods[] = { 68 /* Device interface */ 69 DEVMETHOD(device_probe, opaldev_probe), 70 DEVMETHOD(device_attach, opaldev_attach), 71 72 /* clock interface */ 73 DEVMETHOD(clock_gettime, opal_gettime), 74 DEVMETHOD(clock_settime, opal_settime), 75 76 /* Bus interface */ 77 DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), 78 79 /* ofw_bus interface */ 80 DEVMETHOD(ofw_bus_get_devinfo, opaldev_get_devinfo), 81 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 82 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 83 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 84 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 85 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 86 87 DEVMETHOD_END 88 }; 89 90 static driver_t opaldev_driver = { 91 "opal", 92 opaldev_methods, 93 0 94 }; 95 96 static devclass_t opaldev_devclass; 97 98 DRIVER_MODULE(opaldev, ofwbus, opaldev_driver, opaldev_devclass, 0, 0); 99 100 static void opal_heartbeat(void); 101 static void opal_handle_messages(void); 102 103 static struct proc *opal_hb_proc; 104 static struct kproc_desc opal_heartbeat_kp = { 105 "opal_heartbeat", 106 opal_heartbeat, 107 &opal_hb_proc 108 }; 109 110 SYSINIT(opal_heartbeat_setup, SI_SUB_KTHREAD_IDLE, SI_ORDER_ANY, kproc_start, 111 &opal_heartbeat_kp); 112 113 static int opal_heartbeat_ms; 114 EVENTHANDLER_LIST_DEFINE(OPAL_ASYNC_COMP); 115 EVENTHANDLER_LIST_DEFINE(OPAL_EPOW); 116 EVENTHANDLER_LIST_DEFINE(OPAL_SHUTDOWN); 117 EVENTHANDLER_LIST_DEFINE(OPAL_HMI_EVT); 118 EVENTHANDLER_LIST_DEFINE(OPAL_DPO); 119 EVENTHANDLER_LIST_DEFINE(OPAL_OCC); 120 121 #define OPAL_SOFT_OFF 0 122 #define OPAL_SOFT_REBOOT 1 123 124 static void 125 opal_heartbeat(void) 126 { 127 uint64_t events; 128 129 if (opal_heartbeat_ms == 0) 130 kproc_exit(0); 131 132 while (1) { 133 events = 0; 134 /* Turn the OPAL state crank */ 135 opal_call(OPAL_POLL_EVENTS, vtophys(&events)); 136 if (events & OPAL_EVENT_MSG_PENDING) 137 opal_handle_messages(); 138 tsleep(opal_hb_proc, 0, "opal", 139 MSEC_2_TICKS(opal_heartbeat_ms)); 140 } 141 } 142 143 static int 144 opaldev_probe(device_t dev) 145 { 146 phandle_t iparent; 147 pcell_t *irqs; 148 int i, n_irqs; 149 150 if (!ofw_bus_is_compatible(dev, "ibm,opal-v3")) 151 return (ENXIO); 152 if (opal_check() != 0) 153 return (ENXIO); 154 155 device_set_desc(dev, "OPAL Abstraction Firmware"); 156 157 /* Manually add IRQs before attaching */ 158 if (OF_hasprop(ofw_bus_get_node(dev), "opal-interrupts")) { 159 iparent = OF_finddevice("/interrupt-controller@0"); 160 iparent = OF_xref_from_node(iparent); 161 162 n_irqs = OF_getproplen(ofw_bus_get_node(dev), 163 "opal-interrupts") / sizeof(*irqs); 164 irqs = malloc(n_irqs * sizeof(*irqs), M_DEVBUF, M_WAITOK); 165 OF_getencprop(ofw_bus_get_node(dev), "opal-interrupts", irqs, 166 n_irqs * sizeof(*irqs)); 167 for (i = 0; i < n_irqs; i++) 168 bus_set_resource(dev, SYS_RES_IRQ, i, 169 ofw_bus_map_intr(dev, iparent, 1, &irqs[i]), 1); 170 free(irqs, M_DEVBUF); 171 } 172 173 174 return (BUS_PROBE_SPECIFIC); 175 } 176 177 static int 178 opaldev_attach(device_t dev) 179 { 180 phandle_t child; 181 device_t cdev; 182 uint64_t junk; 183 int i, rv; 184 uint32_t async_count; 185 struct ofw_bus_devinfo *dinfo; 186 struct resource *irq; 187 188 /* Test for RTC support and register clock if it works */ 189 rv = opal_call(OPAL_RTC_READ, vtophys(&junk), vtophys(&junk)); 190 do { 191 rv = opal_call(OPAL_RTC_READ, vtophys(&junk), vtophys(&junk)); 192 if (rv == OPAL_BUSY_EVENT) 193 rv = opal_call(OPAL_POLL_EVENTS, 0); 194 } while (rv == OPAL_BUSY_EVENT); 195 196 if (rv == OPAL_SUCCESS) 197 clock_register(dev, 2000); 198 199 EVENTHANDLER_REGISTER(OPAL_SHUTDOWN, opal_handle_shutdown_message, 200 NULL, EVENTHANDLER_PRI_ANY); 201 EVENTHANDLER_REGISTER(shutdown_final, opal_shutdown, NULL, 202 SHUTDOWN_PRI_LAST); 203 204 OF_getencprop(ofw_bus_get_node(dev), "ibm,heartbeat-ms", 205 &opal_heartbeat_ms, sizeof(opal_heartbeat_ms)); 206 /* Bind to interrupts */ 207 for (i = 0; (irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, 208 RF_ACTIVE)) != NULL; i++) 209 bus_setup_intr(dev, irq, INTR_TYPE_TTY | INTR_MPSAFE | 210 INTR_ENTROPY, NULL, opal_intr, (void *)rman_get_start(irq), 211 NULL); 212 213 OF_getencprop(ofw_bus_get_node(dev), "opal-msg-async-num", 214 &async_count, sizeof(async_count)); 215 opal_init_async_tokens(async_count); 216 217 for (child = OF_child(ofw_bus_get_node(dev)); child != 0; 218 child = OF_peer(child)) { 219 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); 220 if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { 221 free(dinfo, M_DEVBUF); 222 continue; 223 } 224 cdev = device_add_child(dev, NULL, -1); 225 if (cdev == NULL) { 226 device_printf(dev, "<%s>: device_add_child failed\n", 227 dinfo->obd_name); 228 ofw_bus_gen_destroy_devinfo(dinfo); 229 free(dinfo, M_DEVBUF); 230 continue; 231 } 232 device_set_ivars(cdev, dinfo); 233 } 234 235 return (bus_generic_attach(dev)); 236 } 237 238 static int 239 bcd2bin32(int bcd) 240 { 241 int out = 0; 242 243 out += bcd2bin(bcd & 0xff); 244 out += 100*bcd2bin((bcd & 0x0000ff00) >> 8); 245 out += 10000*bcd2bin((bcd & 0x00ff0000) >> 16); 246 out += 1000000*bcd2bin((bcd & 0xffff0000) >> 24); 247 248 return (out); 249 } 250 251 static int 252 bin2bcd32(int bin) 253 { 254 int out = 0; 255 int tmp; 256 257 tmp = bin % 100; 258 out += bin2bcd(tmp) * 1; 259 bin = bin / 100; 260 261 tmp = bin % 100; 262 out += bin2bcd(tmp) * 100; 263 bin = bin / 100; 264 265 tmp = bin % 100; 266 out += bin2bcd(tmp) * 10000; 267 268 return (out); 269 } 270 271 static int 272 opal_gettime(device_t dev, struct timespec *ts) 273 { 274 int rv; 275 struct clocktime ct; 276 uint32_t ymd; 277 uint64_t hmsm; 278 279 rv = opal_call(OPAL_RTC_READ, vtophys(&ymd), vtophys(&hmsm)); 280 while (rv == OPAL_BUSY_EVENT) { 281 opal_call(OPAL_POLL_EVENTS, 0); 282 pause("opalrtc", 1); 283 rv = opal_call(OPAL_RTC_READ, vtophys(&ymd), vtophys(&hmsm)); 284 } 285 286 if (rv != OPAL_SUCCESS) 287 return (ENXIO); 288 289 hmsm = be64toh(hmsm); 290 ymd = be32toh(ymd); 291 292 ct.nsec = bcd2bin32((hmsm & 0x000000ffffff0000) >> 16) * 1000; 293 ct.sec = bcd2bin((hmsm & 0x0000ff0000000000) >> 40); 294 ct.min = bcd2bin((hmsm & 0x00ff000000000000) >> 48); 295 ct.hour = bcd2bin((hmsm & 0xff00000000000000) >> 56); 296 297 ct.day = bcd2bin((ymd & 0x000000ff) >> 0); 298 ct.mon = bcd2bin((ymd & 0x0000ff00) >> 8); 299 ct.year = bcd2bin32((ymd & 0xffff0000) >> 16); 300 301 return (clock_ct_to_ts(&ct, ts)); 302 } 303 304 static int 305 opal_settime(device_t dev, struct timespec *ts) 306 { 307 int rv; 308 struct clocktime ct; 309 uint32_t ymd = 0; 310 uint64_t hmsm = 0; 311 312 clock_ts_to_ct(ts, &ct); 313 314 ymd |= (uint32_t)bin2bcd(ct.day); 315 ymd |= ((uint32_t)bin2bcd(ct.mon) << 8); 316 ymd |= ((uint32_t)bin2bcd32(ct.year) << 16); 317 318 hmsm |= ((uint64_t)bin2bcd32(ct.nsec/1000) << 16); 319 hmsm |= ((uint64_t)bin2bcd(ct.sec) << 40); 320 hmsm |= ((uint64_t)bin2bcd(ct.min) << 48); 321 hmsm |= ((uint64_t)bin2bcd(ct.hour) << 56); 322 323 hmsm = htobe64(hmsm); 324 ymd = htobe32(ymd); 325 326 do { 327 rv = opal_call(OPAL_RTC_WRITE, vtophys(&ymd), vtophys(&hmsm)); 328 if (rv == OPAL_BUSY_EVENT) { 329 rv = opal_call(OPAL_POLL_EVENTS, 0); 330 pause("opalrtc", 1); 331 } 332 } while (rv == OPAL_BUSY_EVENT); 333 334 if (rv != OPAL_SUCCESS) 335 return (ENXIO); 336 337 return (0); 338 } 339 340 static const struct ofw_bus_devinfo * 341 opaldev_get_devinfo(device_t dev, device_t child) 342 { 343 return (device_get_ivars(child)); 344 } 345 346 static void 347 opal_shutdown(void *arg, int howto) 348 { 349 350 if (howto & RB_HALT) 351 opal_call(OPAL_CEC_POWER_DOWN, 0 /* Normal power off */); 352 else 353 opal_call(OPAL_CEC_REBOOT); 354 355 opal_call(OPAL_RETURN_CPU); 356 } 357 358 static void 359 opal_handle_shutdown_message(void *unused, struct opal_msg *msg) 360 { 361 int howto; 362 363 switch (be64toh(msg->params[0])) { 364 case OPAL_SOFT_OFF: 365 howto = RB_POWEROFF; 366 break; 367 case OPAL_SOFT_REBOOT: 368 howto = RB_REROOT; 369 break; 370 } 371 shutdown_nice(howto); 372 } 373 374 static void 375 opal_handle_messages(void) 376 { 377 static struct opal_msg msg; 378 uint64_t rv; 379 uint32_t type; 380 381 rv = opal_call(OPAL_GET_MSG, vtophys(&msg), sizeof(msg)); 382 383 if (rv != OPAL_SUCCESS) 384 return; 385 386 type = be32toh(msg.msg_type); 387 switch (type) { 388 case OPAL_MSG_ASYNC_COMP: 389 EVENTHANDLER_DIRECT_INVOKE(OPAL_ASYNC_COMP, &msg); 390 break; 391 case OPAL_MSG_EPOW: 392 EVENTHANDLER_DIRECT_INVOKE(OPAL_EPOW, &msg); 393 break; 394 case OPAL_MSG_SHUTDOWN: 395 EVENTHANDLER_DIRECT_INVOKE(OPAL_SHUTDOWN, &msg); 396 break; 397 case OPAL_MSG_HMI_EVT: 398 EVENTHANDLER_DIRECT_INVOKE(OPAL_HMI_EVT, &msg); 399 break; 400 case OPAL_MSG_DPO: 401 EVENTHANDLER_DIRECT_INVOKE(OPAL_DPO, &msg); 402 break; 403 case OPAL_MSG_OCC: 404 EVENTHANDLER_DIRECT_INVOKE(OPAL_OCC, &msg); 405 break; 406 default: 407 printf("Unknown OPAL message type %d\n", type); 408 } 409 } 410 411 static void 412 opal_intr(void *xintr) 413 { 414 uint64_t events = 0; 415 416 opal_call(OPAL_HANDLE_INTERRUPT, (uint32_t)(uint64_t)xintr, 417 vtophys(&events)); 418 /* Wake up the heartbeat, if it's been setup. */ 419 if (events != 0 && opal_hb_proc != NULL) 420 wakeup(opal_hb_proc); 421 422 } 423 424