1 /*- 2 * Copyright (c) 2015 Nathan Whitehorn 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 15 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 16 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 17 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 18 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 19 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 20 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 21 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 22 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 23 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 24 * SUCH DAMAGE. 25 */ 26 27 #include <sys/cdefs.h> 28 __FBSDID("$FreeBSD$"); 29 30 #include <sys/param.h> 31 #include <sys/systm.h> 32 #include <sys/module.h> 33 #include <sys/bus.h> 34 #include <sys/conf.h> 35 #include <sys/clock.h> 36 #include <sys/cpu.h> 37 #include <sys/kernel.h> 38 #include <sys/reboot.h> 39 #include <sys/sysctl.h> 40 #include <sys/endian.h> 41 42 #include <vm/vm.h> 43 #include <vm/pmap.h> 44 45 #include <dev/ofw/ofw_bus.h> 46 #include <dev/ofw/ofw_bus_subr.h> 47 #include <dev/ofw/openfirm.h> 48 49 #include "clock_if.h" 50 #include "opal.h" 51 52 static int opaldev_probe(device_t); 53 static int opaldev_attach(device_t); 54 /* clock interface */ 55 static int opal_gettime(device_t dev, struct timespec *ts); 56 static int opal_settime(device_t dev, struct timespec *ts); 57 /* ofw bus interface */ 58 static const struct ofw_bus_devinfo *opaldev_get_devinfo(device_t dev, 59 device_t child); 60 61 static void opal_shutdown(void *arg, int howto); 62 static void opal_intr(void *); 63 64 static device_method_t opaldev_methods[] = { 65 /* Device interface */ 66 DEVMETHOD(device_probe, opaldev_probe), 67 DEVMETHOD(device_attach, opaldev_attach), 68 69 /* clock interface */ 70 DEVMETHOD(clock_gettime, opal_gettime), 71 DEVMETHOD(clock_settime, opal_settime), 72 73 /* Bus interface */ 74 DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), 75 76 /* ofw_bus interface */ 77 DEVMETHOD(ofw_bus_get_devinfo, opaldev_get_devinfo), 78 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 79 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 80 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 81 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 82 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 83 84 DEVMETHOD_END 85 }; 86 87 static driver_t opaldev_driver = { 88 "opal", 89 opaldev_methods, 90 0 91 }; 92 93 static devclass_t opaldev_devclass; 94 95 DRIVER_MODULE(opaldev, ofwbus, opaldev_driver, opaldev_devclass, 0, 0); 96 97 static int 98 opaldev_probe(device_t dev) 99 { 100 phandle_t iparent; 101 pcell_t *irqs; 102 int i, n_irqs; 103 104 if (!ofw_bus_is_compatible(dev, "ibm,opal-v3")) 105 return (ENXIO); 106 if (opal_check() != 0) 107 return (ENXIO); 108 109 device_set_desc(dev, "OPAL Abstraction Firmware"); 110 111 /* Manually add IRQs before attaching */ 112 if (OF_hasprop(ofw_bus_get_node(dev), "opal-interrupts")) { 113 iparent = OF_finddevice("/interrupt-controller@0"); 114 iparent = OF_xref_from_node(iparent); 115 116 n_irqs = OF_getproplen(ofw_bus_get_node(dev), 117 "opal-interrupts") / sizeof(*irqs); 118 irqs = malloc(n_irqs * sizeof(*irqs), M_DEVBUF, M_WAITOK); 119 OF_getencprop(ofw_bus_get_node(dev), "opal-interrupts", irqs, 120 n_irqs * sizeof(*irqs)); 121 for (i = 0; i < n_irqs; i++) 122 bus_set_resource(dev, SYS_RES_IRQ, i, 123 ofw_bus_map_intr(dev, iparent, 1, &irqs[i]), 1); 124 free(irqs, M_DEVBUF); 125 } 126 127 128 return (BUS_PROBE_SPECIFIC); 129 } 130 131 static int 132 opaldev_attach(device_t dev) 133 { 134 phandle_t child; 135 device_t cdev; 136 uint64_t junk; 137 int i, rv; 138 uint32_t async_count; 139 struct ofw_bus_devinfo *dinfo; 140 struct resource *irq; 141 142 /* Test for RTC support and register clock if it works */ 143 rv = opal_call(OPAL_RTC_READ, vtophys(&junk), vtophys(&junk)); 144 do { 145 rv = opal_call(OPAL_RTC_READ, vtophys(&junk), vtophys(&junk)); 146 if (rv == OPAL_BUSY_EVENT) 147 rv = opal_call(OPAL_POLL_EVENTS, 0); 148 } while (rv == OPAL_BUSY_EVENT); 149 150 if (rv == OPAL_SUCCESS) 151 clock_register(dev, 2000); 152 153 EVENTHANDLER_REGISTER(shutdown_final, opal_shutdown, NULL, 154 SHUTDOWN_PRI_LAST); 155 156 /* Bind to interrupts */ 157 for (i = 0; (irq = bus_alloc_resource_any(dev, SYS_RES_IRQ, &i, 158 RF_ACTIVE)) != NULL; i++) 159 bus_setup_intr(dev, irq, INTR_TYPE_TTY | INTR_MPSAFE | 160 INTR_ENTROPY, NULL, opal_intr, (void *)rman_get_start(irq), 161 NULL); 162 163 OF_getencprop(ofw_bus_get_node(dev), "opal-msg-async-num", 164 &async_count, sizeof(async_count)); 165 opal_init_async_tokens(async_count); 166 167 for (child = OF_child(ofw_bus_get_node(dev)); child != 0; 168 child = OF_peer(child)) { 169 dinfo = malloc(sizeof(*dinfo), M_DEVBUF, M_WAITOK | M_ZERO); 170 if (ofw_bus_gen_setup_devinfo(dinfo, child) != 0) { 171 free(dinfo, M_DEVBUF); 172 continue; 173 } 174 cdev = device_add_child(dev, NULL, -1); 175 if (cdev == NULL) { 176 device_printf(dev, "<%s>: device_add_child failed\n", 177 dinfo->obd_name); 178 ofw_bus_gen_destroy_devinfo(dinfo); 179 free(dinfo, M_DEVBUF); 180 continue; 181 } 182 device_set_ivars(cdev, dinfo); 183 } 184 185 return (bus_generic_attach(dev)); 186 } 187 188 static int 189 bcd2bin32(int bcd) 190 { 191 int out = 0; 192 193 out += bcd2bin(bcd & 0xff); 194 out += 100*bcd2bin((bcd & 0x0000ff00) >> 8); 195 out += 10000*bcd2bin((bcd & 0x00ff0000) >> 16); 196 out += 1000000*bcd2bin((bcd & 0xffff0000) >> 24); 197 198 return (out); 199 } 200 201 static int 202 bin2bcd32(int bin) 203 { 204 int out = 0; 205 int tmp; 206 207 tmp = bin % 100; 208 out += bin2bcd(tmp) * 1; 209 bin = bin / 100; 210 211 tmp = bin % 100; 212 out += bin2bcd(tmp) * 100; 213 bin = bin / 100; 214 215 tmp = bin % 100; 216 out += bin2bcd(tmp) * 10000; 217 218 return (out); 219 } 220 221 static int 222 opal_gettime(device_t dev, struct timespec *ts) 223 { 224 int rv; 225 struct clocktime ct; 226 uint32_t ymd; 227 uint64_t hmsm; 228 229 rv = opal_call(OPAL_RTC_READ, vtophys(&ymd), vtophys(&hmsm)); 230 while (rv == OPAL_BUSY_EVENT) { 231 opal_call(OPAL_POLL_EVENTS, 0); 232 pause("opalrtc", 1); 233 rv = opal_call(OPAL_RTC_READ, vtophys(&ymd), vtophys(&hmsm)); 234 } 235 236 if (rv != OPAL_SUCCESS) 237 return (ENXIO); 238 239 hmsm = be64toh(hmsm); 240 ymd = be32toh(ymd); 241 242 ct.nsec = bcd2bin32((hmsm & 0x000000ffffff0000) >> 16) * 1000; 243 ct.sec = bcd2bin((hmsm & 0x0000ff0000000000) >> 40); 244 ct.min = bcd2bin((hmsm & 0x00ff000000000000) >> 48); 245 ct.hour = bcd2bin((hmsm & 0xff00000000000000) >> 56); 246 247 ct.day = bcd2bin((ymd & 0x000000ff) >> 0); 248 ct.mon = bcd2bin((ymd & 0x0000ff00) >> 8); 249 ct.year = bcd2bin32((ymd & 0xffff0000) >> 16); 250 251 return (clock_ct_to_ts(&ct, ts)); 252 } 253 254 static int 255 opal_settime(device_t dev, struct timespec *ts) 256 { 257 int rv; 258 struct clocktime ct; 259 uint32_t ymd = 0; 260 uint64_t hmsm = 0; 261 262 clock_ts_to_ct(ts, &ct); 263 264 ymd |= (uint32_t)bin2bcd(ct.day); 265 ymd |= ((uint32_t)bin2bcd(ct.mon) << 8); 266 ymd |= ((uint32_t)bin2bcd32(ct.year) << 16); 267 268 hmsm |= ((uint64_t)bin2bcd32(ct.nsec/1000) << 16); 269 hmsm |= ((uint64_t)bin2bcd(ct.sec) << 40); 270 hmsm |= ((uint64_t)bin2bcd(ct.min) << 48); 271 hmsm |= ((uint64_t)bin2bcd(ct.hour) << 56); 272 273 hmsm = htobe64(hmsm); 274 ymd = htobe32(ymd); 275 276 do { 277 rv = opal_call(OPAL_RTC_WRITE, vtophys(&ymd), vtophys(&hmsm)); 278 if (rv == OPAL_BUSY_EVENT) { 279 rv = opal_call(OPAL_POLL_EVENTS, 0); 280 pause("opalrtc", 1); 281 } 282 } while (rv == OPAL_BUSY_EVENT); 283 284 if (rv != OPAL_SUCCESS) 285 return (ENXIO); 286 287 return (0); 288 } 289 290 static const struct ofw_bus_devinfo * 291 opaldev_get_devinfo(device_t dev, device_t child) 292 { 293 return (device_get_ivars(child)); 294 } 295 296 static void 297 opal_shutdown(void *arg, int howto) 298 { 299 300 if (howto & RB_HALT) 301 opal_call(OPAL_CEC_POWER_DOWN, 0 /* Normal power off */); 302 else 303 opal_call(OPAL_CEC_REBOOT); 304 305 opal_call(OPAL_RETURN_CPU); 306 } 307 308 static void 309 opal_intr(void *xintr) 310 { 311 uint64_t events = 0; 312 313 opal_call(OPAL_HANDLE_INTERRUPT, (uint32_t)(uint64_t)xintr, 314 vtophys(&events)); 315 /* XXX: do something useful with this information */ 316 317 } 318 319