1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 3 * 4 * Copyright (C) 2002 Benno Rice. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 21 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 22 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 #ifndef _POWERPC_POWERMAC_UNINORTHVAR_H_ 31 #define _POWERPC_POWERMAC_UNINORTHVAR_H_ 32 33 #include <dev/ofw/ofw_bus_subr.h> 34 #include <dev/ofw/ofw_pci.h> 35 #include <dev/ofw/ofwpci.h> 36 37 struct uninorth_softc { 38 struct ofw_pci_softc pci_sc; 39 vm_offset_t sc_addr; 40 vm_offset_t sc_data; 41 int sc_ver; 42 int sc_skipslot; 43 struct mtx sc_cfg_mtx; 44 }; 45 46 struct unin_chip_softc { 47 uint64_t sc_physaddr; 48 uint64_t sc_size; 49 vm_offset_t sc_addr; 50 struct rman sc_mem_rman; 51 int sc_version; 52 }; 53 54 /* 55 * Format of a unin reg property entry. 56 */ 57 struct unin_chip_reg { 58 u_int32_t mr_base; 59 u_int32_t mr_size; 60 }; 61 62 /* 63 * Per unin device structure. 64 */ 65 struct unin_chip_devinfo { 66 int udi_interrupts[6]; 67 int udi_ninterrupts; 68 int udi_base; 69 struct ofw_bus_devinfo udi_obdinfo; 70 struct resource_list udi_resources; 71 }; 72 73 /* 74 * Version register 75 */ 76 #define UNIN_VERS 0x0 77 78 /* 79 * Clock-control register 80 */ 81 #define UNIN_CLOCKCNTL 0x20 82 #define UNIN_CLOCKCNTL_GMAC 0x2 83 84 /* 85 * Power management register 86 */ 87 #define UNIN_PWR_MGMT 0x30 88 #define UNIN_PWR_NORMAL 0x00 89 #define UNIN_PWR_IDLE2 0x01 90 #define UNIN_PWR_SLEEP 0x02 91 #define UNIN_PWR_SAVE 0x03 92 #define UNIN_PWR_MASK 0x03 93 94 /* 95 * Hardware initialization state register 96 */ 97 #define UNIN_HWINIT_STATE 0x70 98 #define UNIN_SLEEPING 0x01 99 #define UNIN_RUNNING 0x02 100 101 /* 102 * Toggle registers 103 */ 104 #define UNIN_TOGGLE_REG 0xe0 105 #define UNIN_MPIC_RESET 0x2 106 #define UNIN_MPIC_OUTPUT_ENABLE 0x4 107 108 extern int unin_chip_sleep(device_t dev, int idle); 109 extern int unin_chip_wake(device_t dev); 110 #endif /* _POWERPC_POWERMAC_UNINORTHVAR_H_ */ 111