xref: /freebsd/sys/powerpc/powermac/uninorthvar.h (revision 97cb52fa9aefd90fad38790fded50905aeeb9b9e)
1 /*-
2  * SPDX-License-Identifier: BSD-2-Clause-FreeBSD
3  *
4  * Copyright (C) 2002 Benno Rice.
5  * All rights reserved.
6  *
7  * Redistribution and use in source and binary forms, with or without
8  * modification, are permitted provided that the following conditions
9  * are met:
10  * 1. Redistributions of source code must retain the above copyright
11  *    notice, this list of conditions and the following disclaimer.
12  * 2. Redistributions in binary form must reproduce the above copyright
13  *    notice, this list of conditions and the following disclaimer in the
14  *    documentation and/or other materials provided with the distribution.
15  *
16  * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
19  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
20  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
21  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
22  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
23  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
24  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
25  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
26  *
27  * $FreeBSD$
28  */
29 
30 #ifndef	_POWERPC_POWERMAC_UNINORTHVAR_H_
31 #define	_POWERPC_POWERMAC_UNINORTHVAR_H_
32 
33 #include <dev/ofw/ofw_bus_subr.h>
34 #include <dev/ofw/ofw_pci.h>
35 #include <dev/ofw/ofwpci.h>
36 
37 struct uninorth_softc {
38 	struct ofw_pci_softc	pci_sc;
39 	vm_offset_t		sc_addr;
40 	vm_offset_t		sc_data;
41 	int			sc_ver;
42 };
43 
44 struct unin_chip_softc {
45 	uint64_t		sc_physaddr;
46 	uint64_t		sc_size;
47 	vm_offset_t		sc_addr;
48 	struct rman  		sc_mem_rman;
49 	int			sc_version;
50 };
51 
52 /*
53  * Format of a unin reg property entry.
54  */
55 struct unin_chip_reg {
56         u_int32_t       mr_base;
57         u_int32_t       mr_size;
58 };
59 
60 /*
61  * Per unin device structure.
62  */
63 struct unin_chip_devinfo {
64         int        udi_interrupts[6];
65         int        udi_ninterrupts;
66         int        udi_base;
67         struct ofw_bus_devinfo udi_obdinfo;
68         struct resource_list udi_resources;
69 };
70 
71 /*
72  * Version register
73  */
74 #define UNIN_VERS       0x0
75 
76 /*
77  * Clock-control register
78  */
79 #define UNIN_CLOCKCNTL		0x20
80 #define UNIN_CLOCKCNTL_GMAC	0x2
81 
82 /*
83  * Power management register
84  */
85 #define UNIN_PWR_MGMT		0x30
86 #define UNIN_PWR_NORMAL		0x00
87 #define UNIN_PWR_IDLE2		0x01
88 #define UNIN_PWR_SLEEP		0x02
89 #define UNIN_PWR_SAVE		0x03
90 #define UNIN_PWR_MASK		0x03
91 
92 /*
93  * Hardware initialization state register
94  */
95 #define UNIN_HWINIT_STATE	0x70
96 #define UNIN_SLEEPING		0x01
97 #define UNIN_RUNNING		0x02
98 
99 
100 /*
101  * Toggle registers
102  */
103 #define UNIN_TOGGLE_REG		0xe0
104 #define UNIN_MPIC_RESET		0x2
105 #define UNIN_MPIC_OUTPUT_ENABLE	0x4
106 
107 extern int unin_chip_sleep(device_t dev, int idle);
108 extern int unin_chip_wake(device_t dev);
109 #endif  /* _POWERPC_POWERMAC_UNINORTHVAR_H_ */
110