xref: /freebsd/sys/powerpc/powermac/uninorth.c (revision a9148abd9da5db2f1c682fb17bed791845fc41c9) 
1 /*-
2  * Copyright (C) 2002 Benno Rice.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
18  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
19  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
20  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
21  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
22  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
23  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24  *
25  * $FreeBSD$
26  */
27 
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/module.h>
31 #include <sys/bus.h>
32 #include <sys/conf.h>
33 #include <sys/kernel.h>
34 
35 #include <dev/ofw/openfirm.h>
36 #include <dev/ofw/ofw_pci.h>
37 #include <dev/ofw/ofw_bus.h>
38 
39 #include <dev/pci/pcivar.h>
40 #include <dev/pci/pcireg.h>
41 
42 #include <machine/bus.h>
43 #include <machine/md_var.h>
44 #include <machine/pio.h>
45 #include <machine/resource.h>
46 
47 #include <sys/rman.h>
48 
49 #include <powerpc/powermac/uninorthvar.h>
50 
51 #include <vm/vm.h>
52 #include <vm/pmap.h>
53 
54 #include "pcib_if.h"
55 
56 #define	UNINORTH_DEBUG	0
57 
58 /*
59  * Device interface.
60  */
61 static int		uninorth_probe(device_t);
62 static int		uninorth_attach(device_t);
63 
64 /*
65  * Bus interface.
66  */
67 static int		uninorth_read_ivar(device_t, device_t, int,
68 			    uintptr_t *);
69 static struct		resource * uninorth_alloc_resource(device_t bus,
70 			    device_t child, int type, int *rid, u_long start,
71 			    u_long end, u_long count, u_int flags);
72 static int		uninorth_activate_resource(device_t bus, device_t child,
73 			    int type, int rid, struct resource *res);
74 
75 /*
76  * pcib interface.
77  */
78 static int		uninorth_maxslots(device_t);
79 static u_int32_t	uninorth_read_config(device_t, u_int, u_int, u_int,
80 			    u_int, int);
81 static void		uninorth_write_config(device_t, u_int, u_int, u_int,
82 			    u_int, u_int32_t, int);
83 static int		uninorth_route_interrupt(device_t, device_t, int);
84 
85 /*
86  * OFW Bus interface
87  */
88 
89 static phandle_t	 uninorth_get_node(device_t bus, device_t dev);
90 
91 /*
92  * Local routines.
93  */
94 static int		uninorth_enable_config(struct uninorth_softc *, u_int,
95 			    u_int, u_int, u_int);
96 static void		unin_enable_gmac(void);
97 
98 /*
99  * Driver methods.
100  */
101 static device_method_t	uninorth_methods[] = {
102 	/* Device interface */
103 	DEVMETHOD(device_probe,		uninorth_probe),
104 	DEVMETHOD(device_attach,	uninorth_attach),
105 
106 	/* Bus interface */
107 	DEVMETHOD(bus_print_child,	bus_generic_print_child),
108 	DEVMETHOD(bus_read_ivar,	uninorth_read_ivar),
109 	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
110 	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
111 	DEVMETHOD(bus_alloc_resource,	uninorth_alloc_resource),
112 	DEVMETHOD(bus_activate_resource,	uninorth_activate_resource),
113 
114 	/* pcib interface */
115 	DEVMETHOD(pcib_maxslots,	uninorth_maxslots),
116 	DEVMETHOD(pcib_read_config,	uninorth_read_config),
117 	DEVMETHOD(pcib_write_config,	uninorth_write_config),
118 	DEVMETHOD(pcib_route_interrupt,	uninorth_route_interrupt),
119 
120 	/* ofw_bus interface */
121 	DEVMETHOD(ofw_bus_get_node,     uninorth_get_node),
122 
123 	{ 0, 0 }
124 };
125 
126 static driver_t	uninorth_driver = {
127 	"pcib",
128 	uninorth_methods,
129 	sizeof(struct uninorth_softc)
130 };
131 
132 static devclass_t	uninorth_devclass;
133 
134 DRIVER_MODULE(uninorth, nexus, uninorth_driver, uninorth_devclass, 0, 0);
135 
136 static int
137 uninorth_probe(device_t dev)
138 {
139 	const char	*type, *compatible;
140 
141 	type = ofw_bus_get_type(dev);
142 	compatible = ofw_bus_get_compat(dev);
143 
144 	if (type == NULL || compatible == NULL)
145 		return (ENXIO);
146 
147 	if (strcmp(type, "pci") != 0)
148 		return (ENXIO);
149 
150 	if (strcmp(compatible, "uni-north") == 0) {
151 		device_set_desc(dev, "Apple UniNorth Host-PCI bridge");
152 		return (0);
153 	} else if (strcmp(compatible,"u3-agp") == 0) {
154 		device_set_desc(dev, "Apple U3 Host-AGP bridge");
155 		return (0);
156 	}
157 
158 	return (ENXIO);
159 }
160 
161 static int
162 uninorth_attach(device_t dev)
163 {
164 	struct		uninorth_softc *sc;
165 	const char	*compatible;
166 	phandle_t	node;
167 	phandle_t	child;
168 	u_int32_t	reg[2], busrange[2];
169 	struct		uninorth_range *rp, *io, *mem[2];
170 	int		nmem, i, error;
171 
172 	node = ofw_bus_get_node(dev);
173 	sc = device_get_softc(dev);
174 
175 	if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8)
176 		return (ENXIO);
177 
178 	if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8)
179 		return (ENXIO);
180 
181 	sc->sc_u3 = 0;
182 	compatible = ofw_bus_get_compat(dev);
183 	if (strcmp(compatible,"u3-agp") == 0)
184 		sc->sc_u3 = 1;
185 
186 	sc->sc_dev = dev;
187 	sc->sc_node = node;
188 	if (sc->sc_u3) {
189 	   sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[1] + 0x800000, PAGE_SIZE);
190 	   sc->sc_data = (vm_offset_t)pmap_mapdev(reg[1] + 0xc00000, PAGE_SIZE);
191 	} else {
192 	   sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[0] + 0x800000, PAGE_SIZE);
193 	   sc->sc_data = (vm_offset_t)pmap_mapdev(reg[0] + 0xc00000, PAGE_SIZE);
194 	}
195 	sc->sc_bus = busrange[0];
196 
197 	bzero(sc->sc_range, sizeof(sc->sc_range));
198 	if (sc->sc_u3) {
199 		/*
200 		 * On Apple U3 systems, we have an otherwise standard
201 		 * Uninorth controller driving AGP. The one difference
202 		 * is that it uses a new PCI ranges format, so do the
203 		 * translation.
204 		 */
205 
206 		struct uninorth_range64 range64[6];
207 		bzero(range64, sizeof(range64));
208 
209 		sc->sc_nrange = OF_getprop(node, "ranges", range64,
210 		    sizeof(range64));
211 		for (i = 0; range64[i].pci_hi != 0; i++) {
212 			sc->sc_range[i].pci_hi = range64[i].pci_hi;
213 			sc->sc_range[i].pci_mid = range64[i].pci_mid;
214 			sc->sc_range[i].pci_lo = range64[i].pci_lo;
215 			sc->sc_range[i].host = range64[i].host_lo;
216 			sc->sc_range[i].size_hi = range64[i].size_hi;
217 			sc->sc_range[i].size_lo = range64[i].size_lo;
218 		}
219 	} else {
220 		sc->sc_nrange = OF_getprop(node, "ranges", sc->sc_range,
221 		    sizeof(sc->sc_range));
222 	}
223 
224 	if (sc->sc_nrange == -1) {
225 		device_printf(dev, "could not get ranges\n");
226 		return (ENXIO);
227 	}
228 
229 	sc->sc_range[6].pci_hi = 0;
230 	io = NULL;
231 	nmem = 0;
232 
233 	for (rp = sc->sc_range; rp->pci_hi != 0; rp++) {
234 		switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
235 		case OFW_PCI_PHYS_HI_SPACE_CONFIG:
236 			break;
237 		case OFW_PCI_PHYS_HI_SPACE_IO:
238 			io = rp;
239 			break;
240 		case OFW_PCI_PHYS_HI_SPACE_MEM32:
241 			mem[nmem] = rp;
242 			nmem++;
243 			break;
244 		case OFW_PCI_PHYS_HI_SPACE_MEM64:
245 			break;
246 		}
247 	}
248 
249 	if (io == NULL) {
250 		device_printf(dev, "can't find io range\n");
251 		return (ENXIO);
252 	}
253 	sc->sc_io_rman.rm_type = RMAN_ARRAY;
254 	sc->sc_io_rman.rm_descr = "UniNorth PCI I/O Ports";
255 	sc->sc_iostart = io->host;
256 	if (rman_init(&sc->sc_io_rman) != 0 ||
257 	    rman_manage_region(&sc->sc_io_rman, io->pci_lo,
258 	    io->pci_lo + io->size_lo - 1) != 0) {
259 		panic("uninorth_attach: failed to set up I/O rman");
260 	}
261 
262 	if (nmem == 0) {
263 		device_printf(dev, "can't find mem ranges\n");
264 		return (ENXIO);
265 	}
266 	sc->sc_mem_rman.rm_type = RMAN_ARRAY;
267 	sc->sc_mem_rman.rm_descr = "UniNorth PCI Memory";
268 	error = rman_init(&sc->sc_mem_rman);
269 	if (error) {
270 		device_printf(dev, "rman_init() failed. error = %d\n", error);
271 		return (error);
272 	}
273 	for (i = 0; i < nmem; i++) {
274 		error = rman_manage_region(&sc->sc_mem_rman, mem[i]->pci_lo,
275 		    mem[i]->pci_lo + mem[i]->size_lo - 1);
276 		if (error) {
277 			device_printf(dev,
278 			    "rman_manage_region() failed. error = %d\n", error);
279 			return (error);
280 		}
281 	}
282 
283 	/*
284 	 * Enable the GMAC Ethernet cell if Open Firmware says it is
285 	 * used.
286 	 */
287 	for (child = OF_child(node); child; child = OF_peer(child)) {
288 		char compat[32];
289 
290 		memset(compat, 0, sizeof(compat));
291 		OF_getprop(child, "compatible", compat, sizeof(compat));
292 		if (strcmp(compat, "gmac") == 0) {
293 			unin_enable_gmac();
294 		}
295 	}
296 
297 	device_add_child(dev, "pci", device_get_unit(dev));
298 	return (bus_generic_attach(dev));
299 }
300 
301 static int
302 uninorth_maxslots(device_t dev)
303 {
304 
305 	return (PCI_SLOTMAX);
306 }
307 
308 static u_int32_t
309 uninorth_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
310     int width)
311 {
312 	struct		uninorth_softc *sc;
313 	vm_offset_t	caoff;
314 
315 	sc = device_get_softc(dev);
316 	caoff = sc->sc_data + (reg & 0x07);
317 
318 	if (uninorth_enable_config(sc, bus, slot, func, reg) != 0) {
319 		switch (width) {
320 		case 1:
321 			return (in8rb(caoff));
322 			break;
323 		case 2:
324 			return (in16rb(caoff));
325 			break;
326 		case 4:
327 			return (in32rb(caoff));
328 			break;
329 		}
330 	}
331 
332 	return (0xffffffff);
333 }
334 
335 static void
336 uninorth_write_config(device_t dev, u_int bus, u_int slot, u_int func,
337     u_int reg, u_int32_t val, int width)
338 {
339 	struct		uninorth_softc *sc;
340 	vm_offset_t	caoff;
341 
342 	sc = device_get_softc(dev);
343 	caoff = sc->sc_data + (reg & 0x07);
344 
345 	if (uninorth_enable_config(sc, bus, slot, func, reg)) {
346 		switch (width) {
347 		case 1:
348 			out8rb(caoff, val);
349 			break;
350 		case 2:
351 			out16rb(caoff, val);
352 			break;
353 		case 4:
354 			out32rb(caoff, val);
355 			break;
356 		}
357 	}
358 }
359 
360 static int
361 uninorth_route_interrupt(device_t bus, device_t dev, int pin)
362 {
363 
364 	return (0);
365 }
366 
367 static int
368 uninorth_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
369 {
370 	struct	uninorth_softc *sc;
371 
372 	sc = device_get_softc(dev);
373 
374 	switch (which) {
375 	case PCIB_IVAR_DOMAIN:
376 		*result = device_get_unit(dev);
377 		return (0);
378 	case PCIB_IVAR_BUS:
379 		*result = sc->sc_bus;
380 		return (0);
381 	}
382 
383 	return (ENOENT);
384 }
385 
386 static struct resource *
387 uninorth_alloc_resource(device_t bus, device_t child, int type, int *rid,
388     u_long start, u_long end, u_long count, u_int flags)
389 {
390 	struct			uninorth_softc *sc;
391 	struct			resource *rv;
392 	struct			rman *rm;
393 	int			needactivate;
394 
395 	needactivate = flags & RF_ACTIVE;
396 	flags &= ~RF_ACTIVE;
397 
398 	sc = device_get_softc(bus);
399 
400 	switch (type) {
401 	case SYS_RES_MEMORY:
402 		rm = &sc->sc_mem_rman;
403 		break;
404 
405 	case SYS_RES_IOPORT:
406 		rm = &sc->sc_io_rman;
407 		break;
408 
409 	case SYS_RES_IRQ:
410 		return (bus_alloc_resource(bus, type, rid, start, end, count,
411 		    flags));
412 
413 	default:
414 		device_printf(bus, "unknown resource request from %s\n",
415 		    device_get_nameunit(child));
416 		return (NULL);
417 	}
418 
419 	rv = rman_reserve_resource(rm, start, end, count, flags, child);
420 	if (rv == NULL) {
421 		device_printf(bus, "failed to reserve resource for %s\n",
422 		    device_get_nameunit(child));
423 		return (NULL);
424 	}
425 
426 	rman_set_rid(rv, *rid);
427 
428 	if (needactivate) {
429 		if (bus_activate_resource(child, type, *rid, rv) != 0) {
430 			device_printf(bus,
431 			    "failed to activate resource for %s\n",
432 			    device_get_nameunit(child));
433 			rman_release_resource(rv);
434 			return (NULL);
435 		}
436 	}
437 
438 	return (rv);
439 }
440 
441 static int
442 uninorth_activate_resource(device_t bus, device_t child, int type, int rid,
443     struct resource *res)
444 {
445 	void	*p;
446 	struct	uninorth_softc *sc;
447 
448 	sc = device_get_softc(bus);
449 
450 	if (type == SYS_RES_IRQ)
451 		return (bus_activate_resource(bus, type, rid, res));
452 
453 	if (type == SYS_RES_MEMORY || type == SYS_RES_IOPORT) {
454 		vm_offset_t start;
455 
456 		start = (vm_offset_t)rman_get_start(res);
457 		/*
458 		 * For i/o-ports, convert the start address to the
459 		 * uninorth PCI i/o window
460 		 */
461 		if (type == SYS_RES_IOPORT)
462 			start += sc->sc_iostart;
463 
464 		if (bootverbose)
465 			printf("uninorth mapdev: start %x, len %ld\n", start,
466 			    rman_get_size(res));
467 
468 		p = pmap_mapdev(start, (vm_size_t)rman_get_size(res));
469 		if (p == NULL)
470 			return (ENOMEM);
471 		rman_set_virtual(res, p);
472 		rman_set_bustag(res, &bs_le_tag);
473 		rman_set_bushandle(res, (u_long)p);
474 	}
475 
476 	return (rman_activate_resource(res));
477 }
478 
479 static int
480 uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot,
481     u_int func, u_int reg)
482 {
483 	uint32_t	cfgval;
484 	uint32_t	pass;
485 
486 	if (resource_int_value(device_get_name(sc->sc_dev),
487 	        device_get_unit(sc->sc_dev), "skipslot", &pass) == 0) {
488 		if (pass == slot)
489 			return (0);
490 	}
491 
492 	if (sc->sc_bus == bus) {
493 		/*
494 		 * No slots less than 11 on the primary bus
495 		 */
496 		if (slot < 11)
497 			return (0);
498 
499 		cfgval = (1 << slot) | (func << 8) | (reg & 0xfc);
500 	} else {
501 		cfgval = (bus << 16) | (slot << 11) | (func << 8) |
502 		    (reg & 0xfc) | 1;
503 	}
504 
505 	do {
506 		out32rb(sc->sc_addr, cfgval);
507 	} while (in32rb(sc->sc_addr) != cfgval);
508 
509 	return (1);
510 }
511 
512 static phandle_t
513 uninorth_get_node(device_t bus, device_t dev)
514 {
515 	struct uninorth_softc *sc;
516 
517 	sc = device_get_softc(bus);
518 	/* We only have one child, the PCI bus, which needs our own node. */
519 
520 	return sc->sc_node;
521 }
522 
523 /*
524  * Driver to swallow UniNorth host bridges from the PCI bus side.
525  */
526 static int
527 unhb_probe(device_t dev)
528 {
529 
530 	if (pci_get_class(dev) == PCIC_BRIDGE &&
531 	    pci_get_subclass(dev) == PCIS_BRIDGE_HOST) {
532 		device_set_desc(dev, "Host to PCI bridge");
533 		device_quiet(dev);
534 		return (-10000);
535 	}
536 
537 	return (ENXIO);
538 }
539 
540 static int
541 unhb_attach(device_t dev)
542 {
543 
544 	return (0);
545 }
546 
547 static device_method_t unhb_methods[] = {
548 	/* Device interface */
549 	DEVMETHOD(device_probe,         unhb_probe),
550 	DEVMETHOD(device_attach,        unhb_attach),
551 
552 	{ 0, 0 }
553 };
554 
555 static driver_t unhb_driver = {
556 	"unhb",
557 	unhb_methods,
558 	1,
559 };
560 static devclass_t unhb_devclass;
561 
562 DRIVER_MODULE(unhb, pci, unhb_driver, unhb_devclass, 0, 0);
563 
564 
565 /*
566  * Small stub driver for the Uninorth chip itself, to allow setting
567  * of various parameters and cell enables
568  */
569 static struct unin_chip_softc *uncsc;
570 
571 static void
572 unin_enable_gmac(void)
573 {
574 	volatile u_int *clkreg;
575 	u_int32_t tmpl;
576 
577 	if (uncsc == NULL)
578 		panic("unin_enable_gmac: device not found");
579 
580 	clkreg = (void *)(uncsc->sc_addr + UNIN_CLOCKCNTL);
581 	tmpl = inl(clkreg);
582 	tmpl |= UNIN_CLOCKCNTL_GMAC;
583 	outl(clkreg, tmpl);
584 }
585 
586 static int
587 unin_chip_probe(device_t dev)
588 {
589 	const char	*name;
590 
591 	name = ofw_bus_get_name(dev);
592 
593 	if (name == NULL)
594 		return (ENXIO);
595 
596 	if (strcmp(name, "uni-n") != 0)
597 		return (ENXIO);
598 
599 	device_set_desc(dev, "Apple UniNorth System Controller");
600 	return (0);
601 }
602 
603 static int
604 unin_chip_attach(device_t dev)
605 {
606 	phandle_t node;
607 	u_int reg[2];
608 
609 	uncsc = device_get_softc(dev);
610 	node = ofw_bus_get_node(dev);
611 
612 	if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8)
613 		return (ENXIO);
614 
615 	uncsc->sc_physaddr = reg[0];
616 	uncsc->sc_size = reg[1];
617 
618 	/*
619 	 * Only map the first page, since that is where the registers
620 	 * of interest lie.
621 	 */
622 	uncsc->sc_addr = (vm_offset_t) pmap_mapdev(reg[0], PAGE_SIZE);
623 
624 	uncsc->sc_version = *(u_int *)uncsc->sc_addr;
625 	device_printf(dev, "Version %d\n", uncsc->sc_version);
626 
627 	return (0);
628 }
629 
630 static device_method_t unin_chip_methods[] = {
631 	/* Device interface */
632 	DEVMETHOD(device_probe,         unin_chip_probe),
633 	DEVMETHOD(device_attach,        unin_chip_attach),
634 
635 	{ 0, 0 }
636 };
637 
638 static driver_t	unin_chip_driver = {
639 	"unin",
640 	unin_chip_methods,
641 	sizeof(struct unin_chip_softc)
642 };
643 
644 static devclass_t	unin_chip_devclass;
645 
646 DRIVER_MODULE(unin, nexus, unin_chip_driver, unin_chip_devclass, 0, 0);
647 
648 
649 
650 
651