xref: /freebsd/sys/powerpc/powermac/uninorth.c (revision 98f8e6c0994e851cd0a5e28e12f7e82c1ad034d4) 
1 /*
2  * Copyright (C) 2002 Benno Rice.
3  * All rights reserved.
4  *
5  * Redistribution and use in source and binary forms, with or without
6  * modification, are permitted provided that the following conditions
7  * are met:
8  * 1. Redistributions of source code must retain the above copyright
9  *    notice, this list of conditions and the following disclaimer.
10  * 2. Redistributions in binary form must reproduce the above copyright
11  *    notice, this list of conditions and the following disclaimer in the
12  *    documentation and/or other materials provided with the distribution.
13  *
14  * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR
15  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
16  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
17  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
18  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
19  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
20  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
21  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
22  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
23  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
24  *
25  * $FreeBSD$
26  */
27 
28 #include <sys/param.h>
29 #include <sys/systm.h>
30 #include <sys/bus.h>
31 #include <sys/conf.h>
32 #include <sys/kernel.h>
33 
34 #include <dev/ofw/openfirm.h>
35 #include <dev/ofw/ofw_bus.h>
36 #include <dev/ofw/ofw_pci.h>
37 
38 #include <dev/pci/pcivar.h>
39 #include <dev/pci/pcireg.h>
40 
41 #include <machine/bus.h>
42 #include <machine/md_var.h>
43 #include <machine/nexusvar.h>
44 #include <machine/resource.h>
45 
46 #include <sys/rman.h>
47 
48 #include <powerpc/ofw/ofw_pci.h>
49 #include <powerpc/powermac/uninorthvar.h>
50 
51 #include <vm/vm.h>
52 #include <vm/pmap.h>
53 
54 #include "pcib_if.h"
55 
56 #define	UNINORTH_DEBUG	0
57 
58 /*
59  * Device interface.
60  */
61 static int		uninorth_probe(device_t);
62 static int		uninorth_attach(device_t);
63 
64 /*
65  * Bus interface.
66  */
67 static int		uninorth_read_ivar(device_t, device_t, int,
68 			    uintptr_t *);
69 static struct		resource * uninorth_alloc_resource(device_t bus,
70 			    device_t child, int type, int *rid, u_long start,
71 			    u_long end, u_long count, u_int flags);
72 static int		uninorth_activate_resource(device_t bus, device_t child,
73 			    int type, int rid, struct resource *res);
74 
75 /*
76  * pcib interface.
77  */
78 static int		uninorth_maxslots(device_t);
79 static u_int32_t	uninorth_read_config(device_t, u_int, u_int, u_int,
80 			    u_int, int);
81 static void		uninorth_write_config(device_t, u_int, u_int, u_int,
82 			    u_int, u_int32_t, int);
83 static int		uninorth_route_interrupt(device_t, device_t, int);
84 
85 static bus_space_tag_t	uninorth_alloc_bus_tag(struct uninorth_softc *sc,
86 			    int type);
87 
88 /*
89  * Local routines.
90  */
91 static int		uninorth_enable_config(struct uninorth_softc *, u_int,
92 			    u_int, u_int, u_int);
93 
94 /*
95  * Driver methods.
96  */
97 static device_method_t	uninorth_methods[] = {
98 	/* Device interface */
99 	DEVMETHOD(device_probe,		uninorth_probe),
100 	DEVMETHOD(device_attach,	uninorth_attach),
101 
102 	/* Bus interface */
103 	DEVMETHOD(bus_print_child,	bus_generic_print_child),
104 	DEVMETHOD(bus_read_ivar,	uninorth_read_ivar),
105 	DEVMETHOD(bus_setup_intr,	bus_generic_setup_intr),
106 	DEVMETHOD(bus_teardown_intr,	bus_generic_teardown_intr),
107 	DEVMETHOD(bus_alloc_resource,	uninorth_alloc_resource),
108 	DEVMETHOD(bus_activate_resource,	uninorth_activate_resource),
109 
110 	/* pcib interface */
111 	DEVMETHOD(pcib_maxslots,	uninorth_maxslots),
112 	DEVMETHOD(pcib_read_config,	uninorth_read_config),
113 	DEVMETHOD(pcib_write_config,	uninorth_write_config),
114 	DEVMETHOD(pcib_route_interrupt,	uninorth_route_interrupt),
115 
116 	{ 0, 0 }
117 };
118 
119 static driver_t	uninorth_driver = {
120 	"pcib",
121 	uninorth_methods,
122 	sizeof(struct uninorth_softc)
123 };
124 
125 static devclass_t	uninorth_devclass;
126 
127 DRIVER_MODULE(uninorth, nexus, uninorth_driver, uninorth_devclass, 0, 0);
128 
129 static int
130 uninorth_probe(device_t dev)
131 {
132 	char	*type, *compatible;
133 
134 	type = nexus_get_device_type(dev);
135 	compatible = nexus_get_compatible(dev);
136 
137 	if (type == NULL || compatible == NULL)
138 		return (ENXIO);
139 
140 	if (strcmp(type, "pci") != 0 || strcmp(compatible, "uni-north") != 0)
141 		return (ENXIO);
142 
143 	device_set_desc(dev, "Apple UniNorth Host-PCI bridge");
144 	return (0);
145 }
146 
147 static int
148 uninorth_attach(device_t dev)
149 {
150 	struct		uninorth_softc *sc;
151 	phandle_t	node;
152 	u_int32_t	reg[2], busrange[2];
153 	struct		uninorth_range *rp, *io, *mem[2];
154 	int		nmem, i;
155 
156 	node = nexus_get_node(dev);
157 	sc = device_get_softc(dev);
158 
159 	if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8)
160 		return (ENXIO);
161 
162 	if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8)
163 		return (ENXIO);
164 
165 	sc->sc_dev = dev;
166 	sc->sc_node = node;
167 	sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[0] + 0x800000, PAGE_SIZE);
168 	sc->sc_data = (vm_offset_t)pmap_mapdev(reg[0] + 0xc00000, PAGE_SIZE);
169 	sc->sc_bus = busrange[0];
170 
171 	ofw_pci_fixup(dev, sc->sc_bus, node);
172 
173 	bzero(sc->sc_range, sizeof(sc->sc_range));
174 	sc->sc_nrange = OF_getprop(node, "ranges", sc->sc_range,
175 	    sizeof(sc->sc_range));
176 
177 	if (sc->sc_nrange == -1) {
178 		device_printf(dev, "could not get ranges\n");
179 		return (ENXIO);
180 	}
181 
182 	sc->sc_range[6].pci_hi = 0;
183 	io = NULL;
184 	nmem = 0;
185 
186 	for (rp = sc->sc_range; rp->pci_hi != 0; rp++) {
187 		switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) {
188 		case OFW_PCI_PHYS_HI_SPACE_CONFIG:
189 			break;
190 		case OFW_PCI_PHYS_HI_SPACE_IO:
191 			io = rp;
192 			break;
193 		case OFW_PCI_PHYS_HI_SPACE_MEM32:
194 			mem[nmem] = rp;
195 			nmem++;
196 			break;
197 		case OFW_PCI_PHYS_HI_SPACE_MEM64:
198 			break;
199 		}
200 	}
201 
202 	if (io == NULL) {
203 		device_printf(dev, "can't find io range\n");
204 		return (ENXIO);
205 	}
206 	sc->sc_io_rman.rm_type = RMAN_ARRAY;
207 	sc->sc_io_rman.rm_descr = "UniNorth PCI I/O Ports";
208 	if (rman_init(&sc->sc_io_rman) != 0 ||
209 	    rman_manage_region(&sc->sc_io_rman, io->pci_lo,
210 	    io->pci_lo + io->size_lo) != 0) {
211 		device_printf(dev, "failed to set up io range management\n");
212 		return (ENXIO);
213 	}
214 
215 	if (nmem == 0) {
216 		device_printf(dev, "can't find mem ranges\n");
217 		return (ENXIO);
218 	}
219 	sc->sc_mem_rman.rm_type = RMAN_ARRAY;
220 	sc->sc_mem_rman.rm_descr = "UniNorth PCI Memory";
221 	if (rman_init(&sc->sc_mem_rman) != 0) {
222 		device_printf(dev,
223 		    "failed to init mem range resources\n");
224 		return (ENXIO);
225 	}
226 	for (i = 0; i < nmem; i++) {
227 		if (rman_manage_region(&sc->sc_mem_rman, mem[i]->pci_lo,
228 		    mem[i]->pci_lo + mem[i]->size_lo) != 0) {
229 			device_printf(dev,
230 			    "failed to set up memory range management\n");
231 			return (ENXIO);
232 		}
233 	}
234 
235 #if 0
236 	sc->sc_iot = uninorth_alloc_bus_tag(sc, PCI_IO_BUS_SPACE);
237 	sc->sc_memt = uninorth_alloc_bus_tag(sc, PCI_MEMORY_BUS_SPACE);
238 #endif
239 
240 	device_add_child(dev, "pci", device_get_unit(dev));
241 	return (bus_generic_attach(dev));
242 }
243 
244 static int
245 uninorth_maxslots(device_t dev)
246 {
247 
248 	return (PCI_SLOTMAX);
249 }
250 
251 static u_int32_t
252 uninorth_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg,
253     int width)
254 {
255 	struct		uninorth_softc *sc;
256 	vm_offset_t	caoff;
257 
258 	sc = device_get_softc(dev);
259 	caoff = sc->sc_data + (reg & 0x07);
260 
261 	if (uninorth_enable_config(sc, bus, slot, func, reg) != 0) {
262 		switch (width) {
263 		case 1:
264 			return (in8rb(caoff));
265 			break;
266 		case 2:
267 			return (in16rb(caoff));
268 			break;
269 		case 4:
270 			return (in32rb(caoff));
271 			break;
272 		}
273 	}
274 
275 	return (0xffffffff);
276 }
277 
278 static void
279 uninorth_write_config(device_t dev, u_int bus, u_int slot, u_int func,
280     u_int reg, u_int32_t val, int width)
281 {
282 	struct		uninorth_softc *sc;
283 	vm_offset_t	caoff;
284 
285 	sc = device_get_softc(dev);
286 	caoff = sc->sc_data + (reg & 0x07);
287 
288 	if (uninorth_enable_config(sc, bus, slot, func, reg)) {
289 		switch (width) {
290 		case 1:
291 			out8rb(caoff, val);
292 			(void)in8rb(caoff);
293 			break;
294 		case 2:
295 			out16rb(caoff, val);
296 			(void)in16rb(caoff);
297 			break;
298 		case 4:
299 			out32rb(caoff, val);
300 			(void)in32rb(caoff);
301 			break;
302 		}
303 	}
304 }
305 
306 static int
307 uninorth_route_interrupt(device_t bus, device_t dev, int pin)
308 {
309 
310 	return (0);
311 }
312 
313 static int
314 uninorth_read_ivar(device_t dev, device_t child, int which, uintptr_t *result)
315 {
316 	struct	uninorth_softc *sc;
317 
318 	sc = device_get_softc(dev);
319 
320 	switch (which) {
321 	case PCIB_IVAR_BUS:
322 		*result = sc->sc_bus;
323 		return (0);
324 		break;
325 	}
326 
327 	return (ENOENT);
328 }
329 
330 static struct resource *
331 uninorth_alloc_resource(device_t bus, device_t child, int type, int *rid,
332     u_long start, u_long end, u_long count, u_int flags)
333 {
334 	struct			uninorth_softc *sc;
335 	struct			resource *rv;
336 	struct			rman *rm;
337 	bus_space_tag_t		bt;
338 	int			needactivate;
339 
340 	needactivate = flags & RF_ACTIVE;
341 	flags &= ~RF_ACTIVE;
342 
343 	sc = device_get_softc(bus);
344 
345 	switch (type) {
346 	case SYS_RES_MEMORY:
347 		rm = &sc->sc_mem_rman;
348 		bt = sc->sc_memt;
349 		break;
350 	case SYS_RES_IRQ:
351 		return (bus_alloc_resource(bus, type, rid, start, end, count,
352 		    flags));
353 		break;
354 	default:
355 		device_printf(bus, "unknown resource request from %s\n",
356 		    device_get_nameunit(child));
357 		return (NULL);
358 	}
359 
360 	rv = rman_reserve_resource(rm, start, end, count, flags, child);
361 	if (rv == NULL) {
362 		device_printf(bus, "failed to reserve resource for %s\n",
363 		    device_get_nameunit(child));
364 		return (NULL);
365 	}
366 
367 	rman_set_bustag(rv, bt);
368 	rman_set_bushandle(rv, rman_get_start(rv));
369 
370 	if (needactivate) {
371 		if (bus_activate_resource(child, type, *rid, rv) != 0) {
372 			device_printf(bus,
373 			    "failed to activate resource for %s\n",
374 			    device_get_nameunit(child));
375 			rman_release_resource(rv);
376 			return (NULL);
377 		}
378 	}
379 
380 	return (rv);
381 }
382 
383 static int
384 uninorth_activate_resource(device_t bus, device_t child, int type, int rid,
385     struct resource *res)
386 {
387 	void	*p;
388 
389 	if (type == SYS_RES_IRQ)
390 		return (bus_activate_resource(bus, type, rid, res));
391 
392 	if (type == SYS_RES_MEMORY) {
393 		p = pmap_mapdev((vm_offset_t)rman_get_start(res),
394 		    (vm_size_t)rman_get_size(res));
395 		if (p == NULL)
396 			return (ENOMEM);
397 		rman_set_virtual(res, p);
398 		rman_set_bushandle(res, (u_long)p);
399 	}
400 
401 	return (rman_activate_resource(res));
402 }
403 
404 #if 0
405 static bus_space_tag_t
406 uninorth_alloc_bus_tag(struct uninorth_softc *sc, int type)
407 {
408 	bus_space_tag_t	bt;
409 
410 	bt = (bus_space_tag_t)malloc(sizeof(struct bus_space_tag), M_DEVBUF,
411 	    M_NOWAIT | M_ZERO);
412 	if (bt == NULL)
413 		panic("uninorth_alloc_bus_tag: out of memory");
414 
415 	bzero(bt, sizeof(struct bus_space_tag));
416 	bt->cookie = sc;
417 #if 0
418 	bt->parent = sc->sc_bustag;
419 #endif
420 	bt->type = type;
421 
422 	return (bt);
423 }
424 #endif
425 
426 static int
427 uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot,
428     u_int func, u_int reg)
429 {
430 	u_int32_t	cfgval;
431 
432 	if (sc->sc_bus == bus) {
433 		/*
434 		 * No slots less than 11 on the primary bus
435 		 */
436 		if (slot < 11)
437 			return (0);
438 
439 		cfgval = (1 << slot) | (func << 8) | (reg & 0xfc);
440 	} else {
441 		cfgval = (bus << 16) | (slot << 11) | (func << 8) |
442 		    (reg & 0xfc) | 1;
443 	}
444 
445 	do {
446 		out32rb(sc->sc_addr, cfgval);
447 	} while (in32rb(sc->sc_addr) != cfgval);
448 
449 	return (1);
450 }
451 
452 /*
453  * Driver to swallow UniNorth host bridges from the PCI bus side.
454  */
455 static int
456 unhb_probe(device_t dev)
457 {
458 
459 	if (pci_get_class(dev) == PCIC_BRIDGE &&
460 	    pci_get_subclass(dev) == PCIS_BRIDGE_HOST) {
461 		device_set_desc(dev, "Host to PCI bridge");
462 		device_quiet(dev);
463 		return (-10000);
464 	}
465 
466 	return (ENXIO);
467 }
468 
469 static int
470 unhb_attach(device_t dev)
471 {
472 
473 	return (0);
474 }
475 
476 static device_method_t unhb_methods[] = {
477 	/* Device interface */
478 	DEVMETHOD(device_probe,         unhb_probe),
479 	DEVMETHOD(device_attach,        unhb_attach),
480 
481 	{ 0, 0 }
482 };
483 
484 static driver_t unhb_driver = {
485 	"unhb",
486 	unhb_methods,
487 	1,
488 };
489 static devclass_t unhb_devclass;
490 
491 DRIVER_MODULE(unhb, pci, unhb_driver, unhb_devclass, 0, 0);
492