1 /*- 2 * SPDX-License-Identifier: BSD-2-Clause 3 * 4 * Copyright (C) 2002 Benno Rice. 5 * All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 16 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 17 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 18 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 19 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 20 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 21 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 22 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 23 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 24 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 25 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 26 */ 27 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/module.h> 31 #include <sys/bus.h> 32 #include <sys/conf.h> 33 #include <sys/kernel.h> 34 35 #include <dev/ofw/openfirm.h> 36 #include <dev/ofw/ofw_pci.h> 37 #include <dev/ofw/ofw_bus.h> 38 #include <dev/ofw/ofw_bus_subr.h> 39 40 #include <dev/pci/pcivar.h> 41 #include <dev/pci/pcireg.h> 42 43 #include <machine/bus.h> 44 #include <machine/intr_machdep.h> 45 #include <machine/md_var.h> 46 #include <machine/pio.h> 47 #include <machine/resource.h> 48 49 #include <sys/rman.h> 50 51 #include <powerpc/powermac/uninorthvar.h> 52 53 #include <vm/vm.h> 54 #include <vm/pmap.h> 55 56 /* 57 * Driver for the Uninorth chip itself. 58 */ 59 60 static MALLOC_DEFINE(M_UNIN, "unin", "unin device information"); 61 62 /* 63 * Device interface. 64 */ 65 66 static int unin_chip_probe(device_t); 67 static int unin_chip_attach(device_t); 68 69 /* 70 * Bus interface. 71 */ 72 static int unin_chip_print_child(device_t dev, device_t child); 73 static void unin_chip_probe_nomatch(device_t, device_t); 74 static struct rman *unin_chip_get_rman(device_t, int, u_int); 75 static struct resource *unin_chip_alloc_resource(device_t, device_t, int, int *, 76 rman_res_t, rman_res_t, 77 rman_res_t, u_int); 78 static int unin_chip_adjust_resource(device_t, device_t, int, 79 struct resource *, rman_res_t, 80 rman_res_t); 81 static int unin_chip_activate_resource(device_t, device_t, int, int, 82 struct resource *); 83 static int unin_chip_deactivate_resource(device_t, device_t, int, int, 84 struct resource *); 85 static int unin_chip_map_resource(device_t, device_t, int, struct resource *, 86 struct resource_map_request *, 87 struct resource_map *); 88 static int unin_chip_unmap_resource(device_t, device_t, int, struct resource *, 89 struct resource_map *); 90 static int unin_chip_release_resource(device_t, device_t, int, int, 91 struct resource *); 92 static struct resource_list *unin_chip_get_resource_list (device_t, device_t); 93 94 /* 95 * OFW Bus interface 96 */ 97 98 static ofw_bus_get_devinfo_t unin_chip_get_devinfo; 99 100 /* 101 * Local routines 102 */ 103 104 static void unin_enable_gmac(device_t dev); 105 static void unin_enable_mpic(device_t dev); 106 107 /* 108 * Driver methods. 109 */ 110 static device_method_t unin_chip_methods[] = { 111 /* Device interface */ 112 DEVMETHOD(device_probe, unin_chip_probe), 113 DEVMETHOD(device_attach, unin_chip_attach), 114 115 /* Bus interface */ 116 DEVMETHOD(bus_print_child, unin_chip_print_child), 117 DEVMETHOD(bus_probe_nomatch, unin_chip_probe_nomatch), 118 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 119 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 120 121 DEVMETHOD(bus_get_rman, unin_chip_get_rman), 122 DEVMETHOD(bus_alloc_resource, unin_chip_alloc_resource), 123 DEVMETHOD(bus_adjust_resource, unin_chip_adjust_resource), 124 DEVMETHOD(bus_release_resource, unin_chip_release_resource), 125 DEVMETHOD(bus_activate_resource, unin_chip_activate_resource), 126 DEVMETHOD(bus_deactivate_resource, unin_chip_deactivate_resource), 127 DEVMETHOD(bus_map_resource, unin_chip_map_resource), 128 DEVMETHOD(bus_unmap_resource, unin_chip_unmap_resource), 129 DEVMETHOD(bus_get_resource_list, unin_chip_get_resource_list), 130 131 DEVMETHOD(bus_child_pnpinfo, ofw_bus_gen_child_pnpinfo), 132 133 /* ofw_bus interface */ 134 DEVMETHOD(ofw_bus_get_devinfo, unin_chip_get_devinfo), 135 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 136 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 137 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 138 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 139 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 140 { 0, 0 } 141 }; 142 143 static driver_t unin_chip_driver = { 144 "unin", 145 unin_chip_methods, 146 sizeof(struct unin_chip_softc) 147 }; 148 149 /* 150 * Assume there is only one unin chip in a PowerMac, so that pmu.c functions can 151 * suspend the chip after the whole rest of the device tree is suspended, not 152 * earlier. 153 */ 154 static device_t unin_chip; 155 156 EARLY_DRIVER_MODULE(unin, ofwbus, unin_chip_driver, 0, 0, BUS_PASS_BUS); 157 158 /* 159 * Add an interrupt to the dev's resource list if present 160 */ 161 static void 162 unin_chip_add_intr(phandle_t devnode, struct unin_chip_devinfo *dinfo) 163 { 164 phandle_t iparent; 165 int *intr; 166 int i, nintr; 167 int icells; 168 169 if (dinfo->udi_ninterrupts >= 6) { 170 printf("unin: device has more than 6 interrupts\n"); 171 return; 172 } 173 174 nintr = OF_getprop_alloc_multi(devnode, "interrupts", sizeof(*intr), 175 (void **)&intr); 176 if (nintr == -1) { 177 nintr = OF_getprop_alloc_multi(devnode, "AAPL,interrupts", 178 sizeof(*intr), (void **)&intr); 179 if (nintr == -1) 180 return; 181 } 182 183 if (intr[0] == -1) 184 return; 185 186 if (OF_getprop(devnode, "interrupt-parent", &iparent, sizeof(iparent)) 187 <= 0) 188 panic("Interrupt but no interrupt parent!\n"); 189 190 if (OF_searchprop(iparent, "#interrupt-cells", &icells, sizeof(icells)) 191 <= 0) 192 icells = 1; 193 194 for (i = 0; i < nintr; i+=icells) { 195 u_int irq = MAP_IRQ(iparent, intr[i]); 196 197 resource_list_add(&dinfo->udi_resources, SYS_RES_IRQ, 198 dinfo->udi_ninterrupts, irq, irq, 1); 199 200 if (icells > 1) { 201 powerpc_config_intr(irq, 202 (intr[i+1] & 1) ? INTR_TRIGGER_LEVEL : 203 INTR_TRIGGER_EDGE, INTR_POLARITY_LOW); 204 } 205 206 dinfo->udi_interrupts[dinfo->udi_ninterrupts] = irq; 207 dinfo->udi_ninterrupts++; 208 } 209 } 210 211 static void 212 unin_chip_add_reg(phandle_t devnode, struct unin_chip_devinfo *dinfo) 213 { 214 struct unin_chip_reg *reg; 215 int i, nreg; 216 217 nreg = OF_getprop_alloc_multi(devnode, "reg", sizeof(*reg), (void **)®); 218 if (nreg == -1) 219 return; 220 221 for (i = 0; i < nreg; i++) { 222 resource_list_add(&dinfo->udi_resources, SYS_RES_MEMORY, i, 223 reg[i].mr_base, 224 reg[i].mr_base + reg[i].mr_size, 225 reg[i].mr_size); 226 } 227 } 228 229 static void 230 unin_update_reg(device_t dev, uint32_t regoff, uint32_t set, uint32_t clr) 231 { 232 volatile u_int *reg; 233 struct unin_chip_softc *sc; 234 u_int32_t tmpl; 235 236 sc = device_get_softc(dev); 237 reg = (void *)(sc->sc_addr + regoff); 238 tmpl = inl(reg); 239 tmpl &= ~clr; 240 tmpl |= set; 241 outl(reg, tmpl); 242 } 243 244 static void 245 unin_enable_gmac(device_t dev) 246 { 247 unin_update_reg(dev, UNIN_CLOCKCNTL, UNIN_CLOCKCNTL_GMAC, 0); 248 } 249 250 static void 251 unin_enable_mpic(device_t dev) 252 { 253 unin_update_reg(dev, UNIN_TOGGLE_REG, UNIN_MPIC_RESET | UNIN_MPIC_OUTPUT_ENABLE, 0); 254 } 255 256 static int 257 unin_chip_probe(device_t dev) 258 { 259 const char *name; 260 261 name = ofw_bus_get_name(dev); 262 263 if (name == NULL) 264 return (ENXIO); 265 266 if (strcmp(name, "uni-n") != 0 && strcmp(name, "u3") != 0 267 && strcmp(name, "u4") != 0) 268 return (ENXIO); 269 270 device_set_desc(dev, "Apple UniNorth System Controller"); 271 return (0); 272 } 273 274 static int 275 unin_chip_attach(device_t dev) 276 { 277 struct unin_chip_softc *sc; 278 struct unin_chip_devinfo *dinfo; 279 phandle_t root; 280 phandle_t child; 281 phandle_t iparent; 282 device_t cdev; 283 cell_t acells, scells; 284 char compat[32]; 285 char name[32]; 286 u_int irq, reg[3]; 287 int error, i = 0; 288 289 sc = device_get_softc(dev); 290 root = ofw_bus_get_node(dev); 291 292 if (OF_getprop(root, "reg", reg, sizeof(reg)) < 8) 293 return (ENXIO); 294 295 acells = scells = 1; 296 OF_getprop(OF_parent(root), "#address-cells", &acells, sizeof(acells)); 297 OF_getprop(OF_parent(root), "#size-cells", &scells, sizeof(scells)); 298 299 i = 0; 300 sc->sc_physaddr = reg[i++]; 301 if (acells == 2) { 302 sc->sc_physaddr <<= 32; 303 sc->sc_physaddr |= reg[i++]; 304 } 305 sc->sc_size = reg[i++]; 306 if (scells == 2) { 307 sc->sc_size <<= 32; 308 sc->sc_size |= reg[i++]; 309 } 310 311 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 312 sc->sc_mem_rman.rm_descr = "UniNorth Device Memory"; 313 314 error = rman_init(&sc->sc_mem_rman); 315 316 if (error) { 317 device_printf(dev, "rman_init() failed. error = %d\n", error); 318 return (error); 319 } 320 321 error = rman_manage_region(&sc->sc_mem_rman, sc->sc_physaddr, 322 sc->sc_physaddr + sc->sc_size - 1); 323 if (error) { 324 device_printf(dev, 325 "rman_manage_region() failed. error = %d\n", 326 error); 327 return (error); 328 } 329 330 if (unin_chip == NULL) 331 unin_chip = dev; 332 333 /* 334 * Iterate through the sub-devices 335 */ 336 for (child = OF_child(root); child != 0; child = OF_peer(child)) { 337 dinfo = malloc(sizeof(*dinfo), M_UNIN, M_WAITOK | M_ZERO); 338 if (ofw_bus_gen_setup_devinfo(&dinfo->udi_obdinfo, child) 339 != 0) 340 { 341 free(dinfo, M_UNIN); 342 continue; 343 } 344 345 resource_list_init(&dinfo->udi_resources); 346 dinfo->udi_ninterrupts = 0; 347 unin_chip_add_intr(child, dinfo); 348 349 /* 350 * Some Apple machines do have a bug in OF, they miss 351 * the interrupt entries on the U3 I2C node. That means they 352 * do not have an entry with number of interrupts nor the 353 * entry of the interrupt parent handle. 354 * We define an interrupt and hardwire it to the /u3/mpic 355 * handle. 356 */ 357 358 if (OF_getprop(child, "name", name, sizeof(name)) <= 0) 359 device_printf(dev, "device has no name!\n"); 360 if (dinfo->udi_ninterrupts == 0 && 361 (strcmp(name, "i2c-bus") == 0 || 362 strcmp(name, "i2c") == 0)) { 363 if (OF_getprop(child, "interrupt-parent", &iparent, 364 sizeof(iparent)) <= 0) { 365 iparent = OF_finddevice("/u3/mpic"); 366 device_printf(dev, "Set /u3/mpic as iparent!\n"); 367 } 368 /* Add an interrupt number 0 to the parent. */ 369 irq = MAP_IRQ(iparent, 0); 370 resource_list_add(&dinfo->udi_resources, SYS_RES_IRQ, 371 dinfo->udi_ninterrupts, irq, irq, 1); 372 dinfo->udi_interrupts[dinfo->udi_ninterrupts] = irq; 373 dinfo->udi_ninterrupts++; 374 } 375 376 unin_chip_add_reg(child, dinfo); 377 378 cdev = device_add_child(dev, NULL, -1); 379 if (cdev == NULL) { 380 device_printf(dev, "<%s>: device_add_child failed\n", 381 dinfo->udi_obdinfo.obd_name); 382 resource_list_free(&dinfo->udi_resources); 383 ofw_bus_gen_destroy_devinfo(&dinfo->udi_obdinfo); 384 free(dinfo, M_UNIN); 385 continue; 386 } 387 388 device_set_ivars(cdev, dinfo); 389 } 390 391 /* 392 * Only map the first page, since that is where the registers 393 * of interest lie. 394 */ 395 sc->sc_addr = (vm_offset_t)pmap_mapdev(sc->sc_physaddr, PAGE_SIZE); 396 397 sc->sc_version = *(u_int *)sc->sc_addr; 398 device_printf(dev, "Version %d\n", sc->sc_version); 399 400 /* 401 * Enable the GMAC Ethernet cell and the integrated OpenPIC 402 * if Open Firmware says they are used. 403 */ 404 for (child = OF_child(root); child; child = OF_peer(child)) { 405 memset(compat, 0, sizeof(compat)); 406 OF_getprop(child, "compatible", compat, sizeof(compat)); 407 if (strcmp(compat, "gmac") == 0) 408 unin_enable_gmac(dev); 409 if (strcmp(compat, "chrp,open-pic") == 0) 410 unin_enable_mpic(dev); 411 } 412 413 /* 414 * GMAC lives under the PCI bus, so just check if enet is gmac. 415 */ 416 child = OF_finddevice("enet"); 417 memset(compat, 0, sizeof(compat)); 418 OF_getprop(child, "compatible", compat, sizeof(compat)); 419 if (strcmp(compat, "gmac") == 0) 420 unin_enable_gmac(dev); 421 422 return (bus_generic_attach(dev)); 423 } 424 425 static int 426 unin_chip_print_child(device_t dev, device_t child) 427 { 428 struct unin_chip_devinfo *dinfo; 429 struct resource_list *rl; 430 int retval = 0; 431 432 dinfo = device_get_ivars(child); 433 rl = &dinfo->udi_resources; 434 435 retval += bus_print_child_header(dev, child); 436 437 retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); 438 retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); 439 440 retval += bus_print_child_footer(dev, child); 441 442 return (retval); 443 } 444 445 static void 446 unin_chip_probe_nomatch(device_t dev, device_t child) 447 { 448 struct unin_chip_devinfo *dinfo; 449 struct resource_list *rl; 450 const char *type; 451 452 if (bootverbose) { 453 dinfo = device_get_ivars(child); 454 rl = &dinfo->udi_resources; 455 456 if ((type = ofw_bus_get_type(child)) == NULL) 457 type = "(unknown)"; 458 device_printf(dev, "<%s, %s>", type, ofw_bus_get_name(child)); 459 resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); 460 resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); 461 printf(" (no driver attached)\n"); 462 } 463 } 464 465 static struct rman * 466 unin_chip_get_rman(device_t bus, int type, u_int flags) 467 { 468 struct unin_chip_softc *sc; 469 470 sc = device_get_softc(bus); 471 switch (type) { 472 case SYS_RES_MEMORY: 473 case SYS_RES_IOPORT: 474 return (&sc->sc_mem_rman); 475 default: 476 return (NULL); 477 } 478 } 479 480 static struct resource * 481 unin_chip_alloc_resource(device_t bus, device_t child, int type, int *rid, 482 rman_res_t start, rman_res_t end, rman_res_t count, 483 u_int flags) 484 { 485 rman_res_t adjstart, adjend, adjcount; 486 struct unin_chip_devinfo *dinfo; 487 struct resource_list_entry *rle; 488 489 dinfo = device_get_ivars(child); 490 491 switch (type) { 492 case SYS_RES_MEMORY: 493 case SYS_RES_IOPORT: 494 rle = resource_list_find(&dinfo->udi_resources, SYS_RES_MEMORY, 495 *rid); 496 if (rle == NULL) { 497 device_printf(bus, "no rle for %s memory %d\n", 498 device_get_nameunit(child), *rid); 499 return (NULL); 500 } 501 502 rle->end = rle->end - 1; /* Hack? */ 503 504 if (start < rle->start) 505 adjstart = rle->start; 506 else if (start > rle->end) 507 adjstart = rle->end; 508 else 509 adjstart = start; 510 511 if (end < rle->start) 512 adjend = rle->start; 513 else if (end > rle->end) 514 adjend = rle->end; 515 else 516 adjend = end; 517 518 adjcount = adjend - adjstart; 519 520 return (bus_generic_rman_alloc_resource(bus, child, 521 SYS_RES_MEMORY, rid, adjstart, adjend, adjcount, flags)); 522 case SYS_RES_IRQ: 523 /* Check for passthrough from subattachments. */ 524 if (device_get_parent(child) != bus) 525 return BUS_ALLOC_RESOURCE(device_get_parent(bus), child, 526 type, rid, start, end, count, 527 flags); 528 529 rle = resource_list_find(&dinfo->udi_resources, SYS_RES_IRQ, 530 *rid); 531 if (rle == NULL) { 532 if (dinfo->udi_ninterrupts >= 6) { 533 device_printf(bus, 534 "%s has more than 6 interrupts\n", 535 device_get_nameunit(child)); 536 return (NULL); 537 } 538 resource_list_add(&dinfo->udi_resources, SYS_RES_IRQ, 539 dinfo->udi_ninterrupts, start, start, 540 1); 541 542 dinfo->udi_interrupts[dinfo->udi_ninterrupts] = start; 543 dinfo->udi_ninterrupts++; 544 } 545 546 return (resource_list_alloc(&dinfo->udi_resources, bus, child, 547 type, rid, start, end, count, 548 flags)); 549 default: 550 device_printf(bus, "unknown resource request from %s\n", 551 device_get_nameunit(child)); 552 return (NULL); 553 } 554 } 555 556 static int 557 unin_chip_adjust_resource(device_t bus, device_t child, int type, 558 struct resource *r, rman_res_t start, rman_res_t end) 559 { 560 switch (type) { 561 case SYS_RES_IOPORT: 562 case SYS_RES_MEMORY: 563 return (bus_generic_rman_adjust_resource(bus, child, type, r, 564 start, end)); 565 case SYS_RES_IRQ: 566 return (bus_generic_adjust_resource(bus, child, type, r, start, 567 end)); 568 default: 569 return (EINVAL); 570 } 571 } 572 573 static int 574 unin_chip_release_resource(device_t bus, device_t child, int type, int rid, 575 struct resource *res) 576 { 577 switch (type) { 578 case SYS_RES_IOPORT: 579 case SYS_RES_MEMORY: 580 return (bus_generic_rman_release_resource(bus, child, type, rid, 581 res)); 582 case SYS_RES_IRQ: 583 return (bus_generic_rl_release_resource(bus, child, type, rid, 584 res)); 585 default: 586 return (EINVAL); 587 } 588 } 589 590 static int 591 unin_chip_activate_resource(device_t bus, device_t child, int type, int rid, 592 struct resource *res) 593 { 594 switch (type) { 595 case SYS_RES_IOPORT: 596 case SYS_RES_MEMORY: 597 return (bus_generic_rman_activate_resource(bus, child, type, 598 rid, res)); 599 case SYS_RES_IRQ: 600 return (bus_generic_activate_resource(bus, child, type, rid, 601 res)); 602 default: 603 return (EINVAL); 604 } 605 } 606 607 static int 608 unin_chip_deactivate_resource(device_t bus, device_t child, int type, int rid, 609 struct resource *res) 610 { 611 switch (type) { 612 case SYS_RES_IOPORT: 613 case SYS_RES_MEMORY: 614 return (bus_generic_rman_deactivate_resource(bus, child, type, 615 rid, res)); 616 case SYS_RES_IRQ: 617 return (bus_generic_deactivate_resource(bus, child, type, rid, 618 res)); 619 default: 620 return (EINVAL); 621 } 622 } 623 624 static int 625 unin_chip_map_resource(device_t bus, device_t child, int type, 626 struct resource *r, struct resource_map_request *argsp, 627 struct resource_map *map) 628 { 629 struct resource_map_request args; 630 rman_res_t length, start; 631 int error; 632 633 /* Resources must be active to be mapped. */ 634 if (!(rman_get_flags(r) & RF_ACTIVE)) 635 return (ENXIO); 636 637 /* Mappings are only supported on I/O and memory resources. */ 638 switch (type) { 639 case SYS_RES_IOPORT: 640 case SYS_RES_MEMORY: 641 break; 642 default: 643 return (EINVAL); 644 } 645 646 resource_init_map_request(&args); 647 error = resource_validate_map_request(r, argsp, &args, &start, &length); 648 if (error) 649 return (error); 650 651 if (bootverbose) 652 printf("nexus mapdev: start %jx, len %jd\n", 653 (uintmax_t)start, (uintmax_t)length); 654 655 map->r_vaddr = pmap_mapdev_attr(start, length, args.memattr); 656 if (map->r_vaddr == NULL) 657 return (ENOMEM); 658 map->r_bustag = &bs_be_tag; 659 map->r_size = length; 660 map->r_bushandle = (bus_space_handle_t)map->r_vaddr; 661 return (0); 662 } 663 664 static int 665 unin_chip_unmap_resource(device_t bus, device_t child, int type, 666 struct resource *r, struct resource_map *map) 667 { 668 /* 669 * If this is a memory resource, unmap it. 670 */ 671 switch (type) { 672 case SYS_RES_IOPORT: 673 case SYS_RES_MEMORY: 674 pmap_unmapdev(map->r_vaddr, map->r_size); 675 break; 676 default: 677 return (EINVAL); 678 } 679 return (0); 680 } 681 682 static struct resource_list * 683 unin_chip_get_resource_list (device_t dev, device_t child) 684 { 685 struct unin_chip_devinfo *dinfo; 686 687 dinfo = device_get_ivars(child); 688 return (&dinfo->udi_resources); 689 } 690 691 static const struct ofw_bus_devinfo * 692 unin_chip_get_devinfo(device_t dev, device_t child) 693 { 694 struct unin_chip_devinfo *dinfo; 695 696 dinfo = device_get_ivars(child); 697 return (&dinfo->udi_obdinfo); 698 } 699 700 int 701 unin_chip_wake(device_t dev) 702 { 703 704 if (dev == NULL) 705 dev = unin_chip; 706 unin_update_reg(dev, UNIN_PWR_MGMT, UNIN_PWR_NORMAL, UNIN_PWR_MASK); 707 DELAY(10); 708 unin_update_reg(dev, UNIN_HWINIT_STATE, UNIN_RUNNING, 0); 709 DELAY(100); 710 711 return (0); 712 } 713 714 int 715 unin_chip_sleep(device_t dev, int idle) 716 { 717 if (dev == NULL) 718 dev = unin_chip; 719 720 unin_update_reg(dev, UNIN_HWINIT_STATE, UNIN_SLEEPING, 0); 721 DELAY(10); 722 if (idle) 723 unin_update_reg(dev, UNIN_PWR_MGMT, UNIN_PWR_IDLE2, UNIN_PWR_MASK); 724 else 725 unin_update_reg(dev, UNIN_PWR_MGMT, UNIN_PWR_SLEEP, UNIN_PWR_MASK); 726 DELAY(10); 727 728 return (0); 729 } 730