1 /* 2 * Copyright (C) 2002 Benno Rice. 3 * All rights reserved. 4 * 5 * Redistribution and use in source and binary forms, with or without 6 * modification, are permitted provided that the following conditions 7 * are met: 8 * 1. Redistributions of source code must retain the above copyright 9 * notice, this list of conditions and the following disclaimer. 10 * 2. Redistributions in binary form must reproduce the above copyright 11 * notice, this list of conditions and the following disclaimer in the 12 * documentation and/or other materials provided with the distribution. 13 * 14 * THIS SOFTWARE IS PROVIDED BY Benno Rice ``AS IS'' AND ANY EXPRESS OR 15 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 16 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 17 * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 18 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, 19 * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; 20 * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, 21 * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR 22 * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF 23 * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 24 * 25 * $FreeBSD$ 26 */ 27 28 #include <sys/param.h> 29 #include <sys/systm.h> 30 #include <sys/bus.h> 31 #include <sys/conf.h> 32 #include <sys/kernel.h> 33 34 #include <dev/ofw/openfirm.h> 35 #include <dev/ofw/ofw_pci.h> 36 37 #include <dev/pci/pcivar.h> 38 #include <dev/pci/pcireg.h> 39 40 #include <machine/bus.h> 41 #include <machine/md_var.h> 42 #include <machine/nexusvar.h> 43 #include <machine/resource.h> 44 45 #include <sys/rman.h> 46 47 #include <powerpc/ofw/ofw_pci.h> 48 #include <powerpc/powermac/uninorthvar.h> 49 50 #include <vm/vm.h> 51 #include <vm/pmap.h> 52 53 #include "pcib_if.h" 54 55 #define UNINORTH_DEBUG 0 56 57 /* 58 * Device interface. 59 */ 60 static int uninorth_probe(device_t); 61 static int uninorth_attach(device_t); 62 63 /* 64 * Bus interface. 65 */ 66 static int uninorth_read_ivar(device_t, device_t, int, 67 uintptr_t *); 68 static struct resource * uninorth_alloc_resource(device_t bus, 69 device_t child, int type, int *rid, u_long start, 70 u_long end, u_long count, u_int flags); 71 static int uninorth_activate_resource(device_t bus, device_t child, 72 int type, int rid, struct resource *res); 73 74 /* 75 * pcib interface. 76 */ 77 static int uninorth_maxslots(device_t); 78 static u_int32_t uninorth_read_config(device_t, u_int, u_int, u_int, 79 u_int, int); 80 static void uninorth_write_config(device_t, u_int, u_int, u_int, 81 u_int, u_int32_t, int); 82 static int uninorth_route_interrupt(device_t, device_t, int); 83 84 /* 85 * Local routines. 86 */ 87 static int uninorth_enable_config(struct uninorth_softc *, u_int, 88 u_int, u_int, u_int); 89 static void unin_enable_gmac(void); 90 91 /* 92 * Driver methods. 93 */ 94 static device_method_t uninorth_methods[] = { 95 /* Device interface */ 96 DEVMETHOD(device_probe, uninorth_probe), 97 DEVMETHOD(device_attach, uninorth_attach), 98 99 /* Bus interface */ 100 DEVMETHOD(bus_print_child, bus_generic_print_child), 101 DEVMETHOD(bus_read_ivar, uninorth_read_ivar), 102 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 103 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 104 DEVMETHOD(bus_alloc_resource, uninorth_alloc_resource), 105 DEVMETHOD(bus_activate_resource, uninorth_activate_resource), 106 107 /* pcib interface */ 108 DEVMETHOD(pcib_maxslots, uninorth_maxslots), 109 DEVMETHOD(pcib_read_config, uninorth_read_config), 110 DEVMETHOD(pcib_write_config, uninorth_write_config), 111 DEVMETHOD(pcib_route_interrupt, uninorth_route_interrupt), 112 113 { 0, 0 } 114 }; 115 116 static driver_t uninorth_driver = { 117 "pcib", 118 uninorth_methods, 119 sizeof(struct uninorth_softc) 120 }; 121 122 static devclass_t uninorth_devclass; 123 124 DRIVER_MODULE(uninorth, nexus, uninorth_driver, uninorth_devclass, 0, 0); 125 126 static int 127 uninorth_probe(device_t dev) 128 { 129 char *type, *compatible; 130 131 type = nexus_get_device_type(dev); 132 compatible = nexus_get_compatible(dev); 133 134 if (type == NULL || compatible == NULL) 135 return (ENXIO); 136 137 if (strcmp(type, "pci") != 0 || strcmp(compatible, "uni-north") != 0) 138 return (ENXIO); 139 140 device_set_desc(dev, "Apple UniNorth Host-PCI bridge"); 141 return (0); 142 } 143 144 static int 145 uninorth_attach(device_t dev) 146 { 147 struct uninorth_softc *sc; 148 phandle_t node; 149 phandle_t child; 150 u_int32_t reg[2], busrange[2]; 151 struct uninorth_range *rp, *io, *mem[2]; 152 int nmem, i; 153 154 node = nexus_get_node(dev); 155 sc = device_get_softc(dev); 156 157 if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8) 158 return (ENXIO); 159 160 if (OF_getprop(node, "bus-range", busrange, sizeof(busrange)) != 8) 161 return (ENXIO); 162 163 sc->sc_dev = dev; 164 sc->sc_node = node; 165 sc->sc_addr = (vm_offset_t)pmap_mapdev(reg[0] + 0x800000, PAGE_SIZE); 166 sc->sc_data = (vm_offset_t)pmap_mapdev(reg[0] + 0xc00000, PAGE_SIZE); 167 sc->sc_bus = busrange[0]; 168 169 bzero(sc->sc_range, sizeof(sc->sc_range)); 170 sc->sc_nrange = OF_getprop(node, "ranges", sc->sc_range, 171 sizeof(sc->sc_range)); 172 173 if (sc->sc_nrange == -1) { 174 device_printf(dev, "could not get ranges\n"); 175 return (ENXIO); 176 } 177 178 sc->sc_range[6].pci_hi = 0; 179 io = NULL; 180 nmem = 0; 181 182 for (rp = sc->sc_range; rp->pci_hi != 0; rp++) { 183 switch (rp->pci_hi & OFW_PCI_PHYS_HI_SPACEMASK) { 184 case OFW_PCI_PHYS_HI_SPACE_CONFIG: 185 break; 186 case OFW_PCI_PHYS_HI_SPACE_IO: 187 io = rp; 188 break; 189 case OFW_PCI_PHYS_HI_SPACE_MEM32: 190 mem[nmem] = rp; 191 nmem++; 192 break; 193 case OFW_PCI_PHYS_HI_SPACE_MEM64: 194 break; 195 } 196 } 197 198 if (io == NULL) { 199 device_printf(dev, "can't find io range\n"); 200 return (ENXIO); 201 } 202 sc->sc_io_rman.rm_type = RMAN_ARRAY; 203 sc->sc_io_rman.rm_descr = "UniNorth PCI I/O Ports"; 204 if (rman_init(&sc->sc_io_rman) != 0 || 205 rman_manage_region(&sc->sc_io_rman, io->pci_lo, 206 io->pci_lo + io->size_lo) != 0) { 207 device_printf(dev, "failed to set up io range management\n"); 208 return (ENXIO); 209 } 210 211 if (nmem == 0) { 212 device_printf(dev, "can't find mem ranges\n"); 213 return (ENXIO); 214 } 215 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 216 sc->sc_mem_rman.rm_descr = "UniNorth PCI Memory"; 217 if (rman_init(&sc->sc_mem_rman) != 0) { 218 device_printf(dev, 219 "failed to init mem range resources\n"); 220 return (ENXIO); 221 } 222 for (i = 0; i < nmem; i++) { 223 if (rman_manage_region(&sc->sc_mem_rman, mem[i]->pci_lo, 224 mem[i]->pci_lo + mem[i]->size_lo) != 0) { 225 device_printf(dev, 226 "failed to set up memory range management\n"); 227 return (ENXIO); 228 } 229 } 230 231 /* 232 * Enable the GMAC ethernet cell if OpenFirmware says it is 233 * used 234 */ 235 for (child = OF_child(node); child; child = OF_peer(child)) { 236 char compat[32]; 237 238 memset(compat, 0, sizeof(compat)); 239 OF_getprop(child, "compatible", compat, sizeof(compat)); 240 if (strcmp(compat, "gmac") == 0) { 241 unin_enable_gmac(); 242 } 243 } 244 245 /* 246 * Write out the correct PIC interrupt values to config space 247 * of all devices on the bus. This has to be done after the GEM 248 * cell is enabled above. 249 */ 250 ofw_pci_fixup(dev, sc->sc_bus, node); 251 252 device_add_child(dev, "pci", device_get_unit(dev)); 253 return (bus_generic_attach(dev)); 254 } 255 256 static int 257 uninorth_maxslots(device_t dev) 258 { 259 260 return (PCI_SLOTMAX); 261 } 262 263 static u_int32_t 264 uninorth_read_config(device_t dev, u_int bus, u_int slot, u_int func, u_int reg, 265 int width) 266 { 267 struct uninorth_softc *sc; 268 vm_offset_t caoff; 269 270 sc = device_get_softc(dev); 271 caoff = sc->sc_data + (reg & 0x07); 272 273 if (uninorth_enable_config(sc, bus, slot, func, reg) != 0) { 274 switch (width) { 275 case 1: 276 return (in8rb(caoff)); 277 break; 278 case 2: 279 return (in16rb(caoff)); 280 break; 281 case 4: 282 return (in32rb(caoff)); 283 break; 284 } 285 } 286 287 return (0xffffffff); 288 } 289 290 static void 291 uninorth_write_config(device_t dev, u_int bus, u_int slot, u_int func, 292 u_int reg, u_int32_t val, int width) 293 { 294 struct uninorth_softc *sc; 295 vm_offset_t caoff; 296 297 sc = device_get_softc(dev); 298 caoff = sc->sc_data + (reg & 0x07); 299 300 if (uninorth_enable_config(sc, bus, slot, func, reg)) { 301 switch (width) { 302 case 1: 303 out8rb(caoff, val); 304 (void)in8rb(caoff); 305 break; 306 case 2: 307 out16rb(caoff, val); 308 (void)in16rb(caoff); 309 break; 310 case 4: 311 out32rb(caoff, val); 312 (void)in32rb(caoff); 313 break; 314 } 315 } 316 } 317 318 static int 319 uninorth_route_interrupt(device_t bus, device_t dev, int pin) 320 { 321 322 return (0); 323 } 324 325 static int 326 uninorth_read_ivar(device_t dev, device_t child, int which, uintptr_t *result) 327 { 328 struct uninorth_softc *sc; 329 330 sc = device_get_softc(dev); 331 332 switch (which) { 333 case PCIB_IVAR_BUS: 334 *result = sc->sc_bus; 335 return (0); 336 break; 337 } 338 339 return (ENOENT); 340 } 341 342 static struct resource * 343 uninorth_alloc_resource(device_t bus, device_t child, int type, int *rid, 344 u_long start, u_long end, u_long count, u_int flags) 345 { 346 struct uninorth_softc *sc; 347 struct resource *rv; 348 struct rman *rm; 349 bus_space_tag_t bt; 350 int needactivate; 351 352 needactivate = flags & RF_ACTIVE; 353 flags &= ~RF_ACTIVE; 354 355 sc = device_get_softc(bus); 356 357 switch (type) { 358 case SYS_RES_MEMORY: 359 rm = &sc->sc_mem_rman; 360 bt = PPC_BUS_SPACE_MEM; 361 break; 362 case SYS_RES_IRQ: 363 return (bus_alloc_resource(bus, type, rid, start, end, count, 364 flags)); 365 break; 366 default: 367 device_printf(bus, "unknown resource request from %s\n", 368 device_get_nameunit(child)); 369 return (NULL); 370 } 371 372 rv = rman_reserve_resource(rm, start, end, count, flags, child); 373 if (rv == NULL) { 374 device_printf(bus, "failed to reserve resource for %s\n", 375 device_get_nameunit(child)); 376 return (NULL); 377 } 378 379 rman_set_bustag(rv, bt); 380 rman_set_bushandle(rv, rman_get_start(rv)); 381 382 if (needactivate) { 383 if (bus_activate_resource(child, type, *rid, rv) != 0) { 384 device_printf(bus, 385 "failed to activate resource for %s\n", 386 device_get_nameunit(child)); 387 rman_release_resource(rv); 388 return (NULL); 389 } 390 } 391 392 return (rv); 393 } 394 395 static int 396 uninorth_activate_resource(device_t bus, device_t child, int type, int rid, 397 struct resource *res) 398 { 399 void *p; 400 401 if (type == SYS_RES_IRQ) 402 return (bus_activate_resource(bus, type, rid, res)); 403 404 if (type == SYS_RES_MEMORY) { 405 p = pmap_mapdev((vm_offset_t)rman_get_start(res), 406 (vm_size_t)rman_get_size(res)); 407 if (p == NULL) 408 return (ENOMEM); 409 rman_set_virtual(res, p); 410 rman_set_bushandle(res, (u_long)p); 411 } 412 413 return (rman_activate_resource(res)); 414 } 415 416 static int 417 uninorth_enable_config(struct uninorth_softc *sc, u_int bus, u_int slot, 418 u_int func, u_int reg) 419 { 420 u_int32_t cfgval; 421 422 if (sc->sc_bus == bus) { 423 /* 424 * No slots less than 11 on the primary bus 425 */ 426 if (slot < 11) 427 return (0); 428 429 cfgval = (1 << slot) | (func << 8) | (reg & 0xfc); 430 } else { 431 cfgval = (bus << 16) | (slot << 11) | (func << 8) | 432 (reg & 0xfc) | 1; 433 } 434 435 do { 436 out32rb(sc->sc_addr, cfgval); 437 } while (in32rb(sc->sc_addr) != cfgval); 438 439 return (1); 440 } 441 442 /* 443 * Driver to swallow UniNorth host bridges from the PCI bus side. 444 */ 445 static int 446 unhb_probe(device_t dev) 447 { 448 449 if (pci_get_class(dev) == PCIC_BRIDGE && 450 pci_get_subclass(dev) == PCIS_BRIDGE_HOST) { 451 device_set_desc(dev, "Host to PCI bridge"); 452 device_quiet(dev); 453 return (-10000); 454 } 455 456 return (ENXIO); 457 } 458 459 static int 460 unhb_attach(device_t dev) 461 { 462 463 return (0); 464 } 465 466 static device_method_t unhb_methods[] = { 467 /* Device interface */ 468 DEVMETHOD(device_probe, unhb_probe), 469 DEVMETHOD(device_attach, unhb_attach), 470 471 { 0, 0 } 472 }; 473 474 static driver_t unhb_driver = { 475 "unhb", 476 unhb_methods, 477 1, 478 }; 479 static devclass_t unhb_devclass; 480 481 DRIVER_MODULE(unhb, pci, unhb_driver, unhb_devclass, 0, 0); 482 483 484 /* 485 * Small stub driver for the Uninorth chip itself, to allow setting 486 * of various parameters and cell enables 487 */ 488 static struct unin_chip_softc *uncsc; 489 490 static void 491 unin_enable_gmac(void) 492 { 493 volatile u_int *clkreg; 494 u_int32_t tmpl; 495 496 if (uncsc == NULL) 497 panic("unin_enable_gmac: device not found"); 498 499 clkreg = (void *)(uncsc->sc_addr + UNIN_CLOCKCNTL); 500 tmpl = inl(clkreg); 501 tmpl |= UNIN_CLOCKCNTL_GMAC; 502 outl(clkreg, tmpl); 503 } 504 505 static int 506 unin_chip_probe(device_t dev) 507 { 508 char *name; 509 510 name = nexus_get_name(dev); 511 512 if (name == NULL) 513 return (ENXIO); 514 515 if (strcmp(name, "uni-n") != 0) 516 return (ENXIO); 517 518 device_set_desc(dev, "Apple UniNorth System Controller"); 519 return (0); 520 } 521 522 static int 523 unin_chip_attach(device_t dev) 524 { 525 phandle_t node; 526 u_int reg[2]; 527 528 uncsc = device_get_softc(dev); 529 node = nexus_get_node(dev); 530 531 if (OF_getprop(node, "reg", reg, sizeof(reg)) < 8) 532 return (ENXIO); 533 534 uncsc->sc_physaddr = reg[0]; 535 uncsc->sc_size = reg[1]; 536 537 /* 538 * Only map the first page, since that is where the registers 539 * of interest lie. 540 */ 541 uncsc->sc_addr = (vm_offset_t) pmap_mapdev(reg[0], PAGE_SIZE); 542 543 uncsc->sc_version = *(u_int *)uncsc->sc_addr; 544 device_printf(dev, "Version %d\n", uncsc->sc_version); 545 546 return (0); 547 } 548 549 static device_method_t unin_chip_methods[] = { 550 /* Device interface */ 551 DEVMETHOD(device_probe, unin_chip_probe), 552 DEVMETHOD(device_attach, unin_chip_attach), 553 554 { 0, 0 } 555 }; 556 557 static driver_t unin_chip_driver = { 558 "unin", 559 unin_chip_methods, 560 sizeof(struct unin_chip_softc) 561 }; 562 563 static devclass_t unin_chip_devclass; 564 565 DRIVER_MODULE(unin, nexus, unin_chip_driver, unin_chip_devclass, 0, 0); 566 567 568 569 570