1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright 2002 by Peter Grehan. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 /* 31 * Driver for KeyLargo/Pangea, the MacPPC south bridge ASIC. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/malloc.h> 38 #include <sys/module.h> 39 #include <sys/bus.h> 40 #include <sys/rman.h> 41 42 #include <vm/vm.h> 43 #include <vm/pmap.h> 44 45 #include <machine/bus.h> 46 #include <machine/intr_machdep.h> 47 #include <machine/resource.h> 48 #include <machine/vmparam.h> 49 50 #include <dev/ofw/ofw_bus.h> 51 #include <dev/ofw/ofw_bus_subr.h> 52 #include <dev/ofw/openfirm.h> 53 54 #include <powerpc/powermac/maciovar.h> 55 #include <powerpc/powermac/platform_powermac.h> 56 57 #include <dev/pci/pcivar.h> 58 #include <dev/pci/pcireg.h> 59 60 /* 61 * Macio softc 62 */ 63 struct macio_softc { 64 phandle_t sc_node; 65 vm_offset_t sc_base; 66 vm_offset_t sc_size; 67 struct rman sc_mem_rman; 68 69 /* FCR registers */ 70 int sc_memrid; 71 struct resource *sc_memr; 72 73 /* GPIO offsets */ 74 int sc_timebase; 75 }; 76 77 static MALLOC_DEFINE(M_MACIO, "macio", "macio device information"); 78 79 static int macio_probe(device_t); 80 static int macio_attach(device_t); 81 static int macio_print_child(device_t dev, device_t child); 82 static void macio_probe_nomatch(device_t, device_t); 83 static struct rman *macio_get_rman(device_t, int, u_int); 84 static struct resource *macio_alloc_resource(device_t, device_t, int, int *, 85 rman_res_t, rman_res_t, rman_res_t, 86 u_int); 87 static int macio_adjust_resource(device_t, device_t, struct resource *, 88 rman_res_t, rman_res_t); 89 static int macio_activate_resource(device_t, device_t, struct resource *); 90 static int macio_deactivate_resource(device_t, device_t, struct resource *); 91 static int macio_release_resource(device_t, device_t, struct resource *); 92 static int macio_map_resource(device_t, device_t, struct resource *, 93 struct resource_map_request *, 94 struct resource_map *); 95 static int macio_unmap_resource(device_t, device_t, struct resource *, 96 struct resource_map *); 97 static struct resource_list *macio_get_resource_list (device_t, device_t); 98 static ofw_bus_get_devinfo_t macio_get_devinfo; 99 #if !defined(__powerpc64__) && defined(SMP) 100 static void macio_freeze_timebase(device_t, bool); 101 #endif 102 103 /* 104 * Bus interface definition 105 */ 106 static device_method_t macio_methods[] = { 107 /* Device interface */ 108 DEVMETHOD(device_probe, macio_probe), 109 DEVMETHOD(device_attach, macio_attach), 110 DEVMETHOD(device_detach, bus_generic_detach), 111 DEVMETHOD(device_shutdown, bus_generic_shutdown), 112 DEVMETHOD(device_suspend, bus_generic_suspend), 113 DEVMETHOD(device_resume, bus_generic_resume), 114 115 /* Bus interface */ 116 DEVMETHOD(bus_print_child, macio_print_child), 117 DEVMETHOD(bus_probe_nomatch, macio_probe_nomatch), 118 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 119 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 120 121 DEVMETHOD(bus_get_rman, macio_get_rman), 122 DEVMETHOD(bus_alloc_resource, macio_alloc_resource), 123 DEVMETHOD(bus_adjust_resource, macio_adjust_resource), 124 DEVMETHOD(bus_release_resource, macio_release_resource), 125 DEVMETHOD(bus_activate_resource, macio_activate_resource), 126 DEVMETHOD(bus_deactivate_resource, macio_deactivate_resource), 127 DEVMETHOD(bus_map_resource, macio_map_resource), 128 DEVMETHOD(bus_unmap_resource, macio_unmap_resource), 129 DEVMETHOD(bus_get_resource_list, macio_get_resource_list), 130 131 DEVMETHOD(bus_child_pnpinfo, ofw_bus_gen_child_pnpinfo), 132 133 /* ofw_bus interface */ 134 DEVMETHOD(ofw_bus_get_devinfo, macio_get_devinfo), 135 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 136 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 137 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 138 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 139 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 140 { 0, 0 } 141 }; 142 143 static driver_t macio_pci_driver = { 144 "macio", 145 macio_methods, 146 sizeof(struct macio_softc) 147 }; 148 149 EARLY_DRIVER_MODULE(macio, pci, macio_pci_driver, 0, 0, BUS_PASS_BUS); 150 151 /* 152 * PCI ID search table 153 */ 154 static struct macio_pci_dev { 155 u_int32_t mpd_devid; 156 char *mpd_desc; 157 } macio_pci_devlist[] = { 158 { 0x0017106b, "Paddington I/O Controller" }, 159 { 0x0022106b, "KeyLargo I/O Controller" }, 160 { 0x0025106b, "Pangea I/O Controller" }, 161 { 0x003e106b, "Intrepid I/O Controller" }, 162 { 0x0041106b, "K2 KeyLargo I/O Controller" }, 163 { 0x004f106b, "Shasta I/O Controller" }, 164 { 0, NULL } 165 }; 166 167 /* 168 * Devices to exclude from the probe 169 * XXX some of these may be required in the future... 170 */ 171 #define MACIO_QUIRK_IGNORE 0x00000001 172 #define MACIO_QUIRK_CHILD_HAS_INTR 0x00000002 173 #define MACIO_QUIRK_USE_CHILD_REG 0x00000004 174 175 struct macio_quirk_entry { 176 const char *mq_name; 177 int mq_quirks; 178 }; 179 180 static struct macio_quirk_entry macio_quirks[] = { 181 { "escc-legacy", MACIO_QUIRK_IGNORE }, 182 { "timer", MACIO_QUIRK_IGNORE }, 183 { "escc", MACIO_QUIRK_CHILD_HAS_INTR }, 184 { "i2s", MACIO_QUIRK_CHILD_HAS_INTR | 185 MACIO_QUIRK_USE_CHILD_REG }, 186 { NULL, 0 } 187 }; 188 189 static int 190 macio_get_quirks(const char *name) 191 { 192 struct macio_quirk_entry *mqe; 193 194 for (mqe = macio_quirks; mqe->mq_name != NULL; mqe++) 195 if (strcmp(name, mqe->mq_name) == 0) 196 return (mqe->mq_quirks); 197 return (0); 198 } 199 200 /* 201 * Add an interrupt to the dev's resource list if present 202 */ 203 static void 204 macio_add_intr(phandle_t devnode, struct macio_devinfo *dinfo) 205 { 206 phandle_t iparent; 207 int *intr; 208 int i, nintr; 209 int icells; 210 211 if (dinfo->mdi_ninterrupts >= 6) { 212 printf("macio: device has more than 6 interrupts\n"); 213 return; 214 } 215 216 nintr = OF_getprop_alloc_multi(devnode, "interrupts", sizeof(*intr), 217 (void **)&intr); 218 if (nintr == -1) { 219 nintr = OF_getprop_alloc_multi(devnode, "AAPL,interrupts", 220 sizeof(*intr), (void **)&intr); 221 if (nintr == -1) 222 return; 223 } 224 225 if (intr[0] == -1) 226 return; 227 228 if (OF_getprop(devnode, "interrupt-parent", &iparent, sizeof(iparent)) 229 <= 0) 230 panic("Interrupt but no interrupt parent!\n"); 231 232 if (OF_getprop(OF_node_from_xref(iparent), "#interrupt-cells", &icells, 233 sizeof(icells)) <= 0) 234 icells = 1; 235 236 for (i = 0; i < nintr; i+=icells) { 237 u_int irq = MAP_IRQ(iparent, intr[i]); 238 239 resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ, 240 dinfo->mdi_ninterrupts, irq, irq, 1); 241 242 dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = irq; 243 dinfo->mdi_ninterrupts++; 244 } 245 } 246 247 static void 248 macio_add_reg(phandle_t devnode, struct macio_devinfo *dinfo) 249 { 250 struct macio_reg *reg, *regp; 251 phandle_t child; 252 char buf[8]; 253 int i, layout_id = 0, nreg, res; 254 255 nreg = OF_getprop_alloc_multi(devnode, "reg", sizeof(*reg), (void **)®); 256 if (nreg == -1) 257 return; 258 259 /* 260 * Some G5's have broken properties in the i2s-a area. If so we try 261 * to fix it. Right now we know of two different cases, one for 262 * sound layout-id 36 and the other one for sound layout-id 76. 263 * What is missing is the base address for the memory addresses. 264 * We take them from the parent node (i2s) and use the size 265 * information from the child. 266 */ 267 268 if (reg[0].mr_base == 0) { 269 child = OF_child(devnode); 270 while (child != 0) { 271 res = OF_getprop(child, "name", buf, sizeof(buf)); 272 if (res > 0 && strcmp(buf, "sound") == 0) 273 break; 274 child = OF_peer(child); 275 } 276 277 res = OF_getprop(child, "layout-id", &layout_id, 278 sizeof(layout_id)); 279 280 if (res > 0 && (layout_id == 36 || layout_id == 76)) { 281 res = OF_getprop_alloc_multi(OF_parent(devnode), "reg", 282 sizeof(*regp), (void **)®p); 283 reg[0] = regp[0]; 284 reg[1].mr_base = regp[1].mr_base; 285 reg[2].mr_base = regp[1].mr_base + reg[1].mr_size; 286 } 287 } 288 289 for (i = 0; i < nreg; i++) { 290 resource_list_add(&dinfo->mdi_resources, SYS_RES_MEMORY, i, 291 reg[i].mr_base, reg[i].mr_base + reg[i].mr_size, 292 reg[i].mr_size); 293 } 294 } 295 296 /* 297 * PCI probe 298 */ 299 static int 300 macio_probe(device_t dev) 301 { 302 int i; 303 u_int32_t devid; 304 305 devid = pci_get_devid(dev); 306 for (i = 0; macio_pci_devlist[i].mpd_desc != NULL; i++) { 307 if (devid == macio_pci_devlist[i].mpd_devid) { 308 device_set_desc(dev, macio_pci_devlist[i].mpd_desc); 309 return (0); 310 } 311 } 312 313 return (ENXIO); 314 } 315 316 /* 317 * PCI attach: scan Open Firmware child nodes, and attach these as children 318 * of the macio bus 319 */ 320 static int 321 macio_attach(device_t dev) 322 { 323 struct macio_softc *sc; 324 struct macio_devinfo *dinfo; 325 phandle_t root; 326 phandle_t child; 327 phandle_t subchild; 328 device_t cdev; 329 u_int reg[3]; 330 char compat[32]; 331 int error, quirks; 332 333 sc = device_get_softc(dev); 334 root = sc->sc_node = ofw_bus_get_node(dev); 335 336 /* 337 * Locate the device node and it's base address 338 */ 339 if (OF_getprop(root, "assigned-addresses", 340 reg, sizeof(reg)) < (ssize_t)sizeof(reg)) { 341 return (ENXIO); 342 } 343 344 /* Used later to see if we have to enable the I2S part. */ 345 OF_getprop(root, "compatible", compat, sizeof(compat)); 346 347 sc->sc_base = reg[2]; 348 sc->sc_size = MACIO_REG_SIZE; 349 350 sc->sc_memrid = PCIR_BAR(0); 351 sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 352 &sc->sc_memrid, RF_ACTIVE); 353 354 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 355 sc->sc_mem_rman.rm_descr = "MacIO Device Memory"; 356 error = rman_init(&sc->sc_mem_rman); 357 if (error) { 358 device_printf(dev, "rman_init() failed. error = %d\n", error); 359 return (error); 360 } 361 error = rman_manage_region(&sc->sc_mem_rman, 0, sc->sc_size); 362 if (error) { 363 device_printf(dev, 364 "rman_manage_region() failed. error = %d\n", error); 365 return (error); 366 } 367 368 /* 369 * Iterate through the sub-devices 370 */ 371 for (child = OF_child(root); child != 0; child = OF_peer(child)) { 372 dinfo = malloc(sizeof(*dinfo), M_MACIO, M_WAITOK | M_ZERO); 373 if (ofw_bus_gen_setup_devinfo(&dinfo->mdi_obdinfo, child) != 374 0) { 375 free(dinfo, M_MACIO); 376 continue; 377 } 378 quirks = macio_get_quirks(dinfo->mdi_obdinfo.obd_name); 379 if ((quirks & MACIO_QUIRK_IGNORE) != 0) { 380 ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); 381 free(dinfo, M_MACIO); 382 continue; 383 } 384 resource_list_init(&dinfo->mdi_resources); 385 dinfo->mdi_ninterrupts = 0; 386 macio_add_intr(child, dinfo); 387 if ((quirks & MACIO_QUIRK_USE_CHILD_REG) != 0) 388 macio_add_reg(OF_child(child), dinfo); 389 else 390 macio_add_reg(child, dinfo); 391 if ((quirks & MACIO_QUIRK_CHILD_HAS_INTR) != 0) 392 for (subchild = OF_child(child); subchild != 0; 393 subchild = OF_peer(subchild)) 394 macio_add_intr(subchild, dinfo); 395 cdev = device_add_child(dev, NULL, DEVICE_UNIT_ANY); 396 if (cdev == NULL) { 397 device_printf(dev, "<%s>: device_add_child failed\n", 398 dinfo->mdi_obdinfo.obd_name); 399 resource_list_free(&dinfo->mdi_resources); 400 ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); 401 free(dinfo, M_MACIO); 402 continue; 403 } 404 device_set_ivars(cdev, dinfo); 405 406 /* Set FCRs to enable some devices */ 407 if (sc->sc_memr == NULL) 408 continue; 409 410 if (strcmp(ofw_bus_get_name(cdev), "bmac") == 0 || 411 (ofw_bus_get_compat(cdev) != NULL && 412 strcmp(ofw_bus_get_compat(cdev), "bmac+") == 0)) { 413 uint32_t fcr; 414 415 fcr = bus_read_4(sc->sc_memr, HEATHROW_FCR); 416 417 fcr |= FCR_ENET_ENABLE & ~FCR_ENET_RESET; 418 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 419 DELAY(50000); 420 fcr |= FCR_ENET_RESET; 421 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 422 DELAY(50000); 423 fcr &= ~FCR_ENET_RESET; 424 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 425 DELAY(50000); 426 427 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 428 } 429 430 /* 431 * Make sure the I2S0 and the I2S0_CLK are enabled. 432 * On certain G5's they are not. 433 */ 434 if ((strcmp(ofw_bus_get_name(cdev), "i2s") == 0) && 435 (strcmp(compat, "K2-Keylargo") == 0)) { 436 uint32_t fcr1; 437 438 fcr1 = bus_read_4(sc->sc_memr, KEYLARGO_FCR1); 439 fcr1 |= FCR1_I2S0_CLK_ENABLE | FCR1_I2S0_ENABLE; 440 bus_write_4(sc->sc_memr, KEYLARGO_FCR1, fcr1); 441 } 442 } 443 444 #if !defined(__powerpc64__) && defined(SMP) 445 /* 446 * Detect an SMP G4 machine. 447 * 448 * On SMP G4, timebase freeze is via a GPIO on macio. 449 * 450 * When we are on an SMP G4, we need to install a handler to 451 * perform timebase freeze/unfreeze on behalf of the platform. 452 */ 453 if ((child = OF_finddevice("/cpus/PowerPC,G4@0")) != -1 && 454 OF_peer(child) != -1) { 455 if (OF_getprop(child, "timebase-enable", &sc->sc_timebase, 456 sizeof(sc->sc_timebase)) <= 0) 457 sc->sc_timebase = KEYLARGO_GPIO_BASE + 0x09; 458 powermac_register_timebase(dev, macio_freeze_timebase); 459 device_printf(dev, "GPIO timebase control at 0x%x\n", 460 sc->sc_timebase); 461 } 462 #endif 463 464 bus_attach_children(dev); 465 return (0); 466 } 467 468 static int 469 macio_print_child(device_t dev, device_t child) 470 { 471 struct macio_devinfo *dinfo; 472 struct resource_list *rl; 473 int retval = 0; 474 475 dinfo = device_get_ivars(child); 476 rl = &dinfo->mdi_resources; 477 478 retval += bus_print_child_header(dev, child); 479 480 retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); 481 retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); 482 483 retval += bus_print_child_footer(dev, child); 484 485 return (retval); 486 } 487 488 static void 489 macio_probe_nomatch(device_t dev, device_t child) 490 { 491 struct macio_devinfo *dinfo; 492 struct resource_list *rl; 493 const char *type; 494 495 if (bootverbose) { 496 dinfo = device_get_ivars(child); 497 rl = &dinfo->mdi_resources; 498 499 if ((type = ofw_bus_get_type(child)) == NULL) 500 type = "(unknown)"; 501 device_printf(dev, "<%s, %s>", type, ofw_bus_get_name(child)); 502 resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); 503 resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); 504 printf(" (no driver attached)\n"); 505 } 506 } 507 508 static struct rman * 509 macio_get_rman(device_t bus, int type, u_int flags) 510 { 511 struct macio_softc *sc; 512 513 sc = device_get_softc(bus); 514 switch (type) { 515 case SYS_RES_MEMORY: 516 case SYS_RES_IOPORT: 517 return (&sc->sc_mem_rman); 518 default: 519 return (NULL); 520 } 521 } 522 523 static struct resource * 524 macio_alloc_resource(device_t bus, device_t child, int type, int *rid, 525 rman_res_t start, rman_res_t end, rman_res_t count, 526 u_int flags) 527 { 528 rman_res_t adjstart, adjend, adjcount; 529 struct macio_devinfo *dinfo; 530 struct resource_list_entry *rle; 531 532 dinfo = device_get_ivars(child); 533 534 switch (type) { 535 case SYS_RES_MEMORY: 536 case SYS_RES_IOPORT: 537 rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_MEMORY, 538 *rid); 539 if (rle == NULL) { 540 device_printf(bus, "no rle for %s memory %d\n", 541 device_get_nameunit(child), *rid); 542 return (NULL); 543 } 544 545 if (start < rle->start) 546 adjstart = rle->start; 547 else if (start > rle->end) 548 adjstart = rle->end; 549 else 550 adjstart = start; 551 552 if (end < rle->start) 553 adjend = rle->start; 554 else if (end > rle->end) 555 adjend = rle->end; 556 else 557 adjend = end; 558 559 adjcount = adjend - adjstart; 560 561 return (bus_generic_rman_alloc_resource(bus, child, type, rid, 562 adjstart, adjend, adjcount, flags)); 563 564 case SYS_RES_IRQ: 565 /* Check for passthrough from subattachments like macgpio */ 566 if (device_get_parent(child) != bus) 567 return BUS_ALLOC_RESOURCE(device_get_parent(bus), child, 568 type, rid, start, end, count, flags); 569 570 rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_IRQ, 571 *rid); 572 if (rle == NULL) { 573 if (dinfo->mdi_ninterrupts >= 6) { 574 device_printf(bus, 575 "%s has more than 6 interrupts\n", 576 device_get_nameunit(child)); 577 return (NULL); 578 } 579 resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ, 580 dinfo->mdi_ninterrupts, start, start, 1); 581 582 dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = start; 583 dinfo->mdi_ninterrupts++; 584 } 585 586 return (resource_list_alloc(&dinfo->mdi_resources, bus, child, 587 type, rid, start, end, count, flags)); 588 589 default: 590 device_printf(bus, "unknown resource request from %s\n", 591 device_get_nameunit(child)); 592 return (NULL); 593 } 594 } 595 596 static int 597 macio_adjust_resource(device_t bus, device_t child, struct resource *r, 598 rman_res_t start, rman_res_t end) 599 { 600 switch (rman_get_type(r)) { 601 case SYS_RES_IOPORT: 602 case SYS_RES_MEMORY: 603 return (bus_generic_rman_adjust_resource(bus, child, r, start, 604 end)); 605 case SYS_RES_IRQ: 606 return (bus_generic_adjust_resource(bus, child, r, start, end)); 607 default: 608 return (EINVAL); 609 } 610 } 611 612 static int 613 macio_release_resource(device_t bus, device_t child, struct resource *res) 614 { 615 switch (rman_get_type(res)) { 616 case SYS_RES_IOPORT: 617 case SYS_RES_MEMORY: 618 return (bus_generic_rman_release_resource(bus, child, res)); 619 case SYS_RES_IRQ: 620 return (bus_generic_rl_release_resource(bus, child, res)); 621 default: 622 return (EINVAL); 623 } 624 } 625 626 static int 627 macio_activate_resource(device_t bus, device_t child, struct resource *res) 628 { 629 switch (rman_get_type(res)) { 630 case SYS_RES_IOPORT: 631 case SYS_RES_MEMORY: 632 return (bus_generic_rman_activate_resource(bus, child, res)); 633 case SYS_RES_IRQ: 634 return (bus_generic_activate_resource(bus, child, res)); 635 default: 636 return (EINVAL); 637 } 638 } 639 640 static int 641 macio_deactivate_resource(device_t bus, device_t child, struct resource *res) 642 { 643 switch (rman_get_type(res)) { 644 case SYS_RES_IOPORT: 645 case SYS_RES_MEMORY: 646 return (bus_generic_rman_deactivate_resource(bus, child, res)); 647 case SYS_RES_IRQ: 648 return (bus_generic_deactivate_resource(bus, child, res)); 649 default: 650 return (EINVAL); 651 } 652 } 653 654 static int 655 macio_map_resource(device_t bus, device_t child, struct resource *r, 656 struct resource_map_request *argsp, struct resource_map *map) 657 { 658 struct resource_map_request args; 659 struct macio_softc *sc; 660 rman_res_t length, start; 661 int error; 662 663 /* Resources must be active to be mapped. */ 664 if (!(rman_get_flags(r) & RF_ACTIVE)) 665 return (ENXIO); 666 667 /* Mappings are only supported on I/O and memory resources. */ 668 switch (rman_get_type(r)) { 669 case SYS_RES_IOPORT: 670 case SYS_RES_MEMORY: 671 break; 672 default: 673 return (EINVAL); 674 } 675 676 resource_init_map_request(&args); 677 error = resource_validate_map_request(r, argsp, &args, &start, &length); 678 if (error) 679 return (error); 680 681 if (bootverbose) 682 printf("nexus mapdev: start %jx, len %jd\n", 683 (uintmax_t)start, (uintmax_t)length); 684 685 sc = device_get_softc(bus); 686 map->r_vaddr = pmap_mapdev_attr((vm_paddr_t)start + sc->sc_base, 687 length, args.memattr); 688 if (map->r_vaddr == NULL) 689 return (ENOMEM); 690 map->r_size = length; 691 map->r_bustag = &bs_le_tag; 692 map->r_bushandle = (bus_space_handle_t)map->r_vaddr; 693 return (0); 694 } 695 696 static int 697 macio_unmap_resource(device_t bus, device_t child, struct resource *r, 698 struct resource_map *map) 699 { 700 /* 701 * If this is a memory resource, unmap it. 702 */ 703 switch (rman_get_type(r)) { 704 case SYS_RES_IOPORT: 705 case SYS_RES_MEMORY: 706 pmap_unmapdev(map->r_vaddr, map->r_size); 707 break; 708 default: 709 return (EINVAL); 710 } 711 return (0); 712 } 713 714 static struct resource_list * 715 macio_get_resource_list (device_t dev, device_t child) 716 { 717 struct macio_devinfo *dinfo; 718 719 dinfo = device_get_ivars(child); 720 return (&dinfo->mdi_resources); 721 } 722 723 static const struct ofw_bus_devinfo * 724 macio_get_devinfo(device_t dev, device_t child) 725 { 726 struct macio_devinfo *dinfo; 727 728 dinfo = device_get_ivars(child); 729 return (&dinfo->mdi_obdinfo); 730 } 731 732 int 733 macio_enable_wireless(device_t dev, bool enable) 734 { 735 struct macio_softc *sc = device_get_softc(dev); 736 uint32_t x; 737 738 if (enable) { 739 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 740 x |= 0x4; 741 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 742 743 /* Enable card slot. */ 744 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 5); 745 DELAY(1000); 746 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 4); 747 DELAY(1000); 748 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 749 x &= ~0x80000000; 750 751 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 752 /* out8(gpio + 0x10, 4); */ 753 754 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0b, 0); 755 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0a, 0x28); 756 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0d, 0x28); 757 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0d, 0x28); 758 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0e, 0x28); 759 bus_write_4(sc->sc_memr, 0x1c000, 0); 760 761 /* Initialize the card. */ 762 bus_write_4(sc->sc_memr, 0x1a3e0, 0x41); 763 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 764 x |= 0x80000000; 765 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 766 } else { 767 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 768 x &= ~0x4; 769 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 770 /* out8(gpio + 0x10, 0); */ 771 } 772 773 return (0); 774 } 775 776 #if !defined(__powerpc64__) && defined(SMP) 777 static void 778 macio_freeze_timebase(device_t dev, bool freeze) 779 { 780 struct macio_softc *sc = device_get_softc(dev); 781 782 if (freeze) { 783 bus_write_1(sc->sc_memr, sc->sc_timebase, 4); 784 } else { 785 bus_write_1(sc->sc_memr, sc->sc_timebase, 0); 786 } 787 bus_read_1(sc->sc_memr, sc->sc_timebase); 788 } 789 #endif 790