1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright 2002 by Peter Grehan. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 * 29 * $FreeBSD$ 30 */ 31 32 /* 33 * Driver for KeyLargo/Pangea, the MacPPC south bridge ASIC. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/kernel.h> 39 #include <sys/malloc.h> 40 #include <sys/module.h> 41 #include <sys/bus.h> 42 #include <sys/rman.h> 43 44 #include <vm/vm.h> 45 #include <vm/pmap.h> 46 47 #include <machine/bus.h> 48 #include <machine/intr_machdep.h> 49 #include <machine/resource.h> 50 #include <machine/vmparam.h> 51 52 #include <dev/ofw/ofw_bus.h> 53 #include <dev/ofw/ofw_bus_subr.h> 54 #include <dev/ofw/openfirm.h> 55 56 #include <powerpc/powermac/maciovar.h> 57 #include <powerpc/powermac/platform_powermac.h> 58 59 #include <dev/pci/pcivar.h> 60 #include <dev/pci/pcireg.h> 61 62 /* 63 * Macio softc 64 */ 65 struct macio_softc { 66 phandle_t sc_node; 67 vm_offset_t sc_base; 68 vm_offset_t sc_size; 69 struct rman sc_mem_rman; 70 71 /* FCR registers */ 72 int sc_memrid; 73 struct resource *sc_memr; 74 75 /* GPIO offsets */ 76 int sc_timebase; 77 }; 78 79 static MALLOC_DEFINE(M_MACIO, "macio", "macio device information"); 80 81 static int macio_probe(device_t); 82 static int macio_attach(device_t); 83 static int macio_print_child(device_t dev, device_t child); 84 static void macio_probe_nomatch(device_t, device_t); 85 static struct resource *macio_alloc_resource(device_t, device_t, int, int *, 86 rman_res_t, rman_res_t, rman_res_t, 87 u_int); 88 static int macio_activate_resource(device_t, device_t, int, int, 89 struct resource *); 90 static int macio_deactivate_resource(device_t, device_t, int, int, 91 struct resource *); 92 static int macio_release_resource(device_t, device_t, int, int, 93 struct resource *); 94 static struct resource_list *macio_get_resource_list (device_t, device_t); 95 static ofw_bus_get_devinfo_t macio_get_devinfo; 96 #if !defined(__powerpc64__) && defined(SMP) 97 static void macio_freeze_timebase(device_t, bool); 98 #endif 99 100 /* 101 * Bus interface definition 102 */ 103 static device_method_t macio_methods[] = { 104 /* Device interface */ 105 DEVMETHOD(device_probe, macio_probe), 106 DEVMETHOD(device_attach, macio_attach), 107 DEVMETHOD(device_detach, bus_generic_detach), 108 DEVMETHOD(device_shutdown, bus_generic_shutdown), 109 DEVMETHOD(device_suspend, bus_generic_suspend), 110 DEVMETHOD(device_resume, bus_generic_resume), 111 112 /* Bus interface */ 113 DEVMETHOD(bus_print_child, macio_print_child), 114 DEVMETHOD(bus_probe_nomatch, macio_probe_nomatch), 115 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 116 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 117 118 DEVMETHOD(bus_alloc_resource, macio_alloc_resource), 119 DEVMETHOD(bus_release_resource, macio_release_resource), 120 DEVMETHOD(bus_activate_resource, macio_activate_resource), 121 DEVMETHOD(bus_deactivate_resource, macio_deactivate_resource), 122 DEVMETHOD(bus_get_resource_list, macio_get_resource_list), 123 124 DEVMETHOD(bus_child_pnpinfo, ofw_bus_gen_child_pnpinfo), 125 126 /* ofw_bus interface */ 127 DEVMETHOD(ofw_bus_get_devinfo, macio_get_devinfo), 128 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 129 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 130 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 131 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 132 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 133 { 0, 0 } 134 }; 135 136 static driver_t macio_pci_driver = { 137 "macio", 138 macio_methods, 139 sizeof(struct macio_softc) 140 }; 141 142 EARLY_DRIVER_MODULE(macio, pci, macio_pci_driver, 0, 0, BUS_PASS_BUS); 143 144 /* 145 * PCI ID search table 146 */ 147 static struct macio_pci_dev { 148 u_int32_t mpd_devid; 149 char *mpd_desc; 150 } macio_pci_devlist[] = { 151 { 0x0017106b, "Paddington I/O Controller" }, 152 { 0x0022106b, "KeyLargo I/O Controller" }, 153 { 0x0025106b, "Pangea I/O Controller" }, 154 { 0x003e106b, "Intrepid I/O Controller" }, 155 { 0x0041106b, "K2 KeyLargo I/O Controller" }, 156 { 0x004f106b, "Shasta I/O Controller" }, 157 { 0, NULL } 158 }; 159 160 /* 161 * Devices to exclude from the probe 162 * XXX some of these may be required in the future... 163 */ 164 #define MACIO_QUIRK_IGNORE 0x00000001 165 #define MACIO_QUIRK_CHILD_HAS_INTR 0x00000002 166 #define MACIO_QUIRK_USE_CHILD_REG 0x00000004 167 168 struct macio_quirk_entry { 169 const char *mq_name; 170 int mq_quirks; 171 }; 172 173 static struct macio_quirk_entry macio_quirks[] = { 174 { "escc-legacy", MACIO_QUIRK_IGNORE }, 175 { "timer", MACIO_QUIRK_IGNORE }, 176 { "escc", MACIO_QUIRK_CHILD_HAS_INTR }, 177 { "i2s", MACIO_QUIRK_CHILD_HAS_INTR | 178 MACIO_QUIRK_USE_CHILD_REG }, 179 { NULL, 0 } 180 }; 181 182 static int 183 macio_get_quirks(const char *name) 184 { 185 struct macio_quirk_entry *mqe; 186 187 for (mqe = macio_quirks; mqe->mq_name != NULL; mqe++) 188 if (strcmp(name, mqe->mq_name) == 0) 189 return (mqe->mq_quirks); 190 return (0); 191 } 192 193 /* 194 * Add an interrupt to the dev's resource list if present 195 */ 196 static void 197 macio_add_intr(phandle_t devnode, struct macio_devinfo *dinfo) 198 { 199 phandle_t iparent; 200 int *intr; 201 int i, nintr; 202 int icells; 203 204 if (dinfo->mdi_ninterrupts >= 6) { 205 printf("macio: device has more than 6 interrupts\n"); 206 return; 207 } 208 209 nintr = OF_getprop_alloc_multi(devnode, "interrupts", sizeof(*intr), 210 (void **)&intr); 211 if (nintr == -1) { 212 nintr = OF_getprop_alloc_multi(devnode, "AAPL,interrupts", 213 sizeof(*intr), (void **)&intr); 214 if (nintr == -1) 215 return; 216 } 217 218 if (intr[0] == -1) 219 return; 220 221 if (OF_getprop(devnode, "interrupt-parent", &iparent, sizeof(iparent)) 222 <= 0) 223 panic("Interrupt but no interrupt parent!\n"); 224 225 if (OF_getprop(OF_node_from_xref(iparent), "#interrupt-cells", &icells, 226 sizeof(icells)) <= 0) 227 icells = 1; 228 229 for (i = 0; i < nintr; i+=icells) { 230 u_int irq = MAP_IRQ(iparent, intr[i]); 231 232 resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ, 233 dinfo->mdi_ninterrupts, irq, irq, 1); 234 235 dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = irq; 236 dinfo->mdi_ninterrupts++; 237 } 238 } 239 240 static void 241 macio_add_reg(phandle_t devnode, struct macio_devinfo *dinfo) 242 { 243 struct macio_reg *reg, *regp; 244 phandle_t child; 245 char buf[8]; 246 int i, layout_id = 0, nreg, res; 247 248 nreg = OF_getprop_alloc_multi(devnode, "reg", sizeof(*reg), (void **)®); 249 if (nreg == -1) 250 return; 251 252 /* 253 * Some G5's have broken properties in the i2s-a area. If so we try 254 * to fix it. Right now we know of two different cases, one for 255 * sound layout-id 36 and the other one for sound layout-id 76. 256 * What is missing is the base address for the memory addresses. 257 * We take them from the parent node (i2s) and use the size 258 * information from the child. 259 */ 260 261 if (reg[0].mr_base == 0) { 262 child = OF_child(devnode); 263 while (child != 0) { 264 res = OF_getprop(child, "name", buf, sizeof(buf)); 265 if (res > 0 && strcmp(buf, "sound") == 0) 266 break; 267 child = OF_peer(child); 268 } 269 270 res = OF_getprop(child, "layout-id", &layout_id, 271 sizeof(layout_id)); 272 273 if (res > 0 && (layout_id == 36 || layout_id == 76)) { 274 res = OF_getprop_alloc_multi(OF_parent(devnode), "reg", 275 sizeof(*regp), (void **)®p); 276 reg[0] = regp[0]; 277 reg[1].mr_base = regp[1].mr_base; 278 reg[2].mr_base = regp[1].mr_base + reg[1].mr_size; 279 } 280 } 281 282 for (i = 0; i < nreg; i++) { 283 resource_list_add(&dinfo->mdi_resources, SYS_RES_MEMORY, i, 284 reg[i].mr_base, reg[i].mr_base + reg[i].mr_size, 285 reg[i].mr_size); 286 } 287 } 288 289 /* 290 * PCI probe 291 */ 292 static int 293 macio_probe(device_t dev) 294 { 295 int i; 296 u_int32_t devid; 297 298 devid = pci_get_devid(dev); 299 for (i = 0; macio_pci_devlist[i].mpd_desc != NULL; i++) { 300 if (devid == macio_pci_devlist[i].mpd_devid) { 301 device_set_desc(dev, macio_pci_devlist[i].mpd_desc); 302 return (0); 303 } 304 } 305 306 return (ENXIO); 307 } 308 309 /* 310 * PCI attach: scan Open Firmware child nodes, and attach these as children 311 * of the macio bus 312 */ 313 static int 314 macio_attach(device_t dev) 315 { 316 struct macio_softc *sc; 317 struct macio_devinfo *dinfo; 318 phandle_t root; 319 phandle_t child; 320 phandle_t subchild; 321 device_t cdev; 322 u_int reg[3]; 323 char compat[32]; 324 int error, quirks; 325 326 sc = device_get_softc(dev); 327 root = sc->sc_node = ofw_bus_get_node(dev); 328 329 /* 330 * Locate the device node and it's base address 331 */ 332 if (OF_getprop(root, "assigned-addresses", 333 reg, sizeof(reg)) < (ssize_t)sizeof(reg)) { 334 return (ENXIO); 335 } 336 337 /* Used later to see if we have to enable the I2S part. */ 338 OF_getprop(root, "compatible", compat, sizeof(compat)); 339 340 sc->sc_base = reg[2]; 341 sc->sc_size = MACIO_REG_SIZE; 342 343 sc->sc_memrid = PCIR_BAR(0); 344 sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 345 &sc->sc_memrid, RF_ACTIVE); 346 347 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 348 sc->sc_mem_rman.rm_descr = "MacIO Device Memory"; 349 error = rman_init(&sc->sc_mem_rman); 350 if (error) { 351 device_printf(dev, "rman_init() failed. error = %d\n", error); 352 return (error); 353 } 354 error = rman_manage_region(&sc->sc_mem_rman, 0, sc->sc_size); 355 if (error) { 356 device_printf(dev, 357 "rman_manage_region() failed. error = %d\n", error); 358 return (error); 359 } 360 361 /* 362 * Iterate through the sub-devices 363 */ 364 for (child = OF_child(root); child != 0; child = OF_peer(child)) { 365 dinfo = malloc(sizeof(*dinfo), M_MACIO, M_WAITOK | M_ZERO); 366 if (ofw_bus_gen_setup_devinfo(&dinfo->mdi_obdinfo, child) != 367 0) { 368 free(dinfo, M_MACIO); 369 continue; 370 } 371 quirks = macio_get_quirks(dinfo->mdi_obdinfo.obd_name); 372 if ((quirks & MACIO_QUIRK_IGNORE) != 0) { 373 ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); 374 free(dinfo, M_MACIO); 375 continue; 376 } 377 resource_list_init(&dinfo->mdi_resources); 378 dinfo->mdi_ninterrupts = 0; 379 macio_add_intr(child, dinfo); 380 if ((quirks & MACIO_QUIRK_USE_CHILD_REG) != 0) 381 macio_add_reg(OF_child(child), dinfo); 382 else 383 macio_add_reg(child, dinfo); 384 if ((quirks & MACIO_QUIRK_CHILD_HAS_INTR) != 0) 385 for (subchild = OF_child(child); subchild != 0; 386 subchild = OF_peer(subchild)) 387 macio_add_intr(subchild, dinfo); 388 cdev = device_add_child(dev, NULL, -1); 389 if (cdev == NULL) { 390 device_printf(dev, "<%s>: device_add_child failed\n", 391 dinfo->mdi_obdinfo.obd_name); 392 resource_list_free(&dinfo->mdi_resources); 393 ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); 394 free(dinfo, M_MACIO); 395 continue; 396 } 397 device_set_ivars(cdev, dinfo); 398 399 /* Set FCRs to enable some devices */ 400 if (sc->sc_memr == NULL) 401 continue; 402 403 if (strcmp(ofw_bus_get_name(cdev), "bmac") == 0 || 404 (ofw_bus_get_compat(cdev) != NULL && 405 strcmp(ofw_bus_get_compat(cdev), "bmac+") == 0)) { 406 uint32_t fcr; 407 408 fcr = bus_read_4(sc->sc_memr, HEATHROW_FCR); 409 410 fcr |= FCR_ENET_ENABLE & ~FCR_ENET_RESET; 411 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 412 DELAY(50000); 413 fcr |= FCR_ENET_RESET; 414 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 415 DELAY(50000); 416 fcr &= ~FCR_ENET_RESET; 417 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 418 DELAY(50000); 419 420 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 421 } 422 423 /* 424 * Make sure the I2S0 and the I2S0_CLK are enabled. 425 * On certain G5's they are not. 426 */ 427 if ((strcmp(ofw_bus_get_name(cdev), "i2s") == 0) && 428 (strcmp(compat, "K2-Keylargo") == 0)) { 429 uint32_t fcr1; 430 431 fcr1 = bus_read_4(sc->sc_memr, KEYLARGO_FCR1); 432 fcr1 |= FCR1_I2S0_CLK_ENABLE | FCR1_I2S0_ENABLE; 433 bus_write_4(sc->sc_memr, KEYLARGO_FCR1, fcr1); 434 } 435 } 436 437 #if !defined(__powerpc64__) && defined(SMP) 438 /* 439 * Detect an SMP G4 machine. 440 * 441 * On SMP G4, timebase freeze is via a GPIO on macio. 442 * 443 * When we are on an SMP G4, we need to install a handler to 444 * perform timebase freeze/unfreeze on behalf of the platform. 445 */ 446 if ((child = OF_finddevice("/cpus/PowerPC,G4@0")) != -1 && 447 OF_peer(child) != -1) { 448 if (OF_getprop(child, "timebase-enable", &sc->sc_timebase, 449 sizeof(sc->sc_timebase)) <= 0) 450 sc->sc_timebase = KEYLARGO_GPIO_BASE + 0x09; 451 powermac_register_timebase(dev, macio_freeze_timebase); 452 device_printf(dev, "GPIO timebase control at 0x%x\n", 453 sc->sc_timebase); 454 } 455 #endif 456 457 return (bus_generic_attach(dev)); 458 } 459 460 static int 461 macio_print_child(device_t dev, device_t child) 462 { 463 struct macio_devinfo *dinfo; 464 struct resource_list *rl; 465 int retval = 0; 466 467 dinfo = device_get_ivars(child); 468 rl = &dinfo->mdi_resources; 469 470 retval += bus_print_child_header(dev, child); 471 472 retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); 473 retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); 474 475 retval += bus_print_child_footer(dev, child); 476 477 return (retval); 478 } 479 480 static void 481 macio_probe_nomatch(device_t dev, device_t child) 482 { 483 struct macio_devinfo *dinfo; 484 struct resource_list *rl; 485 const char *type; 486 487 if (bootverbose) { 488 dinfo = device_get_ivars(child); 489 rl = &dinfo->mdi_resources; 490 491 if ((type = ofw_bus_get_type(child)) == NULL) 492 type = "(unknown)"; 493 device_printf(dev, "<%s, %s>", type, ofw_bus_get_name(child)); 494 resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#jx"); 495 resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%jd"); 496 printf(" (no driver attached)\n"); 497 } 498 } 499 500 static struct resource * 501 macio_alloc_resource(device_t bus, device_t child, int type, int *rid, 502 rman_res_t start, rman_res_t end, rman_res_t count, 503 u_int flags) 504 { 505 struct macio_softc *sc; 506 int needactivate; 507 struct resource *rv; 508 struct rman *rm; 509 u_long adjstart, adjend, adjcount; 510 struct macio_devinfo *dinfo; 511 struct resource_list_entry *rle; 512 513 sc = device_get_softc(bus); 514 dinfo = device_get_ivars(child); 515 516 needactivate = flags & RF_ACTIVE; 517 flags &= ~RF_ACTIVE; 518 519 switch (type) { 520 case SYS_RES_MEMORY: 521 case SYS_RES_IOPORT: 522 rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_MEMORY, 523 *rid); 524 if (rle == NULL) { 525 device_printf(bus, "no rle for %s memory %d\n", 526 device_get_nameunit(child), *rid); 527 return (NULL); 528 } 529 530 if (start < rle->start) 531 adjstart = rle->start; 532 else if (start > rle->end) 533 adjstart = rle->end; 534 else 535 adjstart = start; 536 537 if (end < rle->start) 538 adjend = rle->start; 539 else if (end > rle->end) 540 adjend = rle->end; 541 else 542 adjend = end; 543 544 adjcount = adjend - adjstart; 545 546 rm = &sc->sc_mem_rman; 547 break; 548 549 case SYS_RES_IRQ: 550 /* Check for passthrough from subattachments like macgpio */ 551 if (device_get_parent(child) != bus) 552 return BUS_ALLOC_RESOURCE(device_get_parent(bus), child, 553 type, rid, start, end, count, flags); 554 555 rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_IRQ, 556 *rid); 557 if (rle == NULL) { 558 if (dinfo->mdi_ninterrupts >= 6) { 559 device_printf(bus, 560 "%s has more than 6 interrupts\n", 561 device_get_nameunit(child)); 562 return (NULL); 563 } 564 resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ, 565 dinfo->mdi_ninterrupts, start, start, 1); 566 567 dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = start; 568 dinfo->mdi_ninterrupts++; 569 } 570 571 return (resource_list_alloc(&dinfo->mdi_resources, bus, child, 572 type, rid, start, end, count, flags)); 573 574 default: 575 device_printf(bus, "unknown resource request from %s\n", 576 device_get_nameunit(child)); 577 return (NULL); 578 } 579 580 rv = rman_reserve_resource(rm, adjstart, adjend, adjcount, flags, 581 child); 582 if (rv == NULL) { 583 device_printf(bus, 584 "failed to reserve resource %#lx - %#lx (%#lx) for %s\n", 585 adjstart, adjend, adjcount, device_get_nameunit(child)); 586 return (NULL); 587 } 588 589 rman_set_rid(rv, *rid); 590 591 if (needactivate) { 592 if (bus_activate_resource(child, type, *rid, rv) != 0) { 593 device_printf(bus, 594 "failed to activate resource for %s\n", 595 device_get_nameunit(child)); 596 rman_release_resource(rv); 597 return (NULL); 598 } 599 } 600 601 return (rv); 602 } 603 604 static int 605 macio_release_resource(device_t bus, device_t child, int type, int rid, 606 struct resource *res) 607 { 608 if (rman_get_flags(res) & RF_ACTIVE) { 609 int error = bus_deactivate_resource(child, type, rid, res); 610 if (error) 611 return error; 612 } 613 614 return (rman_release_resource(res)); 615 } 616 617 static int 618 macio_activate_resource(device_t bus, device_t child, int type, int rid, 619 struct resource *res) 620 { 621 struct macio_softc *sc; 622 void *p; 623 624 sc = device_get_softc(bus); 625 626 if (type == SYS_RES_IRQ) 627 return (bus_activate_resource(bus, type, rid, res)); 628 629 if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { 630 p = pmap_mapdev((vm_offset_t)rman_get_start(res) + sc->sc_base, 631 (vm_size_t)rman_get_size(res)); 632 if (p == NULL) 633 return (ENOMEM); 634 rman_set_virtual(res, p); 635 rman_set_bustag(res, &bs_le_tag); 636 rman_set_bushandle(res, (u_long)p); 637 } 638 639 return (rman_activate_resource(res)); 640 } 641 642 static int 643 macio_deactivate_resource(device_t bus, device_t child, int type, int rid, 644 struct resource *res) 645 { 646 /* 647 * If this is a memory resource, unmap it. 648 */ 649 if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { 650 u_int32_t psize; 651 652 psize = rman_get_size(res); 653 pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize); 654 } 655 656 return (rman_deactivate_resource(res)); 657 } 658 659 static struct resource_list * 660 macio_get_resource_list (device_t dev, device_t child) 661 { 662 struct macio_devinfo *dinfo; 663 664 dinfo = device_get_ivars(child); 665 return (&dinfo->mdi_resources); 666 } 667 668 static const struct ofw_bus_devinfo * 669 macio_get_devinfo(device_t dev, device_t child) 670 { 671 struct macio_devinfo *dinfo; 672 673 dinfo = device_get_ivars(child); 674 return (&dinfo->mdi_obdinfo); 675 } 676 677 int 678 macio_enable_wireless(device_t dev, bool enable) 679 { 680 struct macio_softc *sc = device_get_softc(dev); 681 uint32_t x; 682 683 if (enable) { 684 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 685 x |= 0x4; 686 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 687 688 /* Enable card slot. */ 689 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 5); 690 DELAY(1000); 691 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 4); 692 DELAY(1000); 693 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 694 x &= ~0x80000000; 695 696 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 697 /* out8(gpio + 0x10, 4); */ 698 699 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0b, 0); 700 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0a, 0x28); 701 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0d, 0x28); 702 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0d, 0x28); 703 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0e, 0x28); 704 bus_write_4(sc->sc_memr, 0x1c000, 0); 705 706 /* Initialize the card. */ 707 bus_write_4(sc->sc_memr, 0x1a3e0, 0x41); 708 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 709 x |= 0x80000000; 710 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 711 } else { 712 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 713 x &= ~0x4; 714 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 715 /* out8(gpio + 0x10, 0); */ 716 } 717 718 return (0); 719 } 720 721 #if !defined(__powerpc64__) && defined(SMP) 722 static void 723 macio_freeze_timebase(device_t dev, bool freeze) 724 { 725 struct macio_softc *sc = device_get_softc(dev); 726 727 if (freeze) { 728 bus_write_1(sc->sc_memr, sc->sc_timebase, 4); 729 } else { 730 bus_write_1(sc->sc_memr, sc->sc_timebase, 0); 731 } 732 bus_read_1(sc->sc_memr, sc->sc_timebase); 733 } 734 #endif 735