1 /*- 2 * Copyright 2002 by Peter Grehan. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 3. The name of the author may not be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 /* 31 * Driver for KeyLargo/Pangea, the MacPPC south bridge ASIC. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/malloc.h> 38 #include <sys/module.h> 39 #include <sys/bus.h> 40 #include <sys/rman.h> 41 42 #include <vm/vm.h> 43 #include <vm/pmap.h> 44 45 #include <machine/bus.h> 46 #include <machine/intr_machdep.h> 47 #include <machine/pmap.h> 48 #include <machine/resource.h> 49 #include <machine/vmparam.h> 50 51 #include <dev/ofw/ofw_bus.h> 52 #include <dev/ofw/ofw_bus_subr.h> 53 #include <dev/ofw/openfirm.h> 54 55 #include <powerpc/powermac/maciovar.h> 56 57 #include <dev/pci/pcivar.h> 58 #include <dev/pci/pcireg.h> 59 60 /* 61 * Macio softc 62 */ 63 struct macio_softc { 64 phandle_t sc_node; 65 vm_offset_t sc_base; 66 vm_offset_t sc_size; 67 struct rman sc_mem_rman; 68 69 /* FCR registers */ 70 int sc_memrid; 71 struct resource *sc_memr; 72 }; 73 74 static MALLOC_DEFINE(M_MACIO, "macio", "macio device information"); 75 76 static int macio_probe(device_t); 77 static int macio_attach(device_t); 78 static int macio_print_child(device_t dev, device_t child); 79 static void macio_probe_nomatch(device_t, device_t); 80 static struct resource *macio_alloc_resource(device_t, device_t, int, int *, 81 rman_res_t, rman_res_t, rman_res_t, 82 u_int); 83 static int macio_activate_resource(device_t, device_t, int, int, 84 struct resource *); 85 static int macio_deactivate_resource(device_t, device_t, int, int, 86 struct resource *); 87 static int macio_release_resource(device_t, device_t, int, int, 88 struct resource *); 89 static struct resource_list *macio_get_resource_list (device_t, device_t); 90 static ofw_bus_get_devinfo_t macio_get_devinfo; 91 92 /* 93 * Bus interface definition 94 */ 95 static device_method_t macio_methods[] = { 96 /* Device interface */ 97 DEVMETHOD(device_probe, macio_probe), 98 DEVMETHOD(device_attach, macio_attach), 99 DEVMETHOD(device_detach, bus_generic_detach), 100 DEVMETHOD(device_shutdown, bus_generic_shutdown), 101 DEVMETHOD(device_suspend, bus_generic_suspend), 102 DEVMETHOD(device_resume, bus_generic_resume), 103 104 /* Bus interface */ 105 DEVMETHOD(bus_print_child, macio_print_child), 106 DEVMETHOD(bus_probe_nomatch, macio_probe_nomatch), 107 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 108 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 109 110 DEVMETHOD(bus_alloc_resource, macio_alloc_resource), 111 DEVMETHOD(bus_release_resource, macio_release_resource), 112 DEVMETHOD(bus_activate_resource, macio_activate_resource), 113 DEVMETHOD(bus_deactivate_resource, macio_deactivate_resource), 114 DEVMETHOD(bus_get_resource_list, macio_get_resource_list), 115 116 DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), 117 118 /* ofw_bus interface */ 119 DEVMETHOD(ofw_bus_get_devinfo, macio_get_devinfo), 120 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 121 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 122 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 123 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 124 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 125 126 { 0, 0 } 127 }; 128 129 static driver_t macio_pci_driver = { 130 "macio", 131 macio_methods, 132 sizeof(struct macio_softc) 133 }; 134 135 devclass_t macio_devclass; 136 137 DRIVER_MODULE(macio, pci, macio_pci_driver, macio_devclass, 0, 0); 138 139 /* 140 * PCI ID search table 141 */ 142 static struct macio_pci_dev { 143 u_int32_t mpd_devid; 144 char *mpd_desc; 145 } macio_pci_devlist[] = { 146 { 0x0017106b, "Paddington I/O Controller" }, 147 { 0x0022106b, "KeyLargo I/O Controller" }, 148 { 0x0025106b, "Pangea I/O Controller" }, 149 { 0x003e106b, "Intrepid I/O Controller" }, 150 { 0x0041106b, "K2 KeyLargo I/O Controller" }, 151 { 0x004f106b, "Shasta I/O Controller" }, 152 { 0, NULL } 153 }; 154 155 /* 156 * Devices to exclude from the probe 157 * XXX some of these may be required in the future... 158 */ 159 #define MACIO_QUIRK_IGNORE 0x00000001 160 #define MACIO_QUIRK_CHILD_HAS_INTR 0x00000002 161 #define MACIO_QUIRK_USE_CHILD_REG 0x00000004 162 163 struct macio_quirk_entry { 164 const char *mq_name; 165 int mq_quirks; 166 }; 167 168 static struct macio_quirk_entry macio_quirks[] = { 169 { "escc-legacy", MACIO_QUIRK_IGNORE }, 170 { "timer", MACIO_QUIRK_IGNORE }, 171 { "escc", MACIO_QUIRK_CHILD_HAS_INTR }, 172 { "i2s", MACIO_QUIRK_CHILD_HAS_INTR | 173 MACIO_QUIRK_USE_CHILD_REG }, 174 { NULL, 0 } 175 }; 176 177 static int 178 macio_get_quirks(const char *name) 179 { 180 struct macio_quirk_entry *mqe; 181 182 for (mqe = macio_quirks; mqe->mq_name != NULL; mqe++) 183 if (strcmp(name, mqe->mq_name) == 0) 184 return (mqe->mq_quirks); 185 return (0); 186 } 187 188 189 /* 190 * Add an interrupt to the dev's resource list if present 191 */ 192 static void 193 macio_add_intr(phandle_t devnode, struct macio_devinfo *dinfo) 194 { 195 phandle_t iparent; 196 int *intr; 197 int i, nintr; 198 int icells; 199 200 if (dinfo->mdi_ninterrupts >= 6) { 201 printf("macio: device has more than 6 interrupts\n"); 202 return; 203 } 204 205 nintr = OF_getprop_alloc(devnode, "interrupts", sizeof(*intr), 206 (void **)&intr); 207 if (nintr == -1) { 208 nintr = OF_getprop_alloc(devnode, "AAPL,interrupts", 209 sizeof(*intr), (void **)&intr); 210 if (nintr == -1) 211 return; 212 } 213 214 if (intr[0] == -1) 215 return; 216 217 if (OF_getprop(devnode, "interrupt-parent", &iparent, sizeof(iparent)) 218 <= 0) 219 panic("Interrupt but no interrupt parent!\n"); 220 221 if (OF_getprop(OF_node_from_xref(iparent), "#interrupt-cells", &icells, 222 sizeof(icells)) <= 0) 223 icells = 1; 224 225 for (i = 0; i < nintr; i+=icells) { 226 u_int irq = MAP_IRQ(iparent, intr[i]); 227 228 resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ, 229 dinfo->mdi_ninterrupts, irq, irq, 1); 230 231 dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = irq; 232 dinfo->mdi_ninterrupts++; 233 } 234 } 235 236 237 static void 238 macio_add_reg(phandle_t devnode, struct macio_devinfo *dinfo) 239 { 240 struct macio_reg *reg, *regp; 241 phandle_t child; 242 char buf[8]; 243 int i, layout_id = 0, nreg, res; 244 245 nreg = OF_getprop_alloc(devnode, "reg", sizeof(*reg), (void **)®); 246 if (nreg == -1) 247 return; 248 249 /* 250 * Some G5's have broken properties in the i2s-a area. If so we try 251 * to fix it. Right now we know of two different cases, one for 252 * sound layout-id 36 and the other one for sound layout-id 76. 253 * What is missing is the base address for the memory addresses. 254 * We take them from the parent node (i2s) and use the size 255 * information from the child. 256 */ 257 258 if (reg[0].mr_base == 0) { 259 child = OF_child(devnode); 260 while (child != 0) { 261 res = OF_getprop(child, "name", buf, sizeof(buf)); 262 if (res > 0 && strcmp(buf, "sound") == 0) 263 break; 264 child = OF_peer(child); 265 } 266 267 res = OF_getprop(child, "layout-id", &layout_id, 268 sizeof(layout_id)); 269 270 if (res > 0 && (layout_id == 36 || layout_id == 76)) { 271 res = OF_getprop_alloc(OF_parent(devnode), "reg", 272 sizeof(*regp), (void **)®p); 273 reg[0] = regp[0]; 274 reg[1].mr_base = regp[1].mr_base; 275 reg[2].mr_base = regp[1].mr_base + reg[1].mr_size; 276 } 277 } 278 279 for (i = 0; i < nreg; i++) { 280 resource_list_add(&dinfo->mdi_resources, SYS_RES_MEMORY, i, 281 reg[i].mr_base, reg[i].mr_base + reg[i].mr_size, 282 reg[i].mr_size); 283 } 284 } 285 286 /* 287 * PCI probe 288 */ 289 static int 290 macio_probe(device_t dev) 291 { 292 int i; 293 u_int32_t devid; 294 295 devid = pci_get_devid(dev); 296 for (i = 0; macio_pci_devlist[i].mpd_desc != NULL; i++) { 297 if (devid == macio_pci_devlist[i].mpd_devid) { 298 device_set_desc(dev, macio_pci_devlist[i].mpd_desc); 299 return (0); 300 } 301 } 302 303 return (ENXIO); 304 } 305 306 /* 307 * PCI attach: scan Open Firmware child nodes, and attach these as children 308 * of the macio bus 309 */ 310 static int 311 macio_attach(device_t dev) 312 { 313 struct macio_softc *sc; 314 struct macio_devinfo *dinfo; 315 phandle_t root; 316 phandle_t child; 317 phandle_t subchild; 318 device_t cdev; 319 u_int reg[3]; 320 char compat[32]; 321 int error, quirks; 322 323 sc = device_get_softc(dev); 324 root = sc->sc_node = ofw_bus_get_node(dev); 325 326 /* 327 * Locate the device node and it's base address 328 */ 329 if (OF_getprop(root, "assigned-addresses", 330 reg, sizeof(reg)) < (ssize_t)sizeof(reg)) { 331 return (ENXIO); 332 } 333 334 /* Used later to see if we have to enable the I2S part. */ 335 OF_getprop(root, "compatible", compat, sizeof(compat)); 336 337 sc->sc_base = reg[2]; 338 sc->sc_size = MACIO_REG_SIZE; 339 340 sc->sc_memrid = PCIR_BAR(0); 341 sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 342 &sc->sc_memrid, RF_ACTIVE); 343 344 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 345 sc->sc_mem_rman.rm_descr = "MacIO Device Memory"; 346 error = rman_init(&sc->sc_mem_rman); 347 if (error) { 348 device_printf(dev, "rman_init() failed. error = %d\n", error); 349 return (error); 350 } 351 error = rman_manage_region(&sc->sc_mem_rman, 0, sc->sc_size); 352 if (error) { 353 device_printf(dev, 354 "rman_manage_region() failed. error = %d\n", error); 355 return (error); 356 } 357 358 /* 359 * Iterate through the sub-devices 360 */ 361 for (child = OF_child(root); child != 0; child = OF_peer(child)) { 362 dinfo = malloc(sizeof(*dinfo), M_MACIO, M_WAITOK | M_ZERO); 363 if (ofw_bus_gen_setup_devinfo(&dinfo->mdi_obdinfo, child) != 364 0) { 365 free(dinfo, M_MACIO); 366 continue; 367 } 368 quirks = macio_get_quirks(dinfo->mdi_obdinfo.obd_name); 369 if ((quirks & MACIO_QUIRK_IGNORE) != 0) { 370 ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); 371 free(dinfo, M_MACIO); 372 continue; 373 } 374 resource_list_init(&dinfo->mdi_resources); 375 dinfo->mdi_ninterrupts = 0; 376 macio_add_intr(child, dinfo); 377 if ((quirks & MACIO_QUIRK_USE_CHILD_REG) != 0) 378 macio_add_reg(OF_child(child), dinfo); 379 else 380 macio_add_reg(child, dinfo); 381 if ((quirks & MACIO_QUIRK_CHILD_HAS_INTR) != 0) 382 for (subchild = OF_child(child); subchild != 0; 383 subchild = OF_peer(subchild)) 384 macio_add_intr(subchild, dinfo); 385 cdev = device_add_child(dev, NULL, -1); 386 if (cdev == NULL) { 387 device_printf(dev, "<%s>: device_add_child failed\n", 388 dinfo->mdi_obdinfo.obd_name); 389 resource_list_free(&dinfo->mdi_resources); 390 ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); 391 free(dinfo, M_MACIO); 392 continue; 393 } 394 device_set_ivars(cdev, dinfo); 395 396 /* Set FCRs to enable some devices */ 397 if (sc->sc_memr == NULL) 398 continue; 399 400 if (strcmp(ofw_bus_get_name(cdev), "bmac") == 0 || 401 strcmp(ofw_bus_get_compat(cdev), "bmac+") == 0) { 402 uint32_t fcr; 403 404 fcr = bus_read_4(sc->sc_memr, HEATHROW_FCR); 405 406 fcr |= FCR_ENET_ENABLE & ~FCR_ENET_RESET; 407 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 408 DELAY(50000); 409 fcr |= FCR_ENET_RESET; 410 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 411 DELAY(50000); 412 fcr &= ~FCR_ENET_RESET; 413 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 414 DELAY(50000); 415 416 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 417 } 418 419 /* 420 * Make sure the I2S0 and the I2S0_CLK are enabled. 421 * On certain G5's they are not. 422 */ 423 if ((strcmp(ofw_bus_get_name(cdev), "i2s") == 0) && 424 (strcmp(compat, "K2-Keylargo") == 0)) { 425 426 uint32_t fcr1; 427 428 fcr1 = bus_read_4(sc->sc_memr, KEYLARGO_FCR1); 429 fcr1 |= FCR1_I2S0_CLK_ENABLE | FCR1_I2S0_ENABLE; 430 bus_write_4(sc->sc_memr, KEYLARGO_FCR1, fcr1); 431 } 432 433 } 434 435 return (bus_generic_attach(dev)); 436 } 437 438 439 static int 440 macio_print_child(device_t dev, device_t child) 441 { 442 struct macio_devinfo *dinfo; 443 struct resource_list *rl; 444 int retval = 0; 445 446 dinfo = device_get_ivars(child); 447 rl = &dinfo->mdi_resources; 448 449 retval += bus_print_child_header(dev, child); 450 451 retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 452 retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 453 454 retval += bus_print_child_footer(dev, child); 455 456 return (retval); 457 } 458 459 460 static void 461 macio_probe_nomatch(device_t dev, device_t child) 462 { 463 struct macio_devinfo *dinfo; 464 struct resource_list *rl; 465 const char *type; 466 467 if (bootverbose) { 468 dinfo = device_get_ivars(child); 469 rl = &dinfo->mdi_resources; 470 471 if ((type = ofw_bus_get_type(child)) == NULL) 472 type = "(unknown)"; 473 device_printf(dev, "<%s, %s>", type, ofw_bus_get_name(child)); 474 resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 475 resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 476 printf(" (no driver attached)\n"); 477 } 478 } 479 480 481 static struct resource * 482 macio_alloc_resource(device_t bus, device_t child, int type, int *rid, 483 rman_res_t start, rman_res_t end, rman_res_t count, 484 u_int flags) 485 { 486 struct macio_softc *sc; 487 int needactivate; 488 struct resource *rv; 489 struct rman *rm; 490 u_long adjstart, adjend, adjcount; 491 struct macio_devinfo *dinfo; 492 struct resource_list_entry *rle; 493 494 sc = device_get_softc(bus); 495 dinfo = device_get_ivars(child); 496 497 needactivate = flags & RF_ACTIVE; 498 flags &= ~RF_ACTIVE; 499 500 switch (type) { 501 case SYS_RES_MEMORY: 502 case SYS_RES_IOPORT: 503 rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_MEMORY, 504 *rid); 505 if (rle == NULL) { 506 device_printf(bus, "no rle for %s memory %d\n", 507 device_get_nameunit(child), *rid); 508 return (NULL); 509 } 510 511 if (start < rle->start) 512 adjstart = rle->start; 513 else if (start > rle->end) 514 adjstart = rle->end; 515 else 516 adjstart = start; 517 518 if (end < rle->start) 519 adjend = rle->start; 520 else if (end > rle->end) 521 adjend = rle->end; 522 else 523 adjend = end; 524 525 adjcount = adjend - adjstart; 526 527 rm = &sc->sc_mem_rman; 528 break; 529 530 case SYS_RES_IRQ: 531 /* Check for passthrough from subattachments like macgpio */ 532 if (device_get_parent(child) != bus) 533 return BUS_ALLOC_RESOURCE(device_get_parent(bus), child, 534 type, rid, start, end, count, flags); 535 536 rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_IRQ, 537 *rid); 538 if (rle == NULL) { 539 if (dinfo->mdi_ninterrupts >= 6) { 540 device_printf(bus, 541 "%s has more than 6 interrupts\n", 542 device_get_nameunit(child)); 543 return (NULL); 544 } 545 resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ, 546 dinfo->mdi_ninterrupts, start, start, 1); 547 548 dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = start; 549 dinfo->mdi_ninterrupts++; 550 } 551 552 return (resource_list_alloc(&dinfo->mdi_resources, bus, child, 553 type, rid, start, end, count, flags)); 554 555 default: 556 device_printf(bus, "unknown resource request from %s\n", 557 device_get_nameunit(child)); 558 return (NULL); 559 } 560 561 rv = rman_reserve_resource(rm, adjstart, adjend, adjcount, flags, 562 child); 563 if (rv == NULL) { 564 device_printf(bus, 565 "failed to reserve resource %#lx - %#lx (%#lx) for %s\n", 566 adjstart, adjend, adjcount, device_get_nameunit(child)); 567 return (NULL); 568 } 569 570 rman_set_rid(rv, *rid); 571 572 if (needactivate) { 573 if (bus_activate_resource(child, type, *rid, rv) != 0) { 574 device_printf(bus, 575 "failed to activate resource for %s\n", 576 device_get_nameunit(child)); 577 rman_release_resource(rv); 578 return (NULL); 579 } 580 } 581 582 return (rv); 583 } 584 585 586 static int 587 macio_release_resource(device_t bus, device_t child, int type, int rid, 588 struct resource *res) 589 { 590 if (rman_get_flags(res) & RF_ACTIVE) { 591 int error = bus_deactivate_resource(child, type, rid, res); 592 if (error) 593 return error; 594 } 595 596 return (rman_release_resource(res)); 597 } 598 599 600 static int 601 macio_activate_resource(device_t bus, device_t child, int type, int rid, 602 struct resource *res) 603 { 604 struct macio_softc *sc; 605 void *p; 606 607 sc = device_get_softc(bus); 608 609 if (type == SYS_RES_IRQ) 610 return (bus_activate_resource(bus, type, rid, res)); 611 612 if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { 613 p = pmap_mapdev((vm_offset_t)rman_get_start(res) + sc->sc_base, 614 (vm_size_t)rman_get_size(res)); 615 if (p == NULL) 616 return (ENOMEM); 617 rman_set_virtual(res, p); 618 rman_set_bustag(res, &bs_le_tag); 619 rman_set_bushandle(res, (u_long)p); 620 } 621 622 return (rman_activate_resource(res)); 623 } 624 625 626 static int 627 macio_deactivate_resource(device_t bus, device_t child, int type, int rid, 628 struct resource *res) 629 { 630 /* 631 * If this is a memory resource, unmap it. 632 */ 633 if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { 634 u_int32_t psize; 635 636 psize = rman_get_size(res); 637 pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize); 638 } 639 640 return (rman_deactivate_resource(res)); 641 } 642 643 644 static struct resource_list * 645 macio_get_resource_list (device_t dev, device_t child) 646 { 647 struct macio_devinfo *dinfo; 648 649 dinfo = device_get_ivars(child); 650 return (&dinfo->mdi_resources); 651 } 652 653 static const struct ofw_bus_devinfo * 654 macio_get_devinfo(device_t dev, device_t child) 655 { 656 struct macio_devinfo *dinfo; 657 658 dinfo = device_get_ivars(child); 659 return (&dinfo->mdi_obdinfo); 660 } 661 662 int 663 macio_enable_wireless(device_t dev, bool enable) 664 { 665 struct macio_softc *sc = device_get_softc(dev); 666 uint32_t x; 667 668 if (enable) { 669 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 670 x |= 0x4; 671 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 672 673 /* Enable card slot. */ 674 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 5); 675 DELAY(1000); 676 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 4); 677 DELAY(1000); 678 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 679 x &= ~0x80000000; 680 681 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 682 /* out8(gpio + 0x10, 4); */ 683 684 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0b, 0); 685 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0a, 0x28); 686 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0d, 0x28); 687 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0d, 0x28); 688 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0e, 0x28); 689 bus_write_4(sc->sc_memr, 0x1c000, 0); 690 691 /* Initialize the card. */ 692 bus_write_4(sc->sc_memr, 0x1a3e0, 0x41); 693 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 694 x |= 0x80000000; 695 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 696 } else { 697 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 698 x &= ~0x4; 699 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 700 /* out8(gpio + 0x10, 0); */ 701 } 702 703 return (0); 704 } 705