1 /*- 2 * Copyright 2002 by Peter Grehan. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 3. The name of the author may not be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 /* 31 * Driver for KeyLargo/Pangea, the MacPPC south bridge ASIC. 32 */ 33 34 #include <sys/param.h> 35 #include <sys/systm.h> 36 #include <sys/kernel.h> 37 #include <sys/malloc.h> 38 #include <sys/module.h> 39 #include <sys/bus.h> 40 #include <sys/rman.h> 41 42 #include <vm/vm.h> 43 #include <vm/pmap.h> 44 45 #include <machine/bus.h> 46 #include <machine/intr_machdep.h> 47 #include <machine/pmap.h> 48 #include <machine/resource.h> 49 #include <machine/vmparam.h> 50 51 #include <dev/ofw/ofw_bus.h> 52 #include <dev/ofw/ofw_bus_subr.h> 53 #include <dev/ofw/openfirm.h> 54 55 #include <powerpc/powermac/maciovar.h> 56 57 #include <dev/pci/pcivar.h> 58 #include <dev/pci/pcireg.h> 59 60 /* 61 * Macio softc 62 */ 63 struct macio_softc { 64 phandle_t sc_node; 65 vm_offset_t sc_base; 66 vm_offset_t sc_size; 67 struct rman sc_mem_rman; 68 69 /* FCR registers */ 70 int sc_memrid; 71 struct resource *sc_memr; 72 }; 73 74 static MALLOC_DEFINE(M_MACIO, "macio", "macio device information"); 75 76 static int macio_probe(device_t); 77 static int macio_attach(device_t); 78 static int macio_print_child(device_t dev, device_t child); 79 static void macio_probe_nomatch(device_t, device_t); 80 static struct resource *macio_alloc_resource(device_t, device_t, int, int *, 81 u_long, u_long, u_long, u_int); 82 static int macio_activate_resource(device_t, device_t, int, int, 83 struct resource *); 84 static int macio_deactivate_resource(device_t, device_t, int, int, 85 struct resource *); 86 static int macio_release_resource(device_t, device_t, int, int, 87 struct resource *); 88 static struct resource_list *macio_get_resource_list (device_t, device_t); 89 static ofw_bus_get_devinfo_t macio_get_devinfo; 90 91 /* 92 * Bus interface definition 93 */ 94 static device_method_t macio_methods[] = { 95 /* Device interface */ 96 DEVMETHOD(device_probe, macio_probe), 97 DEVMETHOD(device_attach, macio_attach), 98 DEVMETHOD(device_detach, bus_generic_detach), 99 DEVMETHOD(device_shutdown, bus_generic_shutdown), 100 DEVMETHOD(device_suspend, bus_generic_suspend), 101 DEVMETHOD(device_resume, bus_generic_resume), 102 103 /* Bus interface */ 104 DEVMETHOD(bus_print_child, macio_print_child), 105 DEVMETHOD(bus_probe_nomatch, macio_probe_nomatch), 106 DEVMETHOD(bus_setup_intr, bus_generic_setup_intr), 107 DEVMETHOD(bus_teardown_intr, bus_generic_teardown_intr), 108 109 DEVMETHOD(bus_alloc_resource, macio_alloc_resource), 110 DEVMETHOD(bus_release_resource, macio_release_resource), 111 DEVMETHOD(bus_activate_resource, macio_activate_resource), 112 DEVMETHOD(bus_deactivate_resource, macio_deactivate_resource), 113 DEVMETHOD(bus_get_resource_list, macio_get_resource_list), 114 115 DEVMETHOD(bus_child_pnpinfo_str, ofw_bus_gen_child_pnpinfo_str), 116 117 /* ofw_bus interface */ 118 DEVMETHOD(ofw_bus_get_devinfo, macio_get_devinfo), 119 DEVMETHOD(ofw_bus_get_compat, ofw_bus_gen_get_compat), 120 DEVMETHOD(ofw_bus_get_model, ofw_bus_gen_get_model), 121 DEVMETHOD(ofw_bus_get_name, ofw_bus_gen_get_name), 122 DEVMETHOD(ofw_bus_get_node, ofw_bus_gen_get_node), 123 DEVMETHOD(ofw_bus_get_type, ofw_bus_gen_get_type), 124 125 { 0, 0 } 126 }; 127 128 static driver_t macio_pci_driver = { 129 "macio", 130 macio_methods, 131 sizeof(struct macio_softc) 132 }; 133 134 devclass_t macio_devclass; 135 136 DRIVER_MODULE(macio, pci, macio_pci_driver, macio_devclass, 0, 0); 137 138 /* 139 * PCI ID search table 140 */ 141 static struct macio_pci_dev { 142 u_int32_t mpd_devid; 143 char *mpd_desc; 144 } macio_pci_devlist[] = { 145 { 0x0017106b, "Paddington I/O Controller" }, 146 { 0x0022106b, "KeyLargo I/O Controller" }, 147 { 0x0025106b, "Pangea I/O Controller" }, 148 { 0x003e106b, "Intrepid I/O Controller" }, 149 { 0x0041106b, "K2 KeyLargo I/O Controller" }, 150 { 0x004f106b, "Shasta I/O Controller" }, 151 { 0, NULL } 152 }; 153 154 /* 155 * Devices to exclude from the probe 156 * XXX some of these may be required in the future... 157 */ 158 #define MACIO_QUIRK_IGNORE 0x00000001 159 #define MACIO_QUIRK_CHILD_HAS_INTR 0x00000002 160 #define MACIO_QUIRK_USE_CHILD_REG 0x00000004 161 162 struct macio_quirk_entry { 163 const char *mq_name; 164 int mq_quirks; 165 }; 166 167 static struct macio_quirk_entry macio_quirks[] = { 168 { "escc-legacy", MACIO_QUIRK_IGNORE }, 169 { "timer", MACIO_QUIRK_IGNORE }, 170 { "escc", MACIO_QUIRK_CHILD_HAS_INTR }, 171 { "i2s", MACIO_QUIRK_CHILD_HAS_INTR | 172 MACIO_QUIRK_USE_CHILD_REG }, 173 { NULL, 0 } 174 }; 175 176 static int 177 macio_get_quirks(const char *name) 178 { 179 struct macio_quirk_entry *mqe; 180 181 for (mqe = macio_quirks; mqe->mq_name != NULL; mqe++) 182 if (strcmp(name, mqe->mq_name) == 0) 183 return (mqe->mq_quirks); 184 return (0); 185 } 186 187 188 /* 189 * Add an interrupt to the dev's resource list if present 190 */ 191 static void 192 macio_add_intr(phandle_t devnode, struct macio_devinfo *dinfo) 193 { 194 phandle_t iparent; 195 int *intr; 196 int i, nintr; 197 int icells; 198 199 if (dinfo->mdi_ninterrupts >= 6) { 200 printf("macio: device has more than 6 interrupts\n"); 201 return; 202 } 203 204 nintr = OF_getprop_alloc(devnode, "interrupts", sizeof(*intr), 205 (void **)&intr); 206 if (nintr == -1) { 207 nintr = OF_getprop_alloc(devnode, "AAPL,interrupts", 208 sizeof(*intr), (void **)&intr); 209 if (nintr == -1) 210 return; 211 } 212 213 if (intr[0] == -1) 214 return; 215 216 if (OF_getprop(devnode, "interrupt-parent", &iparent, sizeof(iparent)) 217 <= 0) 218 panic("Interrupt but no interrupt parent!\n"); 219 220 if (OF_getprop(OF_node_from_xref(iparent), "#interrupt-cells", &icells, 221 sizeof(icells)) <= 0) 222 icells = 1; 223 224 for (i = 0; i < nintr; i+=icells) { 225 u_int irq = MAP_IRQ(iparent, intr[i]); 226 227 resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ, 228 dinfo->mdi_ninterrupts, irq, irq, 1); 229 230 dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = irq; 231 dinfo->mdi_ninterrupts++; 232 } 233 } 234 235 236 static void 237 macio_add_reg(phandle_t devnode, struct macio_devinfo *dinfo) 238 { 239 struct macio_reg *reg, *regp; 240 phandle_t child; 241 char buf[8]; 242 int i, layout_id = 0, nreg, res; 243 244 nreg = OF_getprop_alloc(devnode, "reg", sizeof(*reg), (void **)®); 245 if (nreg == -1) 246 return; 247 248 /* 249 * Some G5's have broken properties in the i2s-a area. If so we try 250 * to fix it. Right now we know of two different cases, one for 251 * sound layout-id 36 and the other one for sound layout-id 76. 252 * What is missing is the base address for the memory addresses. 253 * We take them from the parent node (i2s) and use the size 254 * information from the child. 255 */ 256 257 if (reg[0].mr_base == 0) { 258 child = OF_child(devnode); 259 while (child != 0) { 260 res = OF_getprop(child, "name", buf, sizeof(buf)); 261 if (res > 0 && strcmp(buf, "sound") == 0) 262 break; 263 child = OF_peer(child); 264 } 265 266 res = OF_getprop(child, "layout-id", &layout_id, 267 sizeof(layout_id)); 268 269 if (res > 0 && (layout_id == 36 || layout_id == 76)) { 270 res = OF_getprop_alloc(OF_parent(devnode), "reg", 271 sizeof(*regp), (void **)®p); 272 reg[0] = regp[0]; 273 reg[1].mr_base = regp[1].mr_base; 274 reg[2].mr_base = regp[1].mr_base + reg[1].mr_size; 275 } 276 } 277 278 for (i = 0; i < nreg; i++) { 279 resource_list_add(&dinfo->mdi_resources, SYS_RES_MEMORY, i, 280 reg[i].mr_base, reg[i].mr_base + reg[i].mr_size, 281 reg[i].mr_size); 282 } 283 } 284 285 /* 286 * PCI probe 287 */ 288 static int 289 macio_probe(device_t dev) 290 { 291 int i; 292 u_int32_t devid; 293 294 devid = pci_get_devid(dev); 295 for (i = 0; macio_pci_devlist[i].mpd_desc != NULL; i++) { 296 if (devid == macio_pci_devlist[i].mpd_devid) { 297 device_set_desc(dev, macio_pci_devlist[i].mpd_desc); 298 return (0); 299 } 300 } 301 302 return (ENXIO); 303 } 304 305 /* 306 * PCI attach: scan Open Firmware child nodes, and attach these as children 307 * of the macio bus 308 */ 309 static int 310 macio_attach(device_t dev) 311 { 312 struct macio_softc *sc; 313 struct macio_devinfo *dinfo; 314 phandle_t root; 315 phandle_t child; 316 phandle_t subchild; 317 device_t cdev; 318 u_int reg[3]; 319 char compat[32]; 320 int error, quirks; 321 322 sc = device_get_softc(dev); 323 root = sc->sc_node = ofw_bus_get_node(dev); 324 325 /* 326 * Locate the device node and it's base address 327 */ 328 if (OF_getprop(root, "assigned-addresses", 329 reg, sizeof(reg)) < (ssize_t)sizeof(reg)) { 330 return (ENXIO); 331 } 332 333 /* Used later to see if we have to enable the I2S part. */ 334 OF_getprop(root, "compatible", compat, sizeof(compat)); 335 336 sc->sc_base = reg[2]; 337 sc->sc_size = MACIO_REG_SIZE; 338 339 sc->sc_memrid = PCIR_BAR(0); 340 sc->sc_memr = bus_alloc_resource_any(dev, SYS_RES_MEMORY, 341 &sc->sc_memrid, RF_ACTIVE); 342 343 sc->sc_mem_rman.rm_type = RMAN_ARRAY; 344 sc->sc_mem_rman.rm_descr = "MacIO Device Memory"; 345 error = rman_init(&sc->sc_mem_rman); 346 if (error) { 347 device_printf(dev, "rman_init() failed. error = %d\n", error); 348 return (error); 349 } 350 error = rman_manage_region(&sc->sc_mem_rman, 0, sc->sc_size); 351 if (error) { 352 device_printf(dev, 353 "rman_manage_region() failed. error = %d\n", error); 354 return (error); 355 } 356 357 /* 358 * Iterate through the sub-devices 359 */ 360 for (child = OF_child(root); child != 0; child = OF_peer(child)) { 361 dinfo = malloc(sizeof(*dinfo), M_MACIO, M_WAITOK | M_ZERO); 362 if (ofw_bus_gen_setup_devinfo(&dinfo->mdi_obdinfo, child) != 363 0) { 364 free(dinfo, M_MACIO); 365 continue; 366 } 367 quirks = macio_get_quirks(dinfo->mdi_obdinfo.obd_name); 368 if ((quirks & MACIO_QUIRK_IGNORE) != 0) { 369 ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); 370 free(dinfo, M_MACIO); 371 continue; 372 } 373 resource_list_init(&dinfo->mdi_resources); 374 dinfo->mdi_ninterrupts = 0; 375 macio_add_intr(child, dinfo); 376 if ((quirks & MACIO_QUIRK_USE_CHILD_REG) != 0) 377 macio_add_reg(OF_child(child), dinfo); 378 else 379 macio_add_reg(child, dinfo); 380 if ((quirks & MACIO_QUIRK_CHILD_HAS_INTR) != 0) 381 for (subchild = OF_child(child); subchild != 0; 382 subchild = OF_peer(subchild)) 383 macio_add_intr(subchild, dinfo); 384 cdev = device_add_child(dev, NULL, -1); 385 if (cdev == NULL) { 386 device_printf(dev, "<%s>: device_add_child failed\n", 387 dinfo->mdi_obdinfo.obd_name); 388 resource_list_free(&dinfo->mdi_resources); 389 ofw_bus_gen_destroy_devinfo(&dinfo->mdi_obdinfo); 390 free(dinfo, M_MACIO); 391 continue; 392 } 393 device_set_ivars(cdev, dinfo); 394 395 /* Set FCRs to enable some devices */ 396 if (sc->sc_memr == NULL) 397 continue; 398 399 if (strcmp(ofw_bus_get_name(cdev), "bmac") == 0 || 400 strcmp(ofw_bus_get_compat(cdev), "bmac+") == 0) { 401 uint32_t fcr; 402 403 fcr = bus_read_4(sc->sc_memr, HEATHROW_FCR); 404 405 fcr |= FCR_ENET_ENABLE & ~FCR_ENET_RESET; 406 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 407 DELAY(50000); 408 fcr |= FCR_ENET_RESET; 409 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 410 DELAY(50000); 411 fcr &= ~FCR_ENET_RESET; 412 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 413 DELAY(50000); 414 415 bus_write_4(sc->sc_memr, HEATHROW_FCR, fcr); 416 } 417 418 /* 419 * Make sure the I2S0 and the I2S0_CLK are enabled. 420 * On certain G5's they are not. 421 */ 422 if ((strcmp(ofw_bus_get_name(cdev), "i2s") == 0) && 423 (strcmp(compat, "K2-Keylargo") == 0)) { 424 425 uint32_t fcr1; 426 427 fcr1 = bus_read_4(sc->sc_memr, KEYLARGO_FCR1); 428 fcr1 |= FCR1_I2S0_CLK_ENABLE | FCR1_I2S0_ENABLE; 429 bus_write_4(sc->sc_memr, KEYLARGO_FCR1, fcr1); 430 } 431 432 } 433 434 return (bus_generic_attach(dev)); 435 } 436 437 438 static int 439 macio_print_child(device_t dev, device_t child) 440 { 441 struct macio_devinfo *dinfo; 442 struct resource_list *rl; 443 int retval = 0; 444 445 dinfo = device_get_ivars(child); 446 rl = &dinfo->mdi_resources; 447 448 retval += bus_print_child_header(dev, child); 449 450 retval += resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 451 retval += resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 452 453 retval += bus_print_child_footer(dev, child); 454 455 return (retval); 456 } 457 458 459 static void 460 macio_probe_nomatch(device_t dev, device_t child) 461 { 462 struct macio_devinfo *dinfo; 463 struct resource_list *rl; 464 const char *type; 465 466 if (bootverbose) { 467 dinfo = device_get_ivars(child); 468 rl = &dinfo->mdi_resources; 469 470 if ((type = ofw_bus_get_type(child)) == NULL) 471 type = "(unknown)"; 472 device_printf(dev, "<%s, %s>", type, ofw_bus_get_name(child)); 473 resource_list_print_type(rl, "mem", SYS_RES_MEMORY, "%#lx"); 474 resource_list_print_type(rl, "irq", SYS_RES_IRQ, "%ld"); 475 printf(" (no driver attached)\n"); 476 } 477 } 478 479 480 static struct resource * 481 macio_alloc_resource(device_t bus, device_t child, int type, int *rid, 482 u_long start, u_long end, u_long count, u_int flags) 483 { 484 struct macio_softc *sc; 485 int needactivate; 486 struct resource *rv; 487 struct rman *rm; 488 u_long adjstart, adjend, adjcount; 489 struct macio_devinfo *dinfo; 490 struct resource_list_entry *rle; 491 492 sc = device_get_softc(bus); 493 dinfo = device_get_ivars(child); 494 495 needactivate = flags & RF_ACTIVE; 496 flags &= ~RF_ACTIVE; 497 498 switch (type) { 499 case SYS_RES_MEMORY: 500 case SYS_RES_IOPORT: 501 rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_MEMORY, 502 *rid); 503 if (rle == NULL) { 504 device_printf(bus, "no rle for %s memory %d\n", 505 device_get_nameunit(child), *rid); 506 return (NULL); 507 } 508 509 if (start < rle->start) 510 adjstart = rle->start; 511 else if (start > rle->end) 512 adjstart = rle->end; 513 else 514 adjstart = start; 515 516 if (end < rle->start) 517 adjend = rle->start; 518 else if (end > rle->end) 519 adjend = rle->end; 520 else 521 adjend = end; 522 523 adjcount = adjend - adjstart; 524 525 rm = &sc->sc_mem_rman; 526 break; 527 528 case SYS_RES_IRQ: 529 /* Check for passthrough from subattachments like macgpio */ 530 if (device_get_parent(child) != bus) 531 return BUS_ALLOC_RESOURCE(device_get_parent(bus), child, 532 type, rid, start, end, count, flags); 533 534 rle = resource_list_find(&dinfo->mdi_resources, SYS_RES_IRQ, 535 *rid); 536 if (rle == NULL) { 537 if (dinfo->mdi_ninterrupts >= 6) { 538 device_printf(bus, 539 "%s has more than 6 interrupts\n", 540 device_get_nameunit(child)); 541 return (NULL); 542 } 543 resource_list_add(&dinfo->mdi_resources, SYS_RES_IRQ, 544 dinfo->mdi_ninterrupts, start, start, 1); 545 546 dinfo->mdi_interrupts[dinfo->mdi_ninterrupts] = start; 547 dinfo->mdi_ninterrupts++; 548 } 549 550 return (resource_list_alloc(&dinfo->mdi_resources, bus, child, 551 type, rid, start, end, count, flags)); 552 553 default: 554 device_printf(bus, "unknown resource request from %s\n", 555 device_get_nameunit(child)); 556 return (NULL); 557 } 558 559 rv = rman_reserve_resource(rm, adjstart, adjend, adjcount, flags, 560 child); 561 if (rv == NULL) { 562 device_printf(bus, 563 "failed to reserve resource %#lx - %#lx (%#lx) for %s\n", 564 adjstart, adjend, adjcount, device_get_nameunit(child)); 565 return (NULL); 566 } 567 568 rman_set_rid(rv, *rid); 569 570 if (needactivate) { 571 if (bus_activate_resource(child, type, *rid, rv) != 0) { 572 device_printf(bus, 573 "failed to activate resource for %s\n", 574 device_get_nameunit(child)); 575 rman_release_resource(rv); 576 return (NULL); 577 } 578 } 579 580 return (rv); 581 } 582 583 584 static int 585 macio_release_resource(device_t bus, device_t child, int type, int rid, 586 struct resource *res) 587 { 588 if (rman_get_flags(res) & RF_ACTIVE) { 589 int error = bus_deactivate_resource(child, type, rid, res); 590 if (error) 591 return error; 592 } 593 594 return (rman_release_resource(res)); 595 } 596 597 598 static int 599 macio_activate_resource(device_t bus, device_t child, int type, int rid, 600 struct resource *res) 601 { 602 struct macio_softc *sc; 603 void *p; 604 605 sc = device_get_softc(bus); 606 607 if (type == SYS_RES_IRQ) 608 return (bus_activate_resource(bus, type, rid, res)); 609 610 if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { 611 p = pmap_mapdev((vm_offset_t)rman_get_start(res) + sc->sc_base, 612 (vm_size_t)rman_get_size(res)); 613 if (p == NULL) 614 return (ENOMEM); 615 rman_set_virtual(res, p); 616 rman_set_bustag(res, &bs_le_tag); 617 rman_set_bushandle(res, (u_long)p); 618 } 619 620 return (rman_activate_resource(res)); 621 } 622 623 624 static int 625 macio_deactivate_resource(device_t bus, device_t child, int type, int rid, 626 struct resource *res) 627 { 628 /* 629 * If this is a memory resource, unmap it. 630 */ 631 if ((type == SYS_RES_MEMORY) || (type == SYS_RES_IOPORT)) { 632 u_int32_t psize; 633 634 psize = rman_get_size(res); 635 pmap_unmapdev((vm_offset_t)rman_get_virtual(res), psize); 636 } 637 638 return (rman_deactivate_resource(res)); 639 } 640 641 642 static struct resource_list * 643 macio_get_resource_list (device_t dev, device_t child) 644 { 645 struct macio_devinfo *dinfo; 646 647 dinfo = device_get_ivars(child); 648 return (&dinfo->mdi_resources); 649 } 650 651 static const struct ofw_bus_devinfo * 652 macio_get_devinfo(device_t dev, device_t child) 653 { 654 struct macio_devinfo *dinfo; 655 656 dinfo = device_get_ivars(child); 657 return (&dinfo->mdi_obdinfo); 658 } 659 660 int 661 macio_enable_wireless(device_t dev, bool enable) 662 { 663 struct macio_softc *sc = device_get_softc(dev); 664 uint32_t x; 665 666 if (enable) { 667 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 668 x |= 0x4; 669 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 670 671 /* Enable card slot. */ 672 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 5); 673 DELAY(1000); 674 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0f, 4); 675 DELAY(1000); 676 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 677 x &= ~0x80000000; 678 679 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 680 /* out8(gpio + 0x10, 4); */ 681 682 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0b, 0); 683 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0a, 0x28); 684 bus_write_1(sc->sc_memr, KEYLARGO_EXTINT_GPIO_REG_BASE + 0x0d, 0x28); 685 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0d, 0x28); 686 bus_write_1(sc->sc_memr, KEYLARGO_GPIO_BASE + 0x0e, 0x28); 687 bus_write_4(sc->sc_memr, 0x1c000, 0); 688 689 /* Initialize the card. */ 690 bus_write_4(sc->sc_memr, 0x1a3e0, 0x41); 691 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 692 x |= 0x80000000; 693 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 694 } else { 695 x = bus_read_4(sc->sc_memr, KEYLARGO_FCR2); 696 x &= ~0x4; 697 bus_write_4(sc->sc_memr, KEYLARGO_FCR2, x); 698 /* out8(gpio + 0x10, 0); */ 699 } 700 701 return (0); 702 } 703