xref: /freebsd/sys/powerpc/powermac/kiic.c (revision 1603881667360c015f6685131f2f25474fa67a72)
1 /*-
2  * SPDX-License-Identifier: BSD-3-Clause
3  *
4  * Copyright (c) 2001 Tsubai Masanari.  All rights reserved.
5  *
6  * Redistribution and use in source and binary forms, with or without
7  * modification, are permitted provided that the following conditions
8  * are met:
9  * 1. Redistributions of source code must retain the above copyright
10  *    notice, this list of conditions and the following disclaimer.
11  * 2. Redistributions in binary form must reproduce the above copyright
12  *    notice, this list of conditions and the following disclaimer in the
13  *    documentation and/or other materials provided with the distribution.
14  * 3. The name of the author may not be used to endorse or promote products
15  *    derived from this software without specific prior written permission.
16  *
17  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
18  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
19  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
20  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
21  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
22  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
23  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
24  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
25  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
26  * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
27  *
28  * $FreeBSD$
29  *	NetBSD: ki2c.c,v 1.11 2007/12/06 17:00:33 ad Exp
30  *	Id: ki2c.c,v 1.7 2002/10/05 09:56:05 tsubai Exp
31  */
32 
33 /*
34  * 	Support routines for the Keywest I2C controller.
35  */
36 
37 #include <sys/param.h>
38 #include <sys/systm.h>
39 #include <sys/kernel.h>
40 #include <sys/module.h>
41 #include <sys/bus.h>
42 #include <sys/lock.h>
43 #include <sys/mutex.h>
44 #include <machine/resource.h>
45 #include <machine/bus.h>
46 #include <sys/rman.h>
47 
48 #include <dev/iicbus/iicbus.h>
49 #include <dev/iicbus/iiconf.h>
50 #include <dev/ofw/ofw_bus.h>
51 #include "iicbus_if.h"
52 
53 /* Keywest I2C Register offsets */
54 #define MODE	0
55 #define CONTROL	1
56 #define STATUS	2
57 #define ISR	3
58 #define IER	4
59 #define ADDR	5
60 #define SUBADDR	6
61 #define DATA	7
62 #define REV	8
63 
64 /* MODE */
65 #define I2C_SPEED	0x03	/* Speed mask */
66 #define  I2C_100kHz	0x00
67 #define  I2C_50kHz	0x01
68 #define  I2C_25kHz	0x02
69 #define I2C_MODE	0x0c	/* Mode mask */
70 #define  I2C_DUMBMODE	0x00	/*  Dumb mode */
71 #define  I2C_STDMODE	0x04	/*  Standard mode */
72 #define  I2C_STDSUBMODE	0x08	/*  Standard mode + sub address */
73 #define  I2C_COMBMODE	0x0c	/*  Combined mode */
74 #define I2C_PORT	0xf0	/* Port mask */
75 
76 /* CONTROL */
77 #define I2C_CT_AAK	0x01	/* Send AAK */
78 #define I2C_CT_ADDR	0x02	/* Send address(es) */
79 #define I2C_CT_STOP	0x04	/* Send STOP */
80 #define I2C_CT_START	0x08	/* Send START */
81 
82 /* STATUS */
83 #define I2C_ST_BUSY	0x01	/* Busy */
84 #define I2C_ST_LASTAAK	0x02	/* Last AAK */
85 #define I2C_ST_LASTRW	0x04	/* Last R/W */
86 #define I2C_ST_SDA	0x08	/* SDA */
87 #define I2C_ST_SCL	0x10	/* SCL */
88 
89 /* ISR/IER */
90 #define I2C_INT_DATA	0x01	/* Data byte sent/received */
91 #define I2C_INT_ADDR	0x02	/* Address sent */
92 #define I2C_INT_STOP	0x04	/* STOP condition sent */
93 #define I2C_INT_START	0x08	/* START condition sent */
94 
95 /* I2C flags */
96 #define I2C_BUSY	0x01
97 #define I2C_READING	0x02
98 #define I2C_ERROR	0x04
99 #define I2C_SELECTED	0x08
100 
101 struct kiic_softc {
102 	device_t 		 sc_dev;
103 	phandle_t		 sc_node;
104 	struct mtx 		 sc_mutex;
105 	struct resource		*sc_reg;
106 	int			 sc_irqrid;
107 	struct resource		*sc_irq;
108 	void			*sc_ih;
109 	u_int 			 sc_regstep;
110 	u_int 			 sc_flags;
111 	u_char			*sc_data;
112 	int 			 sc_resid;
113 	uint16_t		 sc_i2c_base;
114 	device_t 		 sc_iicbus;
115 };
116 
117 static int 	kiic_probe(device_t dev);
118 static int 	kiic_attach(device_t dev);
119 static void 	kiic_writereg(struct kiic_softc *sc, u_int, u_int);
120 static u_int 	kiic_readreg(struct kiic_softc *, u_int);
121 static void 	kiic_setport(struct kiic_softc *, u_int);
122 static void 	kiic_setmode(struct kiic_softc *, u_int);
123 static void 	kiic_setspeed(struct kiic_softc *, u_int);
124 static void 	kiic_intr(void *xsc);
125 static int	kiic_transfer(device_t dev, struct iic_msg *msgs,
126 		    uint32_t nmsgs);
127 static phandle_t kiic_get_node(device_t bus, device_t dev);
128 
129 static device_method_t kiic_methods[] = {
130 	/* device interface */
131 	DEVMETHOD(device_probe, 	kiic_probe),
132 	DEVMETHOD(device_attach, 	kiic_attach),
133 
134 	/* iicbus interface */
135 	DEVMETHOD(iicbus_callback,	iicbus_null_callback),
136 	DEVMETHOD(iicbus_transfer,	kiic_transfer),
137 
138 	/* ofw_bus interface */
139 	DEVMETHOD(ofw_bus_get_node,	kiic_get_node),
140 	{ 0, 0 }
141 };
142 
143 static driver_t kiic_driver = {
144 	"iichb",
145 	kiic_methods,
146 	sizeof(struct kiic_softc)
147 };
148 static devclass_t kiic_devclass;
149 
150 DRIVER_MODULE(kiic, macio, kiic_driver, kiic_devclass, 0, 0);
151 DRIVER_MODULE(kiic, unin, kiic_driver, kiic_devclass, 0, 0);
152 
153 static int
154 kiic_probe(device_t self)
155 {
156 	const char *name;
157 
158 	name = ofw_bus_get_name(self);
159 	if (name && strcmp(name, "i2c") == 0) {
160 		device_set_desc(self, "Keywest I2C controller");
161 		return (0);
162 	}
163 
164 	return (ENXIO);
165 }
166 
167 static int
168 kiic_attach(device_t self)
169 {
170 	struct kiic_softc *sc = device_get_softc(self);
171 	int rid, rate;
172 	phandle_t node;
173 	char name[64];
174 
175 	bzero(sc, sizeof(*sc));
176 	sc->sc_dev = self;
177 
178 	node = ofw_bus_get_node(self);
179 	if (node == 0 || node == -1) {
180 		return (EINVAL);
181 	}
182 
183 	rid = 0;
184 	sc->sc_reg = bus_alloc_resource_any(self, SYS_RES_MEMORY,
185 			&rid, RF_ACTIVE);
186 	if (sc->sc_reg == NULL) {
187 		return (ENOMEM);
188 	}
189 
190 	if (OF_getencprop(node, "AAPL,i2c-rate", &rate, 4) != 4) {
191 		device_printf(self, "cannot get i2c-rate\n");
192 		return (ENXIO);
193 	}
194 	if (OF_getencprop(node, "AAPL,address-step", &sc->sc_regstep, 4) != 4) {
195 		device_printf(self, "unable to find i2c address step\n");
196 		return (ENXIO);
197 	}
198 
199 	/*
200 	 * Some Keywest I2C devices have their children attached directly
201 	 * underneath them.  Some have a single 'iicbus' child with the
202 	 * devices underneath that.  Sort this out, and make sure that the
203 	 * OFW I2C layer has the correct node.
204 	 *
205 	 * Note: the I2C children of the Uninorth bridges have two ports.
206 	 *  In general, the port is designated in the 9th bit of the I2C
207 	 *  address. However, for kiic devices with children attached below
208 	 *  an i2c-bus node, the port is indicated in the 'reg' property
209 	 *  of the i2c-bus node.
210 	 */
211 
212 	sc->sc_node = node;
213 
214 	node = OF_child(node);
215 	if (OF_getprop(node, "name", name, sizeof(name)) > 0) {
216 		if (strcmp(name,"i2c-bus") == 0) {
217 			phandle_t reg;
218 			if (OF_getprop(node, "reg", &reg, sizeof(reg)) > 0)
219 				sc->sc_i2c_base = reg << 8;
220 
221 			sc->sc_node = node;
222 		}
223 	}
224 
225 	mtx_init(&sc->sc_mutex, "kiic", NULL, MTX_DEF);
226 
227 	sc->sc_irq = bus_alloc_resource_any(self, SYS_RES_IRQ, &sc->sc_irqrid,
228 	    RF_ACTIVE);
229 	bus_setup_intr(self, sc->sc_irq, INTR_TYPE_MISC | INTR_MPSAFE, NULL,
230 	    kiic_intr, sc, &sc->sc_ih);
231 
232 	kiic_writereg(sc, ISR, kiic_readreg(sc, ISR));
233 	kiic_writereg(sc, STATUS, 0);
234 	kiic_writereg(sc, IER, 0);
235 
236 	kiic_setmode(sc, I2C_STDMODE);
237 	kiic_setspeed(sc, I2C_100kHz);		/* XXX rate */
238 
239 	kiic_writereg(sc, IER, I2C_INT_DATA | I2C_INT_ADDR | I2C_INT_STOP);
240 
241 	if (bootverbose)
242 		device_printf(self, "Revision: %02X\n", kiic_readreg(sc, REV));
243 
244 	/* Add the IIC bus layer */
245 	sc->sc_iicbus = device_add_child(self, "iicbus", -1);
246 
247 	return (bus_generic_attach(self));
248 }
249 
250 static void
251 kiic_writereg(struct kiic_softc *sc, u_int reg, u_int val)
252 {
253 	bus_write_4(sc->sc_reg, sc->sc_regstep * reg, val);
254 	DELAY(100); /* register access delay */
255 }
256 
257 static u_int
258 kiic_readreg(struct kiic_softc *sc, u_int reg)
259 {
260 	return bus_read_4(sc->sc_reg, sc->sc_regstep * reg) & 0xff;
261 }
262 
263 static void
264 kiic_setmode(struct kiic_softc *sc, u_int mode)
265 {
266 	u_int x;
267 
268 	KASSERT((mode & ~I2C_MODE) == 0, ("bad mode"));
269 	x = kiic_readreg(sc, MODE);
270 	x &= ~I2C_MODE;
271 	x |= mode;
272 	kiic_writereg(sc, MODE, x);
273 }
274 
275 static void
276 kiic_setport(struct kiic_softc *sc, u_int port)
277 {
278 	u_int x;
279 
280 	KASSERT(port == 1 || port == 0, ("bad port"));
281 	x = kiic_readreg(sc, MODE);
282 	x &= ~I2C_PORT;
283 	x |= (port << 4);
284 	kiic_writereg(sc, MODE, x);
285 }
286 
287 static void
288 kiic_setspeed(struct kiic_softc *sc, u_int speed)
289 {
290 	u_int x;
291 
292 	KASSERT((speed & ~I2C_SPEED) == 0, ("bad speed"));
293 	x = kiic_readreg(sc, MODE);
294 	x &= ~I2C_SPEED;
295 	x |= speed;
296 	kiic_writereg(sc, MODE, x);
297 }
298 
299 static void
300 kiic_intr(void *xsc)
301 {
302 	struct kiic_softc *sc = xsc;
303 	u_int isr;
304 	uint32_t x;
305 
306 	mtx_lock(&sc->sc_mutex);
307 	isr = kiic_readreg(sc, ISR);
308 
309 	if (isr & I2C_INT_ADDR) {
310 		sc->sc_flags |= I2C_SELECTED;
311 
312 		if (sc->sc_flags & I2C_READING) {
313 			if (sc->sc_resid > 1) {
314 				x = kiic_readreg(sc, CONTROL);
315 				x |= I2C_CT_AAK;
316 				kiic_writereg(sc, CONTROL, x);
317 			}
318 		} else {
319 			kiic_writereg(sc, DATA, *sc->sc_data++);
320 			sc->sc_resid--;
321 		}
322 	}
323 
324 	if (isr & I2C_INT_DATA) {
325 		if (sc->sc_flags & I2C_READING) {
326 			if (sc->sc_resid > 0) {
327 				*sc->sc_data++ = kiic_readreg(sc, DATA);
328 				sc->sc_resid--;
329 			}
330 			if (sc->sc_resid == 0)  /* done */
331 				kiic_writereg(sc, CONTROL, 0);
332 		} else {
333 			if (sc->sc_resid == 0) {
334 				x = kiic_readreg(sc, CONTROL);
335 				x |= I2C_CT_STOP;
336 				kiic_writereg(sc, CONTROL, x);
337 			} else {
338 				kiic_writereg(sc, DATA, *sc->sc_data++);
339 				sc->sc_resid--;
340 			}
341 		}
342 	}
343 
344 	if (isr & I2C_INT_STOP) {
345 		kiic_writereg(sc, CONTROL, 0);
346 		sc->sc_flags &= ~I2C_SELECTED;
347 		wakeup(sc->sc_dev);
348 	}
349 
350 	kiic_writereg(sc, ISR, isr);
351 	mtx_unlock(&sc->sc_mutex);
352 }
353 
354 static int
355 kiic_transfer(device_t dev, struct iic_msg *msgs, uint32_t nmsgs)
356 {
357 	struct kiic_softc *sc;
358 	int i, x, timo, err;
359 	uint16_t addr;
360 	uint8_t subaddr;
361 
362 	sc = device_get_softc(dev);
363 	timo = 100;
364 	subaddr = 0;
365 
366 	mtx_lock(&sc->sc_mutex);
367 
368 	if (sc->sc_flags & I2C_BUSY)
369 		mtx_sleep(dev, &sc->sc_mutex, 0, "kiic", timo);
370 
371 	if (sc->sc_flags & I2C_BUSY) {
372 		mtx_unlock(&sc->sc_mutex);
373 		return (ETIMEDOUT);
374 	}
375 
376 	sc->sc_flags = I2C_BUSY;
377 
378 	/* Clear pending interrupts, and reset controller */
379 	kiic_writereg(sc, ISR, kiic_readreg(sc, ISR));
380 	kiic_writereg(sc, STATUS, 0);
381 
382 	for (i = 0; i < nmsgs; i++) {
383 		if (msgs[i].flags & IIC_M_NOSTOP) {
384 			if (msgs[i+1].flags & IIC_M_RD)
385 				kiic_setmode(sc, I2C_COMBMODE);
386 			else
387 				kiic_setmode(sc, I2C_STDSUBMODE);
388 			KASSERT(msgs[i].len == 1, ("oversize I2C message"));
389 			subaddr = msgs[i].buf[0];
390 			i++;
391 		} else {
392 			kiic_setmode(sc, I2C_STDMODE);
393 		}
394 
395 		sc->sc_data = msgs[i].buf;
396 		sc->sc_resid = msgs[i].len;
397 		sc->sc_flags = I2C_BUSY;
398 		addr = msgs[i].slave;
399 		timo = 1000 + sc->sc_resid * 200;
400 		timo += 100000;
401 
402 		if (msgs[i].flags & IIC_M_RD) {
403 			sc->sc_flags |= I2C_READING;
404 			addr |= 1;
405 		}
406 
407 		addr |= sc->sc_i2c_base;
408 
409 		kiic_setport(sc, (addr & 0x100) >> 8);
410 		kiic_writereg(sc, ADDR, addr & 0xff);
411 		kiic_writereg(sc, SUBADDR, subaddr);
412 
413 		x = kiic_readreg(sc, CONTROL) | I2C_CT_ADDR;
414 		kiic_writereg(sc, CONTROL, x);
415 
416 		err = mtx_sleep(dev, &sc->sc_mutex, 0, "kiic", timo);
417 
418 		msgs[i].len -= sc->sc_resid;
419 
420 		if ((sc->sc_flags & I2C_ERROR) || err == EWOULDBLOCK) {
421 			device_printf(sc->sc_dev, "I2C error\n");
422 			sc->sc_flags = 0;
423 			mtx_unlock(&sc->sc_mutex);
424 			return (EIO);
425 		}
426 	}
427 
428 	sc->sc_flags = 0;
429 
430 	mtx_unlock(&sc->sc_mutex);
431 
432 	return (0);
433 }
434 
435 static phandle_t
436 kiic_get_node(device_t bus, device_t dev)
437 {
438 	struct kiic_softc *sc;
439 
440 	sc = device_get_softc(bus);
441 	/* We only have one child, the I2C bus, which needs our own node. */
442 
443 	return sc->sc_node;
444 }
445