1 /*- 2 * SPDX-License-Identifier: BSD-3-Clause 3 * 4 * Copyright 2003 by Peter Grehan. All rights reserved. 5 * 6 * Redistribution and use in source and binary forms, with or without 7 * modification, are permitted provided that the following conditions 8 * are met: 9 * 1. Redistributions of source code must retain the above copyright 10 * notice, this list of conditions and the following disclaimer. 11 * 2. Redistributions in binary form must reproduce the above copyright 12 * notice, this list of conditions and the following disclaimer in the 13 * documentation and/or other materials provided with the distribution. 14 * 3. The name of the author may not be used to endorse or promote products 15 * derived from this software without specific prior written permission. 16 * 17 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 18 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 19 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 20 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 21 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 22 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 23 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 24 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 25 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 26 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 27 * SUCH DAMAGE. 28 */ 29 30 /* 31 * A driver for the PIC found in the Heathrow/Paddington MacIO chips. 32 * This was superseded by an OpenPIC in the Keylargo and beyond 33 * MacIO versions. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/module.h> 39 #include <sys/bus.h> 40 #include <sys/conf.h> 41 #include <sys/kernel.h> 42 #include <sys/rman.h> 43 44 #include <dev/ofw/ofw_bus.h> 45 #include <dev/ofw/openfirm.h> 46 47 #include <machine/bus.h> 48 #include <machine/intr_machdep.h> 49 #include <machine/md_var.h> 50 #include <machine/pio.h> 51 #include <machine/resource.h> 52 53 #include <vm/vm.h> 54 #include <vm/pmap.h> 55 56 #include <powerpc/powermac/hrowpicvar.h> 57 58 #include "pic_if.h" 59 60 /* 61 * MacIO interface 62 */ 63 static int hrowpic_probe(device_t); 64 static int hrowpic_attach(device_t); 65 66 static void hrowpic_dispatch(device_t, struct trapframe *); 67 static void hrowpic_enable(device_t, u_int, u_int, void **); 68 static void hrowpic_eoi(device_t, u_int, void *); 69 static void hrowpic_ipi(device_t, u_int); 70 static void hrowpic_mask(device_t, u_int, void *); 71 static void hrowpic_unmask(device_t, u_int, void *); 72 73 static device_method_t hrowpic_methods[] = { 74 /* Device interface */ 75 DEVMETHOD(device_probe, hrowpic_probe), 76 DEVMETHOD(device_attach, hrowpic_attach), 77 78 /* PIC interface */ 79 DEVMETHOD(pic_dispatch, hrowpic_dispatch), 80 DEVMETHOD(pic_enable, hrowpic_enable), 81 DEVMETHOD(pic_eoi, hrowpic_eoi), 82 DEVMETHOD(pic_ipi, hrowpic_ipi), 83 DEVMETHOD(pic_mask, hrowpic_mask), 84 DEVMETHOD(pic_unmask, hrowpic_unmask), 85 86 { 0, 0 }, 87 }; 88 89 static driver_t hrowpic_driver = { 90 "hrowpic", 91 hrowpic_methods, 92 sizeof(struct hrowpic_softc) 93 }; 94 95 DRIVER_MODULE(hrowpic, macio, hrowpic_driver, 0, 0); 96 97 static uint32_t 98 hrowpic_read_reg(struct hrowpic_softc *sc, u_int reg, u_int bank) 99 { 100 if (bank == HPIC_PRIMARY) 101 reg += HPIC_1ST_OFFSET; 102 103 return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg)); 104 } 105 106 static void 107 hrowpic_write_reg(struct hrowpic_softc *sc, u_int reg, u_int bank, 108 uint32_t val) 109 { 110 111 if (bank == HPIC_PRIMARY) 112 reg += HPIC_1ST_OFFSET; 113 114 bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val); 115 116 /* XXX Issue a read to force the write to complete. */ 117 bus_space_read_4(sc->sc_bt, sc->sc_bh, reg); 118 } 119 120 static int 121 hrowpic_probe(device_t dev) 122 { 123 const char *type = ofw_bus_get_type(dev); 124 125 /* 126 * OpenPIC cells have a type of "open-pic", so this 127 * is sufficient to identify a Heathrow cell 128 */ 129 if (strcmp(type, "interrupt-controller") != 0) 130 return (ENXIO); 131 132 /* 133 * The description was already printed out in the nexus 134 * probe, so don't do it again here 135 */ 136 device_set_desc(dev, "Heathrow MacIO interrupt controller"); 137 return (0); 138 } 139 140 static int 141 hrowpic_attach(device_t dev) 142 { 143 struct hrowpic_softc *sc; 144 145 sc = device_get_softc(dev); 146 sc->sc_dev = dev; 147 148 sc->sc_rrid = 0; 149 sc->sc_rres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rrid, 150 RF_ACTIVE); 151 152 if (sc->sc_rres == NULL) { 153 device_printf(dev, "Could not alloc mem resource!\n"); 154 return (ENXIO); 155 } 156 157 sc->sc_bt = rman_get_bustag(sc->sc_rres); 158 sc->sc_bh = rman_get_bushandle(sc->sc_rres); 159 160 /* 161 * Disable all interrupt sources and clear outstanding interrupts 162 */ 163 hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_PRIMARY, 0); 164 hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_PRIMARY, 0xffffffff); 165 hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_SECONDARY, 0); 166 hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_SECONDARY, 0xffffffff); 167 168 powerpc_register_pic(dev, ofw_bus_get_node(dev), 64, 0, FALSE); 169 return (0); 170 } 171 172 /* 173 * Local routines 174 */ 175 176 static void 177 hrowpic_toggle_irq(struct hrowpic_softc *sc, int irq, int enable) 178 { 179 u_int roffset; 180 u_int rbit; 181 182 KASSERT((irq > 0) && (irq <= HROWPIC_IRQMAX), ("en irq out of range")); 183 184 /* 185 * Humor the SMP layer if it wants to set up an IPI handler. 186 */ 187 if (irq == HROWPIC_IRQMAX) 188 return; 189 190 /* 191 * Calculate prim/sec register bank for the IRQ, update soft copy, 192 * and enable the IRQ as an interrupt source 193 */ 194 roffset = HPIC_INT_TO_BANK(irq); 195 rbit = HPIC_INT_TO_REGBIT(irq); 196 197 if (enable) 198 sc->sc_softreg[roffset] |= (1 << rbit); 199 else 200 sc->sc_softreg[roffset] &= ~(1 << rbit); 201 202 hrowpic_write_reg(sc, HPIC_ENABLE, roffset, sc->sc_softreg[roffset]); 203 } 204 205 /* 206 * PIC I/F methods. 207 */ 208 209 static void 210 hrowpic_dispatch(device_t dev, struct trapframe *tf) 211 { 212 struct hrowpic_softc *sc; 213 uint64_t mask; 214 uint32_t reg; 215 u_int irq; 216 217 sc = device_get_softc(dev); 218 while (1) { 219 mask = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_SECONDARY); 220 reg = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_PRIMARY); 221 mask = (mask << 32) | reg; 222 if (mask == 0) 223 break; 224 225 irq = 0; 226 while (irq < HROWPIC_IRQMAX) { 227 if (mask & 1) 228 powerpc_dispatch_intr(sc->sc_vector[irq], tf); 229 mask >>= 1; 230 irq++; 231 } 232 } 233 } 234 235 static void 236 hrowpic_enable(device_t dev, u_int irq, u_int vector, void **priv __unused) 237 { 238 struct hrowpic_softc *sc; 239 240 sc = device_get_softc(dev); 241 sc->sc_vector[irq] = vector; 242 hrowpic_toggle_irq(sc, irq, 1); 243 } 244 245 static void 246 hrowpic_eoi(device_t dev, u_int irq, void *priv __unused) 247 { 248 struct hrowpic_softc *sc; 249 int bank; 250 251 sc = device_get_softc(dev); 252 bank = (irq >= 32) ? HPIC_SECONDARY : HPIC_PRIMARY ; 253 hrowpic_write_reg(sc, HPIC_CLEAR, bank, 1U << (irq & 0x1f)); 254 } 255 256 static void 257 hrowpic_ipi(device_t dev, u_int irq) 258 { 259 /* No SMP support. */ 260 } 261 262 static void 263 hrowpic_mask(device_t dev, u_int irq, void *priv __unused) 264 { 265 struct hrowpic_softc *sc; 266 267 sc = device_get_softc(dev); 268 hrowpic_toggle_irq(sc, irq, 0); 269 } 270 271 static void 272 hrowpic_unmask(device_t dev, u_int irq, void *priv __unused) 273 { 274 struct hrowpic_softc *sc; 275 276 sc = device_get_softc(dev); 277 hrowpic_toggle_irq(sc, irq, 1); 278 } 279