1 /*- 2 * Copyright 2003 by Peter Grehan. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 3. The name of the author may not be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 /* 31 * A driver for the PIC found in the Heathrow/Paddington MacIO chips. 32 * This was superseded by an OpenPIC in the Keylargo and beyond 33 * MacIO versions. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/module.h> 39 #include <sys/bus.h> 40 #include <sys/conf.h> 41 #include <sys/kernel.h> 42 #include <sys/rman.h> 43 44 #include <dev/ofw/ofw_bus.h> 45 #include <dev/ofw/openfirm.h> 46 47 #include <machine/bus.h> 48 #include <machine/intr.h> 49 #include <machine/intr_machdep.h> 50 #include <machine/md_var.h> 51 #include <machine/pio.h> 52 #include <machine/resource.h> 53 54 #include <vm/vm.h> 55 #include <vm/pmap.h> 56 57 #include <powerpc/powermac/hrowpicvar.h> 58 59 #include "pic_if.h" 60 61 /* 62 * MacIO interface 63 */ 64 static int hrowpic_probe(device_t); 65 static int hrowpic_attach(device_t); 66 67 static void hrowpic_dispatch(device_t, struct trapframe *); 68 static void hrowpic_enable(device_t, u_int, u_int); 69 static void hrowpic_eoi(device_t, u_int); 70 static void hrowpic_ipi(device_t, u_int); 71 static void hrowpic_mask(device_t, u_int); 72 static void hrowpic_unmask(device_t, u_int); 73 74 static device_method_t hrowpic_methods[] = { 75 /* Device interface */ 76 DEVMETHOD(device_probe, hrowpic_probe), 77 DEVMETHOD(device_attach, hrowpic_attach), 78 79 /* PIC interface */ 80 DEVMETHOD(pic_dispatch, hrowpic_dispatch), 81 DEVMETHOD(pic_enable, hrowpic_enable), 82 DEVMETHOD(pic_eoi, hrowpic_eoi), 83 DEVMETHOD(pic_ipi, hrowpic_ipi), 84 DEVMETHOD(pic_mask, hrowpic_mask), 85 DEVMETHOD(pic_unmask, hrowpic_unmask), 86 87 { 0, 0 }, 88 }; 89 90 static driver_t hrowpic_driver = { 91 "hrowpic", 92 hrowpic_methods, 93 sizeof(struct hrowpic_softc) 94 }; 95 96 static devclass_t hrowpic_devclass; 97 98 DRIVER_MODULE(hrowpic, macio, hrowpic_driver, hrowpic_devclass, 0, 0); 99 100 static uint32_t 101 hrowpic_read_reg(struct hrowpic_softc *sc, u_int reg, u_int bank) 102 { 103 if (bank == HPIC_PRIMARY) 104 reg += HPIC_1ST_OFFSET; 105 106 return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg)); 107 } 108 109 static void 110 hrowpic_write_reg(struct hrowpic_softc *sc, u_int reg, u_int bank, 111 uint32_t val) 112 { 113 114 if (bank == HPIC_PRIMARY) 115 reg += HPIC_1ST_OFFSET; 116 117 bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val); 118 119 /* XXX Issue a read to force the write to complete. */ 120 bus_space_read_4(sc->sc_bt, sc->sc_bh, reg); 121 } 122 123 static int 124 hrowpic_probe(device_t dev) 125 { 126 const char *type = ofw_bus_get_type(dev); 127 128 /* 129 * OpenPIC cells have a type of "open-pic", so this 130 * is sufficient to identify a Heathrow cell 131 */ 132 if (strcmp(type, "interrupt-controller") != 0) 133 return (ENXIO); 134 135 /* 136 * The description was already printed out in the nexus 137 * probe, so don't do it again here 138 */ 139 device_set_desc(dev, "Heathrow MacIO interrupt controller"); 140 return (0); 141 } 142 143 static int 144 hrowpic_attach(device_t dev) 145 { 146 struct hrowpic_softc *sc; 147 148 sc = device_get_softc(dev); 149 sc->sc_dev = dev; 150 151 sc->sc_rrid = 0; 152 sc->sc_rres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rrid, 153 RF_ACTIVE); 154 155 if (sc->sc_rres == NULL) { 156 device_printf(dev, "Could not alloc mem resource!\n"); 157 return (ENXIO); 158 } 159 160 sc->sc_bt = rman_get_bustag(sc->sc_rres); 161 sc->sc_bh = rman_get_bushandle(sc->sc_rres); 162 163 /* 164 * Disable all interrupt sources and clear outstanding interrupts 165 */ 166 hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_PRIMARY, 0); 167 hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_PRIMARY, 0xffffffff); 168 hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_SECONDARY, 0); 169 hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_SECONDARY, 0xffffffff); 170 171 powerpc_register_pic(dev, 64); 172 return (0); 173 } 174 175 /* 176 * Local routines 177 */ 178 179 static void 180 hrowpic_toggle_irq(struct hrowpic_softc *sc, int irq, int enable) 181 { 182 u_int roffset; 183 u_int rbit; 184 185 KASSERT((irq > 0) && (irq <= HROWPIC_IRQMAX), ("en irq out of range")); 186 187 /* 188 * Humor the SMP layer if it wants to set up an IPI handler. 189 */ 190 if (irq == HROWPIC_IRQMAX) 191 return; 192 193 /* 194 * Calculate prim/sec register bank for the IRQ, update soft copy, 195 * and enable the IRQ as an interrupt source 196 */ 197 roffset = HPIC_INT_TO_BANK(irq); 198 rbit = HPIC_INT_TO_REGBIT(irq); 199 200 if (enable) 201 sc->sc_softreg[roffset] |= (1 << rbit); 202 else 203 sc->sc_softreg[roffset] &= ~(1 << rbit); 204 205 hrowpic_write_reg(sc, HPIC_ENABLE, roffset, sc->sc_softreg[roffset]); 206 } 207 208 /* 209 * PIC I/F methods. 210 */ 211 212 static void 213 hrowpic_dispatch(device_t dev, struct trapframe *tf) 214 { 215 struct hrowpic_softc *sc; 216 uint64_t mask; 217 uint32_t reg; 218 u_int irq; 219 220 sc = device_get_softc(dev); 221 while (1) { 222 mask = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_SECONDARY); 223 reg = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_PRIMARY); 224 mask = (mask << 32) | reg; 225 if (mask == 0) 226 break; 227 228 irq = 0; 229 while (irq < HROWPIC_IRQMAX) { 230 if (mask & 1) 231 powerpc_dispatch_intr(sc->sc_vector[irq], tf); 232 mask >>= 1; 233 irq++; 234 } 235 } 236 } 237 238 static void 239 hrowpic_enable(device_t dev, u_int irq, u_int vector) 240 { 241 struct hrowpic_softc *sc; 242 243 sc = device_get_softc(dev); 244 sc->sc_vector[irq] = vector; 245 hrowpic_toggle_irq(sc, irq, 1); 246 } 247 248 static void 249 hrowpic_eoi(device_t dev __unused, u_int irq __unused) 250 { 251 struct hrowpic_softc *sc; 252 int bank; 253 254 sc = device_get_softc(dev); 255 bank = (irq >= 32) ? HPIC_SECONDARY : HPIC_PRIMARY ; 256 hrowpic_write_reg(sc, HPIC_CLEAR, bank, 1U << (irq & 0x1f)); 257 } 258 259 static void 260 hrowpic_ipi(device_t dev, u_int irq) 261 { 262 /* No SMP support. */ 263 } 264 265 static void 266 hrowpic_mask(device_t dev, u_int irq) 267 { 268 struct hrowpic_softc *sc; 269 int bank; 270 271 sc = device_get_softc(dev); 272 hrowpic_toggle_irq(sc, irq, 0); 273 bank = (irq >= 32) ? HPIC_SECONDARY : HPIC_PRIMARY ; 274 hrowpic_write_reg(sc, HPIC_CLEAR, bank, 1U << (irq & 0x1f)); 275 } 276 277 static void 278 hrowpic_unmask(device_t dev, u_int irq) 279 { 280 struct hrowpic_softc *sc; 281 282 sc = device_get_softc(dev); 283 hrowpic_toggle_irq(sc, irq, 1); 284 } 285