1 /*- 2 * Copyright 2003 by Peter Grehan. All rights reserved. 3 * 4 * Redistribution and use in source and binary forms, with or without 5 * modification, are permitted provided that the following conditions 6 * are met: 7 * 1. Redistributions of source code must retain the above copyright 8 * notice, this list of conditions and the following disclaimer. 9 * 2. Redistributions in binary form must reproduce the above copyright 10 * notice, this list of conditions and the following disclaimer in the 11 * documentation and/or other materials provided with the distribution. 12 * 3. The name of the author may not be used to endorse or promote products 13 * derived from this software without specific prior written permission. 14 * 15 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR 16 * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES 17 * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. 18 * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT, 19 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, 20 * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; 21 * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED 22 * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, 23 * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 24 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 25 * SUCH DAMAGE. 26 * 27 * $FreeBSD$ 28 */ 29 30 /* 31 * A driver for the PIC found in the Heathrow/Paddington MacIO chips. 32 * This was superseded by an OpenPIC in the Keylargo and beyond 33 * MacIO versions. 34 */ 35 36 #include <sys/param.h> 37 #include <sys/systm.h> 38 #include <sys/module.h> 39 #include <sys/bus.h> 40 #include <sys/conf.h> 41 #include <sys/kernel.h> 42 #include <sys/rman.h> 43 44 #include <dev/ofw/ofw_bus.h> 45 #include <dev/ofw/openfirm.h> 46 47 #include <machine/bus.h> 48 #include <machine/intr_machdep.h> 49 #include <machine/md_var.h> 50 #include <machine/pio.h> 51 #include <machine/resource.h> 52 53 #include <vm/vm.h> 54 #include <vm/pmap.h> 55 56 #include <powerpc/powermac/hrowpicvar.h> 57 58 #include "pic_if.h" 59 60 /* 61 * MacIO interface 62 */ 63 static int hrowpic_probe(device_t); 64 static int hrowpic_attach(device_t); 65 66 static void hrowpic_dispatch(device_t, struct trapframe *); 67 static void hrowpic_enable(device_t, u_int, u_int); 68 static void hrowpic_eoi(device_t, u_int); 69 static void hrowpic_ipi(device_t, u_int); 70 static void hrowpic_mask(device_t, u_int); 71 static void hrowpic_unmask(device_t, u_int); 72 static uint32_t hrowpic_id(device_t dev); 73 74 static device_method_t hrowpic_methods[] = { 75 /* Device interface */ 76 DEVMETHOD(device_probe, hrowpic_probe), 77 DEVMETHOD(device_attach, hrowpic_attach), 78 79 /* PIC interface */ 80 DEVMETHOD(pic_dispatch, hrowpic_dispatch), 81 DEVMETHOD(pic_enable, hrowpic_enable), 82 DEVMETHOD(pic_eoi, hrowpic_eoi), 83 DEVMETHOD(pic_id, hrowpic_id), 84 DEVMETHOD(pic_ipi, hrowpic_ipi), 85 DEVMETHOD(pic_mask, hrowpic_mask), 86 DEVMETHOD(pic_unmask, hrowpic_unmask), 87 88 { 0, 0 }, 89 }; 90 91 static driver_t hrowpic_driver = { 92 "hrowpic", 93 hrowpic_methods, 94 sizeof(struct hrowpic_softc) 95 }; 96 97 static devclass_t hrowpic_devclass; 98 99 DRIVER_MODULE(hrowpic, macio, hrowpic_driver, hrowpic_devclass, 0, 0); 100 101 static uint32_t 102 hrowpic_read_reg(struct hrowpic_softc *sc, u_int reg, u_int bank) 103 { 104 if (bank == HPIC_PRIMARY) 105 reg += HPIC_1ST_OFFSET; 106 107 return (bus_space_read_4(sc->sc_bt, sc->sc_bh, reg)); 108 } 109 110 static void 111 hrowpic_write_reg(struct hrowpic_softc *sc, u_int reg, u_int bank, 112 uint32_t val) 113 { 114 115 if (bank == HPIC_PRIMARY) 116 reg += HPIC_1ST_OFFSET; 117 118 bus_space_write_4(sc->sc_bt, sc->sc_bh, reg, val); 119 120 /* XXX Issue a read to force the write to complete. */ 121 bus_space_read_4(sc->sc_bt, sc->sc_bh, reg); 122 } 123 124 static int 125 hrowpic_probe(device_t dev) 126 { 127 const char *type = ofw_bus_get_type(dev); 128 129 /* 130 * OpenPIC cells have a type of "open-pic", so this 131 * is sufficient to identify a Heathrow cell 132 */ 133 if (strcmp(type, "interrupt-controller") != 0) 134 return (ENXIO); 135 136 /* 137 * The description was already printed out in the nexus 138 * probe, so don't do it again here 139 */ 140 device_set_desc(dev, "Heathrow MacIO interrupt controller"); 141 return (0); 142 } 143 144 static int 145 hrowpic_attach(device_t dev) 146 { 147 struct hrowpic_softc *sc; 148 149 sc = device_get_softc(dev); 150 sc->sc_dev = dev; 151 152 sc->sc_rrid = 0; 153 sc->sc_rres = bus_alloc_resource_any(dev, SYS_RES_MEMORY, &sc->sc_rrid, 154 RF_ACTIVE); 155 156 if (sc->sc_rres == NULL) { 157 device_printf(dev, "Could not alloc mem resource!\n"); 158 return (ENXIO); 159 } 160 161 sc->sc_bt = rman_get_bustag(sc->sc_rres); 162 sc->sc_bh = rman_get_bushandle(sc->sc_rres); 163 164 /* 165 * Disable all interrupt sources and clear outstanding interrupts 166 */ 167 hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_PRIMARY, 0); 168 hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_PRIMARY, 0xffffffff); 169 hrowpic_write_reg(sc, HPIC_ENABLE, HPIC_SECONDARY, 0); 170 hrowpic_write_reg(sc, HPIC_CLEAR, HPIC_SECONDARY, 0xffffffff); 171 172 powerpc_register_pic(dev, 64); 173 root_pic = dev; /* Heathrow systems have only one PIC */ 174 175 return (0); 176 } 177 178 /* 179 * Local routines 180 */ 181 182 static void 183 hrowpic_toggle_irq(struct hrowpic_softc *sc, int irq, int enable) 184 { 185 u_int roffset; 186 u_int rbit; 187 188 KASSERT((irq > 0) && (irq <= HROWPIC_IRQMAX), ("en irq out of range")); 189 190 /* 191 * Humor the SMP layer if it wants to set up an IPI handler. 192 */ 193 if (irq == HROWPIC_IRQMAX) 194 return; 195 196 /* 197 * Calculate prim/sec register bank for the IRQ, update soft copy, 198 * and enable the IRQ as an interrupt source 199 */ 200 roffset = HPIC_INT_TO_BANK(irq); 201 rbit = HPIC_INT_TO_REGBIT(irq); 202 203 if (enable) 204 sc->sc_softreg[roffset] |= (1 << rbit); 205 else 206 sc->sc_softreg[roffset] &= ~(1 << rbit); 207 208 hrowpic_write_reg(sc, HPIC_ENABLE, roffset, sc->sc_softreg[roffset]); 209 } 210 211 /* 212 * PIC I/F methods. 213 */ 214 215 static void 216 hrowpic_dispatch(device_t dev, struct trapframe *tf) 217 { 218 struct hrowpic_softc *sc; 219 uint64_t mask; 220 uint32_t reg; 221 u_int irq; 222 223 sc = device_get_softc(dev); 224 while (1) { 225 mask = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_SECONDARY); 226 reg = hrowpic_read_reg(sc, HPIC_STATUS, HPIC_PRIMARY); 227 mask = (mask << 32) | reg; 228 if (mask == 0) 229 break; 230 231 irq = 0; 232 while (irq < HROWPIC_IRQMAX) { 233 if (mask & 1) 234 powerpc_dispatch_intr(sc->sc_vector[irq], tf); 235 mask >>= 1; 236 irq++; 237 } 238 } 239 } 240 241 static void 242 hrowpic_enable(device_t dev, u_int irq, u_int vector) 243 { 244 struct hrowpic_softc *sc; 245 246 sc = device_get_softc(dev); 247 sc->sc_vector[irq] = vector; 248 hrowpic_toggle_irq(sc, irq, 1); 249 } 250 251 static void 252 hrowpic_eoi(device_t dev __unused, u_int irq __unused) 253 { 254 struct hrowpic_softc *sc; 255 int bank; 256 257 sc = device_get_softc(dev); 258 bank = (irq >= 32) ? HPIC_SECONDARY : HPIC_PRIMARY ; 259 hrowpic_write_reg(sc, HPIC_CLEAR, bank, 1U << (irq & 0x1f)); 260 } 261 262 static void 263 hrowpic_ipi(device_t dev, u_int irq) 264 { 265 /* No SMP support. */ 266 } 267 268 static void 269 hrowpic_mask(device_t dev, u_int irq) 270 { 271 struct hrowpic_softc *sc; 272 273 sc = device_get_softc(dev); 274 hrowpic_toggle_irq(sc, irq, 0); 275 } 276 277 static void 278 hrowpic_unmask(device_t dev, u_int irq) 279 { 280 struct hrowpic_softc *sc; 281 282 sc = device_get_softc(dev); 283 hrowpic_toggle_irq(sc, irq, 1); 284 } 285 286 static uint32_t 287 hrowpic_id(device_t dev) 288 { 289 return (ofw_bus_get_node(dev)); 290 } 291 292